Semiconductor module

Description

FIG. 1 is a front view of a semiconductor module showing our new design;

FIG. 2 is a rear view of the semiconductor module of FIG. 1;

FIG. 3 is a left side view of the semiconductor module of FIG. 1;

FIG. 4 is a right side view of the semiconductor module of FIG. 1;

FIG. 5 is a top view of the semiconductor module of FIG. 1;

FIG. 6 is a bottom view of the semiconductor module of FIG. 1;

FIG. 7 is a top, front, and right side perspective view of the semiconductor module of FIG. 1; and,

FIG. 8 is a top, rear, and left side perspective view of the semiconductor module of FIG. 1.

The portions of the semiconductor module shown in broken lines form no part of the claimed design.

Claims

CLAIM The ornamental design for a semiconductor module, as shown and described.

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Inventors:	Itoh; Taichi (Matsumoto, JP), Ichikawa; Hiroaki (Azumino, JP), Kakefu; Mitsuhiro (Matsumoto, JP), Yamano; Akio (Matsumoto, JP), Yamamoto; Takuya (Matsumoto, JP)
Applicant:	Name City State Country Type FUJI ELECTRIC CO., LTD. Kawasaki N/A JP
Assignee:	FUJI ELECTRIC CO., LTD. (Kawasaki, JP)
Appl. No.:	D/669,336
Filed:	November 7, 2018

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Foreign Application Priority Data

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Jun 1, 2018 [JP]			2018-012139

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182 ;257/678,684,690,691 ;361/679.01,713,728,736,760,761,772,775,783,820 ;174/250,253 ;438/15,25,26,51,55,63,64,106

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References Cited [Referenced By]

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U.S. Patent Documents

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D785577	May 2017	Kawase
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D790491	June 2017	Hayashida
D798832	October 2017	Hayashida
D799439	October 2017	Hayashiguchi
D805485	December 2017	Kawase
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Other References

Stegner et al., "New PrimePACK.TM. package to lever IGBT5", PCIM Europe 2015, vol. 19 No. 21, May 2015, pp. 766-771. cited by applicant.

Primary Examiner: Oswecki; Elizabeth J

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