Semiconductor device

Yoneyama , et al. September 20, 2

Patent Grant D766851

U.S. patent number D766,851 [Application Number D/531,173] was granted by the patent office on 2016-09-20 for semiconductor device. This patent grant is currently assigned to Mitsubishi Electric Corporation. The grantee listed for this patent is Mitsubishi Electric Corporation. Invention is credited to Takehiro Araki, Akira Goto, Ryo Goto, Yoshitaka Kimura, Mariko Ono, Akihiko Yamashita, Rei Yoneyama.


United States Patent D766,851
Yoneyama ,   et al. September 20, 2016

Semiconductor device

Claims

CLAIM The ornamental design for a semiconductor device, as shown and described.
Inventors: Yoneyama; Rei (Tokyo, JP), Araki; Takehiro (Fukuoka, JP), Goto; Akira (Fukuoka, JP), Kimura; Yoshitaka (Tokyo, JP), Yamashita; Akihiko (Hyogo, JP), Ono; Mariko (Fukuoka, JP), Goto; Ryo (Tokyo, JP)
Applicant:
Name City State Country Type

Mitsubishi Electric Corporation

Tokyo

N/A

JP
Assignee: Mitsubishi Electric Corporation (Tokyo, JP)
Appl. No.: D/531,173
Filed: June 23, 2015

Foreign Application Priority Data

Feb 4, 2015 [JP] 2015-002059
Feb 4, 2015 [JP] 2015-002061
Current U.S. Class: D13/182
Current International Class: 1303
Field of Search: ;D13/182

References Cited [Referenced By]

U.S. Patent Documents
D357672 April 1995 Terasawa
D396450 July 1998 Nishiura
D441726 May 2001 Sofue
6521983 February 2003 Yoshimatsu
D587662 March 2009 Soutome
D589012 March 2009 Soyano
D606951 December 2009 Soyano
D653633 February 2012 Soyano
D653634 February 2012 Soyano
D686174 July 2013 Soyano
D689446 September 2013 Soyano
D704670 May 2014 Chen
D704671 May 2014 Chen
D705184 May 2014 Takahashi
D710317 August 2014 Chen
D710318 August 2014 Chen
D710319 August 2014 Chen
D712853 September 2014 Nakamura
D721048 January 2015 Nakamura
D721340 January 2015 Nakamura
D748595 February 2016 Bertalan
2001/0038143 November 2001 Sonobe
2010/0149774 June 2010 Matsumoto
Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Studebaker & Brackett PC

Description



FIG. 1 is a front, top, and right side perspective view of a semiconductor device, showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a top view thereof; and,

FIG. 7 is a bottom view thereof.

* * * * *


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