U.S. patent number D686,174 [Application Number D/408,443] was granted by the patent office on 2013-07-16 for semiconductor device.
This patent grant is currently assigned to Fuji Electric Co., Ltd. The grantee listed for this patent is Shin Soyano. Invention is credited to Shin Soyano.
United States Patent |
D686,174 |
Soyano |
July 16, 2013 |
Semiconductor device
Claims
CLAIM The ornamental design for a semiconductor device, as shown
and described.
Inventors: |
Soyano; Shin (Kanagawa,
JP) |
Applicant: |
Name |
City |
State |
Country |
Type |
Soyano; Shin |
Kanagawa |
N/A |
JP |
|
|
Assignee: |
Fuji Electric Co., Ltd
(Kanagawa, JP)
|
Appl.
No.: |
D/408,443 |
Filed: |
December 13, 2011 |
Foreign Application Priority Data
|
|
|
|
|
Aug 12, 2011 [JP] |
|
|
2011-018510 |
|
Current U.S.
Class: |
D13/182 |
Current International
Class: |
1303 |
Field of
Search: |
;D13/110,182 ;257/690
;361/728,736,775 |
References Cited
[Referenced By]
U.S. Patent Documents
Foreign Patent Documents
Other References
JP Office Action dated Jan. 10, 2012, with English partial
translation. cited by applicant.
|
Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Young & Thompson
Description
FIG. 1 is a first perspective view of front, bottom and right side
of a semiconductor device showing our new design;
FIG. 2 is a perspective view of rear, bottom and right side
thereof;
FIG. 3 is a second perspective view of front, bottom and right side
thereof;
FIG. 4 is a front view thereof;
FIG. 5 is a rear view thereof;
FIG. 6 is a left side view thereof;
FIG. 7 is a right side view thereof;
FIG. 8 is a top plan view thereof; and,
FIG. 9 is a bottom view thereof.
The portions of the article in broken lines are shown for
illustrative purposes only and form no part of the claimed
design.
* * * * *