Semiconductor module

Soyano , et al. December 20, 2

Patent Grant D774479

U.S. patent number D774,479 [Application Number D/528,214] was granted by the patent office on 2016-12-20 for semiconductor module. This patent grant is currently assigned to Fuji Electric Co., Ltd.. The grantee listed for this patent is Fuji Electric Co., Ltd.. Invention is credited to Keiichi Higuchi, Takahiro Koyama, Shin Soyano, Yoshikazu Takayima.


United States Patent D774,479
Soyano ,   et al. December 20, 2016

Semiconductor module

Claims

CLAIM The ornamental design for a semiconductor module, as shown and described.
Inventors: Soyano; Shin (Tokyo, JP), Takayima; Yoshikazu (Tokyo, JP), Higuchi; Keiichi (Tokyo, JP), Koyama; Takahiro (Tokyo, JP)
Applicant:
Name City State Country Type

Fuji Electric Co., Ltd.

Kawasaki-shi, Kanagawa

N/A

JP
Assignee: Fuji Electric Co., Ltd. (Kawasaki-shi, Kanagawa, JP)
Appl. No.: D/528,214
Filed: May 27, 2015

Foreign Application Priority Data

Nov 28, 2014 [JP] D2014-026634
Nov 28, 2014 [JP] D2014-026635
Nov 28, 2014 [JP] D2014-026636
Current U.S. Class: D13/182
Current International Class: 1303
Field of Search: ;D13/182

References Cited [Referenced By]

U.S. Patent Documents
D357672 April 1995 Terasawa
D396450 July 1998 Nishiura
D441726 May 2001 Sofue
6521983 February 2003 Yoshimatsu
D587662 March 2009 Soutome
D589012 March 2009 Soyano
D606951 December 2009 Soyano
D653633 February 2012 Soyano
D653634 February 2012 Soyano
D686174 July 2013 Soyano
D689446 September 2013 Soyano
D704670 May 2014 Chen et al.
D704671 May 2014 Chen et al.
D705184 May 2014 Takahashi et al.
D706232 June 2014 Nakamura
D710317 August 2014 Chen et al.
D710318 August 2014 Chen et al.
D710319 August 2014 Chen et al.
D712853 September 2014 Nakamura
D721048 January 2015 Nakamura
D721340 January 2015 Nakamura
D724554 March 2015 Motohashi et al.
D748595 February 2016 Bertalan
2001/0038143 November 2001 Sonobe
2010/0149774 June 2010 Matsumoto
Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Young Basile Hanlon & MacFarlane, P.C.

Description



FIG. 1 is a front view of a semiconductor module showing our new design;

FIG. 2 is a rear view thereof;

FIG. 3 is a left side view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a top view thereof;

FIG. 6 is a bottom view thereof;

FIG. 7 is a front, right, and bottom perspective view thereof; and,

FIG. 8 is a rear, left, and top perspective view thereof.

The ornamental design of the present disclosure is a semiconductor module on which power semiconductor elements and the like may be mounted. Rhombic plate members having rounded corners are centered along the long sides of the rear view, such that the longer diagonal line of each rhombic plate member extends along a long side.

The broken lines shown in the drawing views of FIGS. 1-8 form no part of the claimed design.

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