Semiconductor module

Motohashi , et al. March 17, 2

Patent Grant D724554

U.S. patent number D724,554 [Application Number D/491,549] was granted by the patent office on 2015-03-17 for semiconductor module. This patent grant is currently assigned to Fuji Electric Co., Ltd.. The grantee listed for this patent is Fuji Electric Co., Ltd.. Invention is credited to Tatsuya Karasawa, Satoru Motohashi, Hideaki Takahashi, Kenshi Terashima.


United States Patent D724,554
Motohashi ,   et al. March 17, 2015

Semiconductor module

Claims

CLAIM The ornamental design for a semiconductor module, as shown and described.
Inventors: Motohashi; Satoru (Nagano, JP), Takahashi; Hideaki (Nagano, JP), Karasawa; Tatsuya (Nagano, JP), Terashima; Kenshi (Nagano, JP)
Applicant:
Name City State Country Type

Fuji Electric Co., Ltd.

Kawasaki-shi, Kanagawa

N/A

JP
Assignee: Fuji Electric Co., Ltd. (Kawasaki-shi, Kanagawa, JP)
Appl. No.: D/491,549
Filed: May 22, 2014

Foreign Application Priority Data

Feb 19, 2014 [JP] D2014-003350
Current U.S. Class: D13/182
Current International Class: 1303
Field of Search: ;D13/110,182 ;257/678,684,690,691 ;361/713,679.01,728,736,772,773,774,775,760,761,783,820 ;174/250,253 ;438/15,25,26,51,54,55,63,64,65,106

References Cited [Referenced By]

U.S. Patent Documents
D318646 July 1991 Karbassi
5031462 July 1991 Lam
5184107 February 1993 Maurer
D390833 February 1998 Takizawa et al.
D395423 June 1998 Koyama et al.
D396696 August 1998 Takagi et al.
D432095 October 2000 Seeger et al.
D436085 January 2001 Takizawa et al.
D441726 May 2001 Sofue et al.
D472529 April 2003 Okuyama et al.
D472531 April 2003 Okuyama et al.
D485242 January 2004 Iwafuchi et al.
D493152 July 2004 Baker et al.
D505923 June 2005 Okuyama et al.
D505924 June 2005 Okuyama et al.
D554084 October 2007 Iizuka
D576577 September 2008 Kobayashi et al.
D587662 March 2009 Soutome et al.
D589012 March 2009 Soyano et al.
D597504 August 2009 Kobayashi et al.
D606951 December 2009 Soyano et al.
D653633 February 2012 Soyano
D653634 February 2012 Soyano
D689833 September 2013 Hori et al.
D693318 November 2013 Shinkai
D699693 February 2014 Otsuka et al.
D703625 April 2014 Lim et al.
D704670 May 2014 Chen et al.
D704671 May 2014 Chen et al.
D705184 May 2014 Takahashi et al.
D710318 August 2014 Chen et al.
Foreign Patent Documents
002305607-0001 Sep 2013 EM

Other References

US. Appl. No. 29/458,663, filed Jun. 21, 2013. cited by applicant .
U.S. Appl. No. 29/458,665, filed Jun. 21, 2013. cited by applicant .
U.S. Appl. No. 29/458,667, filed Jun. 21, 2013. cited by applicant .
U.S. Appl. No. 29/458,669, filed Jun. 21, 2013. cited by applicant .
U.S. Appl. No. 29/460,862, filed Jul. 16, 2013. cited by applicant .
U.S. Appl. No. 29/460,861, filed Jul. 16, 2013. cited by applicant .
U.S. Appl. No. 29/460,859, filed Jul. 16, 2013. cited by applicant.

Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Young Basile Hanlon & MacFarlane P.C.

Description



FIG. 1 is a front view of a semiconductor module showing our new design;

FIG. 2 is a rear view of the semiconductor module of FIG. 1;

FIG. 3 is a left side view of the semiconductor module of FIG. 1;

FIG. 4 is a right side view of the semiconductor module of FIG. 1;

FIG. 5 is a top view of the semiconductor module of FIG. 1;

FIG. 6 is a bottom view of the semiconductor module of FIG. 1; and,

FIG. 7 is a top, front and right side perspective view of the semiconductor module of FIG. 1.

The broken lines shown in the drawings represent portions of the semiconductor module that form no part of the claimed design.

The ornamental design of the present disclosure is a semiconductor module on which power semiconductor elements and the like may be mounted. A plurality of pin-shaped terminals projects from the top surface. Each end in a longitudinal direction includes a mounting hole. Each corner includes a positioning boss.

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