Semiconductor device

Description

FIG. 1 is a top, left and rear side perspective view of a semiconductor device, showing my new design;

FIG. 2 is bottom, right and rear side perspective view thereof;

FIG. 3 is a front elevational view thereof;

FIG. 4 is a rear elevational view thereof;

FIG. 5 is a left side elevational view thereof;

FIG. 6 is a right side elevational view thereof;

FIG. 7 is a top plan view thereof;

FIG. 8 is a bottom plan view thereof;

FIG. 9 is another top, left and rear side perspective view thereof, shown in a used condition mounted on a board shown in broken lines; and,

FIG. 10 is another rear view thereof, shown in a used condition mounted on a board shown in broken lines.

The broken lines shown in the drawing views in FIGS. 9 and 10 form no part of the claimed design.

Claims

CLAIM The ornamental design for a semiconductor device, as shown and described.

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Inventors:	Kawase; Tatsuya (Chiyoda-ku, JP)
Applicant:	Name City State Country Type Mitsubishi Electric Corporation Chiyoda-ku, Tokyo N/A JP
Assignee:	Mitsubishi Electric Corporation (Tokyo, JP)
Appl. No.:	D/591,886
Filed:	January 25, 2017

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Related U.S. Patent Documents

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	Application Number	Filing Date	Patent Number	Issue Date
	29555470	Feb 22, 2016	D785577
	29472087	Apr 19, 2016	D754084

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Foreign Application Priority Data

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Aug 21, 2013 [JP]			2013-019030
Aug 21, 2013 [JP]			2013-019056
Aug 21, 2013 [JP]			2013-019057

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/110,182 ;257/678,684,690,691 ;361/679.01,713,728,736,760,761,772,775,783,820 ;174/250,253 ;438/15,25,26,51,55,63,64,106

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References Cited [Referenced By]

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Foreign Patent Documents

	1411990		Apr 2011		JP
	1412318		Apr 2011		JP

Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Sughrue Mion, PLLC Turner; Richard C.