U.S. patent number D810,036 [Application Number D/598,481] was granted by the patent office on 2018-02-13 for semiconductor module.
This patent grant is currently assigned to FUJI ELECTRIC CO., LTD.. The grantee listed for this patent is FUJI ELECTRIC CO., LTD.. Invention is credited to Tomofumi Oose, Satoshi Sawayanagi, Hideaki Takahashi, Masahiro Taoka.
United States Patent |
D810,036 |
Sawayanagi , et al. |
February 13, 2018 |
Semiconductor module
Claims
CLAIM The ornamental design for a semiconductor module, as shown
and described.
Inventors: |
Sawayanagi; Satoshi (Matsumoto,
JP), Taoka; Masahiro (Matsumoto, JP), Oose;
Tomofumi (Matsumoto, JP), Takahashi; Hideaki
(Omachi, JP) |
Applicant: |
Name |
City |
State |
Country |
Type |
FUJI ELECTRIC CO., LTD. |
Kawasaki |
N/A |
JP |
|
|
Assignee: |
FUJI ELECTRIC CO., LTD.
(Kawasaki, JP)
|
Appl.
No.: |
D/598,481 |
Filed: |
March 27, 2017 |
Foreign Application Priority Data
|
|
|
|
|
Nov 8, 2016 [JP] |
|
|
2016-024300 |
|
Current U.S.
Class: |
D13/182 |
Current International
Class: |
1303 |
Field of
Search: |
;D13/182
;257/678,684,690,691
;361/679.01,713,728,736,760,761,772,775,783,820 ;174/250,253
;438/15,25,26,51,55,63,64 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Oswecki; Elizabeth J
Description
FIG. 1 is a front view of a semiconductor module showing our new
design;
FIG. 2 is a rear view of the semiconductor module of FIG. 1;
FIG. 3 is a left side view of the semiconductor module of FIG.
1;
FIG. 4 is a right side view of the semiconductor module of FIG.
1;
FIG. 5 is a top view of the semiconductor module of FIG. 1;
FIG. 6 is a bottom view of the semiconductor module of FIG. 1;
and,
FIG. 7 is a top, front, right side perspective view of the
semiconductor module of FIG. 1.
The broken lines shown in the drawings represent portions of the
semiconductor module that form no part of the claimed design.
* * * * *