Wafer holder for manufacturing semiconductor

Morisaki , et al. September 20, 2

Patent Grant D766850

U.S. patent number D766,850 [Application Number D/502,191] was granted by the patent office on 2016-09-20 for wafer holder for manufacturing semiconductor. This patent grant is currently assigned to TOKYO ELECTRON LIMITED. The grantee listed for this patent is TOKYO ELECTRON LIMITED. Invention is credited to Masayuki Harashima, Hirokatsu Kobayashi, Wataru Machiyama, Eisuke Morisaki, Yukio Sano.


United States Patent D766,850
Morisaki ,   et al. September 20, 2016

Wafer holder for manufacturing semiconductor

Claims

CLAIM The ornamental design for a wafer holder for manufacturing semiconductor, as shown and described.
Inventors: Morisaki; Eisuke (Nirasaki, JP), Machiyama; Wataru (Nirasaki, JP), Kobayashi; Hirokatsu (Nirasaki, JP), Harashima; Masayuki (Nirasaki, JP), Sano; Yukio (Nirasaki, JP)
Applicant:
Name City State Country Type

TOKYO ELECTRON LIMITED

Minato-ku, Tokyo

N/A

JP
Assignee: TOKYO ELECTRON LIMITED (Minato-ku, Tokyo, JP)
Appl. No.: D/502,191
Filed: September 12, 2014

Foreign Application Priority Data

Mar 28, 2014 [JP] D2014-006724
Mar 28, 2014 [JP] D2014-006725
Mar 28, 2014 [JP] D2014-006726
Mar 28, 2014 [JP] D2014-006727
Current U.S. Class: D13/182
Current International Class: 1303
Field of Search: ;D13/182 ;118/715,500,728,729 ;211/41.18 ;432/253,258 ;156/345.51,345.52,345.53,345.55 ;414/217,220.01,935-941

References Cited [Referenced By]

U.S. Patent Documents
D589474 March 2009 Ogasawara
D589912 April 2009 Ogasawara
7582166 September 2009 Lampe
7644968 January 2010 Hirooka
D609652 February 2010 Nagasaka
D614593 April 2010 Lee
D616394 May 2010 Sato
D616395 May 2010 Sato
D654883 February 2012 Honma
D654884 February 2012 Honma
D655257 March 2012 Honma
D655259 March 2012 Honma
D674366 January 2013 Kajiwara
D674759 January 2013 Chang
D674761 January 2013 Iida
D684551 June 2013 Nguyen
D686175 July 2013 Gurary
D703162 April 2014 Tamaso
D716742 November 2014 Jang
D723077 February 2015 Sakata
D724553 March 2015 Choi
D734730 July 2015 Yoshida
D737785 September 2015 Yoshida
D738329 September 2015 Yoshida
9167625 October 2015 Shero
D747279 January 2016 Yoshida
D753269 April 2016 Yamagishi
2005/0193952 September 2005 Goodman
Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Jay; Jeremy

Description



FIG. 1 is a front view of a wafer holder for manufacturing semiconductor showing our new design;

FIG. 2 is a rear view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a front perspective view thereof;

FIG. 8 is an enlarged cross sectional view taken along line 8-8 in FIG. 1;

FIG. 9 is an enlarged portion view taken along line 9-9 in FIG. 1; and,

FIG. 10 is another front perspective view of FIG. 1 shown in a used condition with wafers shown in broken lines.

The features shown in dotted lines depict environmental subject matter only and form no part of the claimed design.

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