Top plate for reactor for manufacturing semiconductor

Description

FIG. 1 is front perspective view of a top plate for reactor for manufacturing semiconductor illustrating our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a left side view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom view thereof;

FIG. 8 is a reference front view indicating the plane upon which a sectional view is taken; and,

FIG. 9 is a sectional view taken along line 9-9-9 of FIG. 8.

The broken lines are shown for illustrative purposes only and form no part of the claimed design.

Claims

CLAIM The ornamental design for top plate for reactor for manufacturing semiconductor, as shown and described.

---

Inventors:	Honma; Manabu (Oshu, JP), Hishiya; Katsuyuki (Oshu, JP)
Assignee:	Tokyo Electron Limited (Minato-Ku, JP)
Appl. No.:	D/389,558
Filed:	April 13, 2011

---

Foreign Application Priority Data

---

Oct 21, 2010 [JP]			2010-025238

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182 ;D7/585 ;174/250,253,255 ;257/690,692,697,695,748,786,773 ;361/777 ;29/829

---

References Cited [Referenced By]

---

U.S. Patent Documents

7235139	June 2007	Boguslavskiy et al.
D614593	April 2010	Lee et al.
D615937	May 2010	Sato
D616392	May 2010	Sato
D616393	May 2010	Sato
D639757	June 2011	Root et al.

Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Burr & Brown