Patent | Date |
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Managing Thermal Resistance And Planarity Of A Display Package App 20220285601 - PENDSE; Rajendra D. | 2022-09-08 |
Aligning A Collimator Assembly With Led Arrays App 20220229301 - PENDSE; Rajendra D. | 2022-07-21 |
Managing thermal resistance and planarity of a display package Grant 11,362,251 - Pendse June 14, 2 | 2022-06-14 |
Aligning a collimator assembly with LED arrays Grant 11,287,656 - Pendse March 29, 2 | 2022-03-29 |
Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integration Grant 11,251,154 - Pendse February 15, 2 | 2022-02-15 |
ARTIFICIAL REALITY SYSTEM HAVING SYSTEM-ON-A-CHIP (SoC) INTEGRATED CIRCUIT COMPONENTS INCLUDING STACKED SRAM App 20210405382 - Pendse; Rajendra D. | 2021-12-30 |
Integrated Display Devices App 20210335767 - PENDSE; Rajendra D. | 2021-10-28 |
Integrating Control Circuits With Light Emissive Circuits With Dissimilar Wafer Sizes App 20210288036 - Pendse; Rajendra D. | 2021-09-16 |
Integrating Control Circuits With Light Emissive Circuits With Dissimilar Wafer Sizes App 20210288032 - Pendse; Rajendra D. | 2021-09-16 |
Integrated display devices Grant 11,037,915 - Pendse June 15, 2 | 2021-06-15 |
Left And Right Projectors For Display Device App 20210175216 - PENDSE; Rajendra D. | 2021-06-10 |
Aligning A Collimator Assembly With Led Arrays App 20210165318 - PENDSE; Rajendra D. | 2021-06-03 |
Managing Thermal Resistance And Planarity Of A Display Package App 20210167268 - PENDSE; Rajendra D. | 2021-06-03 |
Reducing The Planarity Variation In A Display Device App 20210013099 - PENDSE; Rajendra D. | 2021-01-14 |
Thin 3D Fan-Out Embedded Wafer Level Package (EWLB) for Application Processor and Memory Integration App 20200279827 - Pendse; Rajendra D. | 2020-09-03 |
Integrated Display Devices App 20200266180 - PENDSE; Rajendra D. | 2020-08-20 |
Stacking of three-dimensional circuits including through-silicon-vias Grant 10,700,041 - Pendse | 2020-06-30 |
Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integration Grant 10,692,836 - Pendse | 2020-06-23 |
Stacking Of Three-dimensional Circuits Including Through-silicon-vias App 20200098729 - Pendse; Rajendra D. | 2020-03-26 |
Semiconductor device and method of forming high routing density interconnect sites on substrate Grant 10,580,749 - Pendse | 2020-03-03 |
Semiconductor device and method of forming electrical interconnect with stress relief void Grant RE47,600 - Pendse Sept | 2019-09-10 |
Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits Grant 10,388,612 - Lin , et al. A | 2019-08-20 |
Semiconductor device and method of forming flipchip interconnect structure Grant 10,388,626 - Pendse A | 2019-08-20 |
Thin 3D Fan-Out Embedded Wafer Level Package (EWLB) for Application Processor and Memory Integration App 20180096963 - Pendse; Rajendra D. | 2018-04-05 |
Bump-on-lead flip chip interconnection Grant 9,922,915 - Pendse March 20, 2 | 2018-03-20 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 9,899,286 - Pendse February 20, 2 | 2018-02-20 |
Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integration Grant 9,881,894 - Pendse January 30, 2 | 2018-01-30 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 9,865,556 - Pendse January 9, 2 | 2018-01-09 |
Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substrate Grant 9,847,309 - Pendse December 19, 2 | 2017-12-19 |
Semiconductor Device and Method of Forming Electromagnetic (EM) Shielding for LC Circuits App 20170330840 - Lin; Yaojian ;   et al. | 2017-11-16 |
Semiconductor device and method of forming pad layout for flipchip semiconductor die Grant 9,780,057 - Pendse October 3, 2 | 2017-10-03 |
Solder joint flip chip interconnection having relief structure Grant 9,773,685 - Pendse , et al. September 26, 2 | 2017-09-26 |
Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits Grant 9,754,897 - Lin , et al. September 5, 2 | 2017-09-05 |
Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in Fo-WLCSP Grant 9,679,824 - Pagaila , et al. June 13, 2 | 2017-06-13 |
Semiconductor device and method of confining conductive bump material with solder mask patch Grant 9,679,811 - Pendse June 13, 2 | 2017-06-13 |
Flip chip interconnect solder mask Grant 9,545,013 - Pendse January 10, 2 | 2017-01-10 |
Flip chip interconnect solder mask Grant 9,545,014 - Pendse January 10, 2 | 2017-01-10 |
Semiconductor device and method of forming extended semiconductor device with fan-out interconnect structure to reduce complexity of substrate Grant 9,484,319 - Pendse November 1, 2 | 2016-11-01 |
Semiconductor device and method of forming wire bondable fan-out EWLB package Grant 9,472,533 - Pendse October 18, 2 | 2016-10-18 |
Semiconductor Package with Embedded Die App 20160284619 - Pendse; Rajendra D. | 2016-09-29 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20160260646 - Pendse; Rajendra D. | 2016-09-08 |
Semiconductor device and method of forming bump-on-lead interconnection Grant 9,385,101 - Pendse July 5, 2 | 2016-07-05 |
Semiconductor package with embedded die Grant 9,385,074 - Pendse July 5, 2 | 2016-07-05 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 9,379,084 - Pendse June 28, 2 | 2016-06-28 |
Solder joint flip chip interconnection Grant 9,373,573 - Pendse , et al. June 21, 2 | 2016-06-21 |
Semiconductor device and method of forming flipchip interconnection structure with bump on partial pad Grant 9,345,148 - Pendse May 17, 2 | 2016-05-17 |
Semiconductor device and method of forming a metallurgical interconnection between a chip and a substrate in a flip chip package Grant 9,312,150 - Ahmad , et al. April 12, 2 | 2016-04-12 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20160071813 - Pendse; Rajendra D. | 2016-03-10 |
Semiconductor device having a vertical interconnect structure using stud bumps Grant 9,263,361 - Pagaila , et al. February 16, 2 | 2016-02-16 |
Semiconductor device and method of forming narrow interconnect sites on substrate with elongated mask openings Grant 9,258,904 - Pendse February 9, 2 | 2016-02-09 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 9,219,045 - Pendse December 22, 2 | 2015-12-22 |
Semiconductor Device and Method of Forming Electromagnetic (EM) Shielding for LC Circuits App 20150348936 - Lin; Yaojian ;   et al. | 2015-12-03 |
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection App 20150311172 - Pendse; Rajendra D. | 2015-10-29 |
Flip chip interconnection having narrow interconnection sites on the substrate Grant 9,159,665 - Pendse October 13, 2 | 2015-10-13 |
Filp chip interconnection structure with bump on partial pad and method thereof Grant 9,125,332 - Pendse , et al. September 1, 2 | 2015-09-01 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20150214182 - Pendse; Rajendra D. | 2015-07-30 |
Semiconductor device and method of forming bump-on-lead interconnection Grant 9,064,858 - Pendse June 23, 2 | 2015-06-23 |
Integrated circuit having staggered bond pads and I/O cells Grant 9,054,084 - Pendse June 9, 2 | 2015-06-09 |
Semiconductor Device and Method of Forming Wire Bondable Fan-Out EWLB Package App 20150140736 - Pendse; Rajendra D. | 2015-05-21 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 9,029,196 - Pendse May 12, 2 | 2015-05-12 |
Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort test Grant 8,987,014 - Pendse March 24, 2 | 2015-03-24 |
Semiconductor Device and Method of Forming Pad Layout for Flipchip Semiconductor Die App 20150054167 - Pendse; Rajendra D. | 2015-02-26 |
Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate Grant 8,941,235 - Pendse January 27, 2 | 2015-01-27 |
Semiconductor device and method of confining conductive bump material during reflow with solder mask patch Grant 8,884,430 - Pendse November 11, 2 | 2014-11-11 |
Semiconductor Device and Method of Forming High Routing Density Interconnect Sites on Substrate App 20140319692 - Pendse; Rajendra D. | 2014-10-30 |
Semiconductor device and method of forming pad layout for flipchip semiconductor die Grant 8,853,001 - Pendse October 7, 2 | 2014-10-07 |
Solder Joint Flip Chip Interconnection App 20140291839 - Pendse; Rajendra D. ;   et al. | 2014-10-02 |
Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate Grant 8,841,779 - Pendse September 23, 2 | 2014-09-23 |
Solder joint flip chip interconnection Grant 8,810,029 - Pendse , et al. August 19, 2 | 2014-08-19 |
Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch App 20140225257 - Pendse; Rajendra D. | 2014-08-14 |
Semiconductor device and method of forming composite bump-on-lead interconnection Grant 8,759,972 - Pendse June 24, 2 | 2014-06-24 |
Semiconductor device and method of confining conductive bump material during reflow with solder mask patch Grant 8,741,766 - Pendse June 3, 2 | 2014-06-03 |
Flip Chip Interconnection Structure App 20140145340 - Pendse; Rajendra D. | 2014-05-29 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20140131869 - Pendse; Rajendra D. | 2014-05-15 |
Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch App 20140113446 - Pendse; Rajendra D. | 2014-04-24 |
Flip chip interconnection structure Grant 8,697,490 - Pendse April 15, 2 | 2014-04-15 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 8,674,500 - Pendse March 18, 2 | 2014-03-18 |
Semiconductor device and method of confining conductive bump material with solder mask patch Grant 8,659,172 - Pendse February 25, 2 | 2014-02-25 |
Solder joint flip chip interconnection having relief structure Grant RE44,761 - Pendse , et al. February 11, 2 | 2014-02-11 |
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection App 20140008792 - Pendse; Rajendra D. | 2014-01-09 |
Bump-on-Lead Flip Chip Interconnection App 20130328189 - Pendse; Rajendra D. | 2013-12-12 |
Solder joint flip chip interconnection Grant RE44,608 - Pendse , et al. November 26, 2 | 2013-11-26 |
Semiconductor Package with Embedded Die App 20130292829 - Pendse; Rajendra D. | 2013-11-07 |
Semiconductor device and method of forming bump structure with multi-layer UBM around bump formation area Grant 8,575,018 - Lin , et al. November 5, 2 | 2013-11-05 |
Semiconductor device and method of forming bump-on-lead interconnection Grant 8,574,959 - Pendse November 5, 2 | 2013-11-05 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant RE44,579 - Pendse November 5, 2 | 2013-11-05 |
Solder joint flip chip interconnection having relief structure Grant RE44,562 - Pendse , et al. October 29, 2 | 2013-10-29 |
Semiconductor Device and Method of Forming Composite Bump-on-Lead Interconnection App 20130277827 - Pendse; Rajendra D. | 2013-10-24 |
Semiconductor Device And Method Of Forming Bump-on-lead Interconnection App 20130277826 - Pendse; Rajendra D. | 2013-10-24 |
Bump-on-lead flip chip interconnection Grant 8,558,378 - Pendse October 15, 2 | 2013-10-15 |
Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch App 20130264704 - Pendse; Rajendra D. | 2013-10-10 |
Bump-on-lead flip chip interconnection Grant RE44,524 - Pendse October 8, 2 | 2013-10-08 |
Semiconductor device and method of forming composite bump-on-lead interconnection Grant RE44,500 - Pendse September 17, 2 | 2013-09-17 |
Thin 3D Fan-Out Embedded Wafer Level Package (EWLB) for Application Processor and Memory Integration App 20130234322 - Pendse; Rajendra D. | 2013-09-12 |
Semiconductor device and method of forming stud bumps over embedded die Grant 8,525,337 - Pendse September 3, 2 | 2013-09-03 |
Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps Grant 8,525,350 - Pendse September 3, 2 | 2013-09-03 |
Semiconductor Device and Method of Forming Bond-on-Lead Interconnection for Mounting Semiconductor Die in FO-WLCSP App 20130214409 - Pagaila; Reza A. ;   et al. | 2013-08-22 |
Bump-on-lead flip chip interconnection Grant RE44,431 - Pendse August 13, 2 | 2013-08-13 |
Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate Grant RE44,438 - Pendse August 13, 2 | 2013-08-13 |
Bump-on-lead flip chip interconnection Grant RE44,377 - Pendse July 16, 2 | 2013-07-16 |
Method of forming a bump-on-lead flip chip interconnection having higher escape routing density Grant RE44,355 - Pendse July 9, 2 | 2013-07-09 |
Semiconductor device and method of confining conductive bump material during reflow with solder mask patch Grant 8,476,761 - Pendse July 2, 2 | 2013-07-02 |
Semiconductor Device and Method of Forming Extended Semiconductor Device with Fan-Out Interconnect Structure to Reduce Complexity of Substrate App 20130161833 - Pendse; Rajendra D. | 2013-06-27 |
Solder bump confinement system for an integrated circuit package Grant 8,466,557 - Lin , et al. June 18, 2 | 2013-06-18 |
Integrated Circuit Package System App 20130127061 - PENDSE; Rajendra D. | 2013-05-23 |
Semiconductor Device and Method of Forming a Metallurgical Interconnection Between a Chip and a Substrate in a Flip Chip Package App 20130113093 - Ahmad; Nazir ;   et al. | 2013-05-09 |
Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP Grant 8,435,834 - Pagaila , et al. May 7, 2 | 2013-05-07 |
Integrated circuit package system for package stacking and method of manufacture therefor Grant 8,409,920 - Pendse , et al. April 2, 2 | 2013-04-02 |
Flip Chip Interconnection having Narrow Interconnection Sites on the Substrate App 20130026628 - Pendse; Rajendra D. | 2013-01-31 |
Semiconductor device and method of forming electrical interconnect with stress relief void Grant 8,350,384 - Pendse January 8, 2 | 2013-01-08 |
Flip Chip Interconnect Solder Mask App 20120319273 - Pendse; Rajendra D. | 2012-12-20 |
Flip Chip Interconnect Solder Mask App 20120319272 - Pendse; Rajendra D. | 2012-12-20 |
Flip chip interconnection having narrow interconnection sites on the substrate Grant 8,318,537 - Pendse November 27, 2 | 2012-11-27 |
Integrated circuit system with stress redistribution layer and method of manufacture thereof Grant 8,304,919 - Pendse , et al. November 6, 2 | 2012-11-06 |
Solder Joint Flip Chip Interconnection Having Relief Structure App 20120273943 - Pendse; Rajendra D. ;   et al. | 2012-11-01 |
Flip chip interconnect solder mask Grant 8,278,144 - Pendse October 2, 2 | 2012-10-02 |
Semiconductor Device and Method of Forming Flipchip Interconnect Structure App 20120241945 - Pendse; Rajendra D. | 2012-09-27 |
Semiconductor Device and Method of Forming Pad Layout for Flipchip Semiconductor Die App 20120241984 - Pendse; Rajendra D. | 2012-09-27 |
Semiconductor Device and Method of Forming High Routing Density Interconnect Sites on Substrate App 20120241946 - Pendse; Rajendra D. | 2012-09-27 |
Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates Grant 8,269,356 - Pendse , et al. September 18, 2 | 2012-09-18 |
Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch App 20120228766 - Pendse; Rajendra D. | 2012-09-13 |
Semiconductor Device and Method of Forming Vertical Interconnect Structure Between Semiconductor Die and Substrate App 20120223428 - Pendse; Rajendra D. | 2012-09-06 |
Packaging Structure and Method App 20120217635 - Ahmad; Nazir ;   et al. | 2012-08-30 |
Bump-on-Lead Flip Chip Interconnection App 20120211887 - Pendse; Rajendra D. | 2012-08-23 |
Flip Chip Interconnection Having Narrow Interconnection Sites on the Substrate App 20120211880 - Pendse; Rajendra D. | 2012-08-23 |
Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch App 20120211882 - Pendse; Rajendra D. | 2012-08-23 |
Semiconductor Device and Method of Forming Narrow Interconnect Sites on Substrate with Elongated Mask Openings App 20120208326 - Pendse; Rajendra D. | 2012-08-16 |
Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps App 20120199972 - Pagaila; Reza A. ;   et al. | 2012-08-09 |
Semiconductor Package with Embedded Die App 20120196406 - Pendse; Rajendra D. | 2012-08-02 |
Semiconductor Device and Method of Dissipating Heat From Thin Package-on-Package Mounted to Substrate App 20120175769 - Pendse; Rajendra D. | 2012-07-12 |
Solder joint flip chip interconnection having relief structure Grant 8,216,930 - Pendse , et al. July 10, 2 | 2012-07-10 |
Integrated circuit packaging system with warpage control system and method of manufacture thereof Grant 8,217,514 - Pendse July 10, 2 | 2012-07-10 |
Semiconductor device and method of confining conductive bump material during reflow with solder mask patch Grant 8,198,186 - Pendse June 12, 2 | 2012-06-12 |
Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps Grant 8,193,035 - Pendse June 5, 2 | 2012-06-05 |
Semiconductor device and method of forming vertical interconnect structure using stud bumps Grant 8,193,034 - Pagaila , et al. June 5, 2 | 2012-06-05 |
Solder Joint Flip Chip Interconnection App 20120133043 - Pendse; Rajendra D. ;   et al. | 2012-05-31 |
Bump-on-lead flip chip interconnection Grant 8,188,598 - Pendse May 29, 2 | 2012-05-29 |
Semiconductor package with embedded die Grant 8,174,119 - Pendse May 8, 2 | 2012-05-08 |
Method of a package on package packaging Grant 8,141,247 - Pendse March 27, 2 | 2012-03-27 |
Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate Grant 8,143,108 - Pendse March 27, 2 | 2012-03-27 |
Semiconductor Device and Method of Forming Composite Bump-on-Lead Interconnection App 20120068337 - Pendse; Rajendra D. | 2012-03-22 |
Semiconductor Device And Method Of Forming Bond-on-lead Interconnection For Mounting Semiconductor Die In Fo-wlcsp App 20120061824 - Pagaila; Reza A. ;   et al. | 2012-03-15 |
Wire bond interconnection and method of manufacture thereof Grant 8,129,263 - Lee , et al. March 6, 2 | 2012-03-06 |
Flip chip interconnection pad layout Grant 8,129,837 - Pendse March 6, 2 | 2012-03-06 |
Solder joint flip chip interconnection Grant 8,129,841 - Pendse , et al. March 6, 2 | 2012-03-06 |
Semiconductor Device and Method of Forming a Metallurgical Interconnection Between a Chip and a Substrate in a Flip Chip Package App 20120049357 - Ahmad; Nazir ;   et al. | 2012-03-01 |
Integrated circuit mount system with solder mask pad Grant 8,124,520 - Kim , et al. February 28, 2 | 2012-02-28 |
Interconnecting a chip and a substrate by bonding pure metal bumps and pure metal spots Grant 8,119,450 - Ahmad , et al. February 21, 2 | 2012-02-21 |
Packaging Structure and Method App 20120013005 - Ahmad; Nazir ;   et al. | 2012-01-19 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20110309500 - Pendse; Rajendra D. | 2011-12-22 |
Semiconductor Device and Method of Forming Flipchip Interconnection Structure with Bump on Partial Pad App 20110304058 - Pendse; Rajendra D. | 2011-12-15 |
Integrated Circuit Package System For Package Stacking And Method Of Manufacture Thereof App 20110306168 - Pendse; Rajendra D. ;   et al. | 2011-12-15 |
Semiconductor device and method of forming composite bump-on-lead interconnection Grant 8,076,232 - Pendse December 13, 2 | 2011-12-13 |
Wire Bond Interconnection And Method Of Manufacture Thereof App 20110266700 - Lee; Hun-Teak ;   et al. | 2011-11-03 |
Flip Chip Interconnection Structure App 20110260321 - Pendse; Rajendra D. | 2011-10-27 |
Semiconductor Device and Method of Forming High Routing Density Interconnect Sites on Substrate App 20110248399 - Pendse; Rajendra D. | 2011-10-13 |
Integrated Circuit System With Stress Redistribution Layer And Method Of Manufacture Thereof App 20110233763 - Pendse; Rajendra D. ;   et al. | 2011-09-29 |
Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask Grant 8,026,128 - Pendse September 27, 2 | 2011-09-27 |
Bump-on-Lead Flip Chip Interconnection App 20110215468 - Pendse; Rajendra D. | 2011-09-08 |
Flip chip interconnection structure Grant 7,994,636 - Pendse August 9, 2 | 2011-08-09 |
Multi-layer semiconductor package with vertical connectors and method of manufacture thereof Grant 7,994,626 - Pendse August 9, 2 | 2011-08-09 |
Wire bond interconnection Grant 7,986,047 - Lee , et al. July 26, 2 | 2011-07-26 |
Bump-on-lead flip chip interconnection Grant 7,973,406 - Pendse July 5, 2 | 2011-07-05 |
Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch App 20110133334 - Pendse; Rajendra D. | 2011-06-09 |
Semiconductor Device and Method of Forming Electrical Interconnect with Stress Relief Void App 20110121464 - Pendse; Rajendra D. | 2011-05-26 |
Wire Bonding Structure And Method That Eliminates Special Wire Bondable Finish And Reduces Bonding Pitch On Substrates App 20110089566 - Pendse; Rajendra D. ;   et al. | 2011-04-21 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20110084386 - Pendse; Rajendra D. | 2011-04-14 |
Semiconductor Device and Method of Dissipating Heat From Thin Package-on-Package Mounted to Substrate App 20110074028 - Pendse; Rajendra D. | 2011-03-31 |
Semiconductor Device and Method of Forming Flipchip Interconnect Structure App 20110074022 - Pendse; Rajendra D. | 2011-03-31 |
Semiconductor Device and Method of Forming Narrow Interconnect Sites on Substrate with Elongated Mask Openings App 20110076809 - Pendse; Rajendra D. | 2011-03-31 |
Semiconductor Device and Method of Forming Pad Layout for Flipchip Semiconductor Die App 20110074047 - Pendse; Rajendra D. | 2011-03-31 |
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection App 20110074024 - Pendse; Rajendra D. | 2011-03-31 |
Bump-on-lead flip chip interconnection Grant 7,901,983 - Pendse March 8, 2 | 2011-03-08 |
Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates Grant 7,868,468 - Pendse , et al. January 11, 2 | 2011-01-11 |
Filp Chip Interconnection Structure with Bump on Partial Pad and Method Thereof App 20100244245 - Pendse; Rajendra D. ;   et al. | 2010-09-30 |
Wire Bond Interconnection App 20100225008 - Lee; Hun-Teak ;   et al. | 2010-09-09 |
Solder Bump Confinement System For An Integrated Circuit Package App 20100193226 - Lin; Yaojian ;   et al. | 2010-08-05 |
Flip Chip Interconnection Having Narrow Interconnection Sites on the Substrate App 20100193947 - Pendse; Rajendra D. | 2010-08-05 |
Flip chip interconnection structure with bump on partial pad and method thereof Grant 7,759,137 - Pendse , et al. July 20, 2 | 2010-07-20 |
Fusible I/O Interconnection Systems and Methods for Flip-Chip Packaging Involving Substrate-Mounted Stud Bumps App 20100178735 - Pendse; Rajendra D. | 2010-07-15 |
Fusible I/O Interconnection Systems and Methods for Flip-Chip Packaging Involving Substrate-Mounted Stud Bumps App 20100176510 - Pendse; Rajendra D. | 2010-07-15 |
Integrated circuit package system including zero fillet resin Grant 7,750,482 - Pendse July 6, 2 | 2010-07-06 |
Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch App 20100164097 - Pendse; Rajendra D. | 2010-07-01 |
Bump-on-Lead Flip Chip Interconnection App 20100164100 - Pendse; Rajendra D. | 2010-07-01 |
Wire bond interconnection Grant 7,745,322 - Lee , et al. June 29, 2 | 2010-06-29 |
Flip chip interconnection Grant 7,736,950 - Pendse , et al. June 15, 2 | 2010-06-15 |
Solder bump confinement system for an integrated circuit package Grant 7,723,225 - Lin , et al. May 25, 2 | 2010-05-25 |
Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof App 20100117230 - Pendse; Rajendra D. ;   et al. | 2010-05-13 |
Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps Grant 7,713,782 - Pendse May 11, 2 | 2010-05-11 |
Solder Joint Flip Chip Interconnection Having Relief Structure App 20100099222 - Pendse; Rajendra D. ;   et al. | 2010-04-22 |
Method of forming a bump-on-lead flip chip interconnection having higher escape routing density Grant 7,700,407 - Pendse April 20, 2 | 2010-04-20 |
Solder Joint Flip Chip Interconnection App 20100065966 - Pendse; Rajendra D. ;   et al. | 2010-03-18 |
Solder joint flip chip interconnection having relief structure Grant 7,659,633 - Pendse , et al. February 9, 2 | 2010-02-09 |
Integrated circuit package system with pedestal structure Grant 7,656,021 - Pendse February 2, 2 | 2010-02-02 |
Semiconductor Device and Method of Forming Composite Bump-on-Lead Interconnection App 20100007019 - Pendse; Rajendra D. | 2010-01-14 |
Multi-layer Semiconductor Package App 20100007002 - Pendse; Rajendra D. | 2010-01-14 |
Semiconductor Wafer and Method of Forming Sacrificial Bump Pad for Wafer Probing During Wafer Sort Test App 20090289253 - Pendse; Rajendra D. | 2009-11-26 |
Multi-layer semiconductor package Grant 7,608,921 - Pendse October 27, 2 | 2009-10-27 |
Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps App 20090261466 - Pagaila; Reza A. ;   et al. | 2009-10-22 |
Flip chip interconnection pad layout Grant 7,605,480 - Pendse October 20, 2 | 2009-10-20 |
Integrated Circuit Packaging System With Warpage Control System And Method Of Manufacture Thereof App 20090250810 - Pendse; Rajendra D. | 2009-10-08 |
Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof App 20090250814 - Pendse; Rajendra D. ;   et al. | 2009-10-08 |
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask App 20090250811 - Pendse; Rajendra D. | 2009-10-08 |
Flip Chip Interconnection Structure with Bump on Partial Pad and Method Thereof App 20090243080 - Pendse; Rajendra D. ;   et al. | 2009-10-01 |
Bump-on-Lead Flip Chip Interconnection App 20090230552 - Pendse; Rajendra D. | 2009-09-17 |
Package-on-package Packaging Method App 20090223048 - Pendse; Rajendra D. | 2009-09-10 |
Packaging Structure and Method App 20090227072 - Ahmad; Nazir ;   et al. | 2009-09-10 |
Flip Chip Interconnection Pad Layout App 20090206493 - Pendse; Rajendra D. | 2009-08-20 |
Flip Chip Interconnect Solder Mask App 20090184419 - Pendse; Rajendra D. | 2009-07-23 |
Package-on-package system Grant 7,550,680 - Pendse June 23, 2 | 2009-06-23 |
Flip chip interconnection App 20090045507 - Pendse; Rajendra D. ;   et al. | 2009-02-19 |
Wire bond interconnection Grant 7,453,156 - Lee , et al. November 18, 2 | 2008-11-18 |
Integrated Circuit Package System For Package Stacking App 20080258289 - Pendse; Rajendra D. ;   et al. | 2008-10-23 |
Integrated Circuit Package System With Heat Sink Spacer Structures App 20080237817 - Pendse; Rajendra D. | 2008-10-02 |
Bump-on-Lead Flip Chip Interconnection App 20080213941 - Pendse; Rajendra D. | 2008-09-04 |
Self-coplanarity bumping shape for flip-chip Grant 7,407,877 - Kweon , et al. August 5, 2 | 2008-08-05 |
Apparatus and process for precise encapsulation of flip chip interconnects App 20080134484 - Pendse; Rajendra D. | 2008-06-12 |
Wire Bond Interconnection App 20080135997 - Lee; Hun-Teak ;   et al. | 2008-06-12 |
Multi-layer semiconductor package App 20080136003 - Pendse; Rajendra D. | 2008-06-12 |
Integrated Circuit Package System With Pedestal Structure App 20080122065 - Pendse; Rajendra D. | 2008-05-29 |
Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps App 20080122117 - Pendse; Rajendra D. | 2008-05-29 |
Semiconductor package with embedded die App 20080111233 - Pendse; Rajendra D. | 2008-05-15 |
Flip chip interconnection pad layout Grant 7,372,170 - Pendse May 13, 2 | 2008-05-13 |
Method and apparatus for flip chip attachment by post collapse re-melt and re-solidification of bumps Grant 7,367,489 - Pendse May 6, 2 | 2008-05-06 |
Bump-on-lead flip chip interconnection Grant 7,368,817 - Pendse May 6, 2 | 2008-05-06 |
Integrated circuit package system with pedestal structure Grant 7,323,774 - Pendse January 29, 2 | 2008-01-29 |
Integrated Circuit Mount System With Solder Mask Pad App 20080014738 - Kim; KyungOe ;   et al. | 2008-01-17 |
Package-on-package System App 20070289777 - Pendse; Rajendra D. | 2007-12-20 |
Wire Bonding Structure and Method that Eliminates Special Wire Bondable Finish and Reduces Bonding Pitch on Substrates App 20070273043 - Pendse; Rajendra D. ;   et al. | 2007-11-29 |
Solder joint flip chip interconnection having relief structure App 20070241464 - Pendse; Rajendra D. ;   et al. | 2007-10-18 |
Solder Bump Confinement System For An Integrated Circuit Package App 20070184578 - Lin; Yaojian ;   et al. | 2007-08-09 |
Integrated Circuit Package System Including Zero Fillet Resin App 20070182018 - Pendse; Rajendra D. | 2007-08-09 |
Integrated Circuit Package System With Pedestal Structure App 20070158820 - Pendse; Rajendra D. | 2007-07-12 |
Integrated Circuit Package System App 20070111376 - Pendse; Rajendra D. | 2007-05-17 |
Solder joint flip chip interconnection App 20070105277 - Pendse; Rajendra D. ;   et al. | 2007-05-10 |
Self-coplanarity bumping shape for flip chip Grant 7,211,901 - Kweon , et al. May 1, 2 | 2007-05-01 |
Packaging structure and method App 20060255474 - Ahmad; Nazir ;   et al. | 2006-11-16 |
Flip chip interconnect solder mask App 20060255473 - Pendse; Rajendra D. | 2006-11-16 |
Flip chip interconnection having narrow interconnection sites on the substrate App 20060216860 - Pendse; Rajendra D. | 2006-09-28 |
Flip chip interconnection pad layout App 20060170093 - Pendse; Rajendra D. | 2006-08-03 |
Flip chip interconnection pad layout App 20060163715 - Pendse; Rajendra D. | 2006-07-27 |
Wire bond interconnection App 20060113665 - Lee; Hun-Teak ;   et al. | 2006-06-01 |
Flip chip interconnection structure Grant 7,033,859 - Pendse April 25, 2 | 2006-04-25 |
Flip chip interconnection pad layout Grant 7,034,391 - Pendse April 25, 2 | 2006-04-25 |
Method for making self-coplanarity bumping shape for flip chip App 20050221535 - Kweon, Young-Do ;   et al. | 2005-10-06 |
Self-coplanarity bumping shape for flip chip App 20050218515 - Kweon, Young-Do ;   et al. | 2005-10-06 |
Bump-on-lead flip chip interconnection App 20050110164 - Pendse, Rajendra D. | 2005-05-26 |
Flip chip interconnection pad layout App 20050098886 - Pendse, Rajendra D. | 2005-05-12 |
Method and apparatus for flip chip attachment by post collapse re-melt and re-solidification of bumps App 20050023327 - Pendse, Rajendra D. | 2005-02-03 |
Flip chip-in-leadframe package and process Grant 6,828,220 - Pendse , et al. December 7, 2 | 2004-12-07 |
Method of forming flip chip interconnection structure Grant 6,815,252 - Pendse November 9, 2 | 2004-11-09 |
Flip chip interconnection structure App 20040212101 - Pendse, Rajendra D. | 2004-10-28 |
Flip chip interconnection structure App 20040212098 - Pendse, Rajendra D. | 2004-10-28 |
Low cost, high performance flip chip package structure App 20040070080 - Pendse, Rajendra D. | 2004-04-15 |
Flip chip-in-leadframe package and process App 20020031902 - Pendse, Rajendra D. ;   et al. | 2002-03-14 |
Packaging structure and method App 20020014702 - Ahmad, Nazir ;   et al. | 2002-02-07 |
Flip chip interconnection structure App 20010055835 - Pendse, Rajendra D. | 2001-12-27 |
High temperature flip chip joining flux that obviates the cleaning process Grant 6,059,894 - Pendse May 9, 2 | 2000-05-09 |
Apparatus and method for precise alignment of a ceramic module to a test apparatus Grant 5,920,200 - Pendse , et al. July 6, 1 | 1999-07-06 |
Radially staggered bond pad arrangements for integrated circuit pad circuitry Grant 5,818,114 - Pendse , et al. October 6, 1 | 1998-10-06 |
Method for forming a controlled impedance flex circuit Grant 5,768,776 - Pendse June 23, 1 | 1998-06-23 |
Cost effective structure and method for interconnecting a flip chip with a substrate Grant 5,764,486 - Pendse June 9, 1 | 1998-06-09 |
Direct chip connection using demountable flip chip package Grant 5,528,462 - Pendse June 18, 1 | 1996-06-18 |
High pin count package for semiconductor device Grant 5,468,994 - Pendse November 21, 1 | 1995-11-21 |
System and method for forming a controlled impedance flex circuit Grant 5,448,020 - Pendse September 5, 1 | 1995-09-05 |
Method for making high pin count package for semiconductor device Grant 5,376,588 - Pendse December 27, 1 | 1994-12-27 |
Integrated circuit demountable TAB apparatus Grant 5,162,975 - Matta , et al. November 10, 1 | 1992-11-10 |
Stress reduction package and process Grant 5,049,976 - Demmin , et al. September 17, 1 | 1991-09-17 |