Heater for semiconductor thermal process
Murata , et al. August 8, 2
U.S. patent number D793,975 [Application Number D/557,678] was granted by the patent office on 2017-08-08 for heater for semiconductor thermal process. This patent grant is currently assigned to HITACHI KOKUSAI ELECTRIC INC.. The grantee listed for this patent is Hitachi Kokusai Electric Inc.. Invention is credited to Hitoshi Murata, Shuhei Saido, Yuichi Wada, Takashi Yahata, Hidenari Yoshida.
| United States Patent | D793,975 |
| Murata , et al. | August 8, 2017 |
Heater for semiconductor thermal process
Claims
CLAIM The ornamental design for a heater for semiconductor thermal process, as shown and described.
| Inventors: | Murata; Hitoshi (Toyama, JP), Wada; Yuichi (Toyama, JP), Yahata; Takashi (Toyama, JP), Yoshida; Hidenari (Toyama, JP), Saido; Shuhei (Toyama, JP) | ||||||||||
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| Applicant: |
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| Assignee: | HITACHI KOKUSAI ELECTRIC INC.
(Tokyo, JP) |
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| Appl. No.: | D/557,678 | ||||||||||
| Filed: | March 10, 2016 |
Foreign Application Priority Data
| Sep 29, 2015 [JP] | 2015-021292 | |||
| Current U.S. Class: | D13/182 |
| Current International Class: | 1303 |
| Field of Search: | ;D13/179,182 ;D15/144,144.1,199 ;D30/151,152 ;D11/130 ;414/935-941,217,147 ;392/407,409,416,418 ;219/385,624,630,638 |
References Cited [Referenced By]
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Attorney, Agent or Firm: Fitch, Even, Tabin & Flannery LLP
Description
FIG. 1 is a front, bottom, right side perspective view of a heater for semiconductor thermal process showing our new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 is a bottom plan view thereof.
The dashed-dot-dashed lines represent the boundary lines of the claimed design.
The broken lines shown in the drawings represent portions of the heater for semiconductor thermal process that form no part of the claimed design.
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