Semiconductor device

Ozawa , et al. April 15, 2

Patent Grant D473198

U.S. patent number D473,198 [Application Number D/159,669] was granted by the patent office on 2003-04-15 for semiconductor device. This patent grant is currently assigned to Kabushiki Kaisha Toshiba. Invention is credited to Toshitsune Iijima, Isao Ozawa.


United States Patent D473,198
Ozawa ,   et al. April 15, 2003

Semiconductor device

Claims

The ornamental design for a semiconductor device, as shown and described.
Inventors: Ozawa; Isao (Chigasaki, JP), Iijima; Toshitsune (Tama, JP)
Assignee: Kabushiki Kaisha Toshiba (Tokyo, JP)
Appl. No.: D/159,669
Filed: April 26, 2002

Foreign Application Priority Data

Oct 26, 2001 [JP] 2001-031432
Current U.S. Class: D13/182
Current International Class: 1303
Field of Search: ;D13/182 ;174/52.1,52.4 ;257/666,678,688,690,691,692,696,697,703,777,778,779,780 ;361/679,728,748,761

References Cited [Referenced By]

U.S. Patent Documents
4602271 July 1986 Dougherty, Jr. et al.
D319045 August 1991 Hasegawa et al.
D319629 September 1991 Hasegawa et al.
D319814 September 1991 Hasegawa et al.
D442150 May 2001 Kang
6300685 October 2001 Hasegawa et al.
6307269 October 2001 Akiyama et al.
D457146 May 2002 Yamamoto et al.
Foreign Patent Documents
900345-5 Aug 1996 JP

Other References

Extract of Denpa Shimbun (newspaper) showing a flash memory (LE8BU166) of Sanyo Denki Jul. 8, 1999..

Primary Examiner: Shooman; Ted
Assistant Examiner: Sikder; Selina
Attorney, Agent or Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.

Description



FIG. 1 is a top plan view of a semiconductor device, showing our new design; a bottom plan view being a mirror image thereof;

FIG. 2 is a right side elevational view thereof; a left side elevational view being a mirror image thereof;

FIG. 3 is a front elevational view thereof; and,

FIG. 4 is a rear elevational view thereof.

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