Bouche; Guillaume

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bouche; Guillaume.The latest application filed is for "stacked vias with bottom portions formed using selective growth".

Company Profile

31.147.138

Bouche; Guillaume - Portland OR
BOUCHE; Guillaume - Hillsboro OR
BOUCHE; Guillaume - Bruxelles BE
Bouche; Guillaume - Brussels BE
Bouche; Guillaume - Albany NY
Bouche; Guillaume - Brussel BE
Bouche; Guillaume - Malta NY
Bouche; Guillaume - Beaverton OR
Bouche; Guillaume - Grenoble N/A FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Source/drain regions in integrated circuit structures Grant 11,450,736 - Ma , et al. September 20, 2	2022-09-20
Stacked Vias With Bottom Portions Formed Using Selective Growth App 20220293517 - Wei; Andy Chih-Hung ; et al.	2022-09-15
Stacked Vias With Bottom Portions Formed Using Subtractive Patterning App 20220293516 - Wei; Andy Chih-Hung ; et al.	2022-09-15
Device contact sizing in integrated circuit structures Grant 11,430,866 - Bouche , et al. August 30, 2	2022-08-30
Isolation Regions In Integrated Circuit Structures App 20220231121 - Bouche; Guillaume ; et al.	2022-07-21
Gate-all-around Integrated Circuit Structures Having Germanium-diffused Nanoribbon Channel Structures App 20220199774 - WEI; Andy Chih-Hung ; et al.	2022-06-23
Transistor Arrangements With Stacked Trench Contacts And Gate Straps App 20220190129 - Wei; Andy Chih-Hung ; et al.	2022-06-16
Self Aligned Buried Power Rail App 20220181198 - LICAUSI; Nicholas V. ; et al.	2022-06-09
Isolation regions in integrated circuit structures Grant 11,342,409 - Bouche , et al. May 24, 2	2022-05-24
Buried Power Rails With Self-aligned Vias To Trench Contacts App 20220157722 - Bouche; Guillaume ; et al.	2022-05-19
Use Of A Placeholder For Backside Contact Formation For Transistor Arrangements App 20220139911 - Wei; Andy Chih-Hung ; et al.	2022-05-05
Application Of Self-assembled Monolayers For Improved Via Integration App 20220130721 - Bouche; Guillaume ; et al.	2022-04-28
Stitching To Enable Dense Interconnect Arrangements App 20220130758 - Bouche; Guillaume ; et al.	2022-04-28
Self aligned buried power rail Grant 11,309,210 - Licausi , et al. April 19, 2	2022-04-19
Multiple fin finFET with low-resistance gate structure Grant 11,264,463 - Bouche , et al. March 1, 2	2022-03-01
Non-planar Transistor Arrangements With Asymmetric Gate Enclosures App 20210384299 - Ma; Sean T. ; et al.	2021-12-09
Back End Of Line Integration For Self-aligned Vias App 20210366823 - Bouche; Guillaume ; et al.	2021-11-25
Device Contact Sizing In Integrated Circuit Structures App 20210305370 - Bouche; Guillaume ; et al.	2021-09-30
Isolation Regions In Integrated Circuit Structures App 20210305362 - Bouche; Guillaume ; et al.	2021-09-30
Device Contacts In Integrated Circuit Structures App 20210305380 - Bouche; Guillaume ; et al.	2021-09-30
Source/drain Regions In Integrated Circuit Structures App 20210305365 - Ma; Sean T. ; et al.	2021-09-30
Gate Spacing In Integrated Circuit Structures App 20210305244 - Bouche; Guillaume ; et al.	2021-09-30
Fabrication Of Non-planar Silicon Germanium Transistors Using Silicon Replacement App 20210296506 - Wei; Andy Chih-Hung ; et al.	2021-09-23
Method for forming an interconnection structure Grant 11,127,627 - Lazzarino , et al. September 21, 2	2021-09-21
Hybrid optical and EUV lithography Grant 11,061,315 - Zeng , et al. July 13, 2	2021-07-13
Semiconductor device and method Grant 10,833,161 - Sherazi , et al. November 10, 2	2020-11-10
Multiple Fin Finfet With Low-resistance Gate Structure App 20200286998 - Bouche; Guillaume ; et al.	2020-09-10
Transistor with recessed cross couple for gate contact over active region integration Grant 10,770,388 - Xie , et al. Sep	2020-09-08
Multiple fin finFET with low-resistance gate structure Grant 10,700,170 - Bouche , et al.	2020-06-30
Self-aligned Cuts In An Interconnect Structure App 20200194306 - Xie; Ruilong ; et al.	2020-06-18
Self-aligned cuts in an interconnect structure Grant 10,685,874 - Xie , et al.	2020-06-16
Method For Forming An Interconnection Structure App 20200168500 - Lazzarino; Frederic ; et al.	2020-05-28
Hybrid Optical And Euv Lithography App 20200159105 - Zeng; Jia ; et al.	2020-05-21
Merged gate and source/drain contacts in a semiconductor device Grant 10,644,136 - Bouche , et al.	2020-05-05
Interrupted small block shape Grant 10,586,762 - Bouche , et al.	2020-03-10
Work function metal patterning for N-P spaces between active nanostructures using unitary isolation pillar Grant 10,566,248 - Chanemougame , et al. Feb	2020-02-18
Methods, apparatus and system for a passthrough-based architecture Grant 10,559,503 - Bouche , et al. Feb	2020-02-11
Work Function Metal Patterning For N-p Spaces Between Active Nanostructures Using Unitary Isolation Pillar App 20200035567 - Chanemougame; Daniel ; et al.	2020-01-30
Self Aligned Buried Power Rail App 20200006112 - LICAUSI; Nicholas V. ; et al.	2020-01-02
Transistor With Recessed Cross Couple For Gate Contact Over Active Region Integration App 20190385946 - Xie; Ruilong ; et al.	2019-12-19
Self aligned buried power rail Grant 10,475,692 - Licausi , et al. Nov	2019-11-12
Method of patterning target layer Grant 10,460,067 - Sherazi , et al. Oc	2019-10-29
Stacked elongated nanoshapes of different semiconductor materials and structures that incorporate the nanoshapes Grant 10,453,750 - Pawlak , et al. Oc	2019-10-22
Method Of Patterning Target Layer App 20190303525 - Sherazi; Syed Muhammad Yasser ; et al.	2019-10-03
Precut metal lines Grant 10,396,026 - Wei , et al. A	2019-08-27
Self-aligned gate cut isolation Grant 10,366,930 - Xie , et al. July 30, 2	2019-07-30
Methods Of Patterning Dielectric Layers For Metallization And Related Structures App 20190229059 - Bouche; Guillaume	2019-07-25
Semiconductor Device and Method App 20190229196 - Sherazi; Syed Muhammad Yasser ; et al.	2019-07-25
Methods of patterning dielectric layers for metallization and related structures Grant 10,347,583 - Bouche July 9, 2	2019-07-09
Interrupted Small Block Shape App 20190206787 - BOUCHE; Guillaume ; et al.	2019-07-04
Methods Of Patterning Dielectric Layers For Metallization And Related Structures App 20190206795 - Bouche; Guillaume	2019-07-04
Methods Of Forming Conductive Lines And Vias And The Resulting Structures App 20190139823 - Chen; Hsueh-Chung ; et al.	2019-05-09
Self-aligned Gate Isolation App 20190139830 - XIE; Ruilong ; et al.	2019-05-09
Devices and methods for forming cross coupled contacts Grant 10,262,941 - Bouche , et al.	2019-04-16
Air-gap gate sidewall spacer and method Grant 10,249,728 - Chanemougame , et al.	2019-04-02
Gate pickup method using metal selectivity Grant 10,242,867 - Bouche , et al.	2019-03-26
Method, apparatus and system for a high density middle of line flow Grant 10,236,350 - Bouche , et al.	2019-03-19
Cut-first approach with self-alignment during line patterning Grant 10,229,850 - Bouche	2019-03-12
Methods of forming an air gap adjacent a gate of a transistor and a gate contact above the active region of the transistor Grant 10,211,100 - Xie , et al. Feb	2019-02-19
Methods of forming a semiconductor device with a gate contact positioned above the active region Grant 10,204,994 - Xie , et al. Feb	2019-02-12
Self-aligned metal wire on contact structure and method for forming same Grant 10,199,271 - Xie , et al. Fe	2019-02-05
Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias Grant 10,181,420 - Stephens , et al. Ja	2019-01-15
Stacked Elongated Nanoshapes Of Different Semiconductor Materials And Structures That Incorporate The Nanoshapes App 20180374753 - PAWLAK; BARTLOMIEJ J. ; et al.	2018-12-27
Gate Pickup Method Using Metal Selectivity App 20180337037 - BOUCHE; Guillaume ; et al.	2018-11-22
Self Aligned Buried Power Rail App 20180294267 - LICAUSI; Nicholas V. ; et al.	2018-10-11
Methods Of Forming A Semiconductor Device With A Gate Contact Positioned Above The Active Region App 20180286956 - Xie; Ruilong ; et al.	2018-10-04
Methods Of Forming An Air Gap Adjacent A Gate Of A Transistor And A Gate Contact Above The Active Region Of The Transistor App 20180277430 - Xie; Ruilong ; et al.	2018-09-27
Interconnection lines having variable widths and partially self-aligned continuity cuts Grant 10,083,858 - Licausi , et al. September 25, 2	2018-09-25
Method for fabricating a FinFET metallization architecture using a self-aligned contact etch Grant 10,069,011 - Bouche September 4, 2	2018-09-04
Air-gap Gate Sidewall Spacer And Method App 20180240883 - CHANEMOUGAME; DANIEL ; et al.	2018-08-23
Transistor contacts self-aligned in two dimensions Grant 10,056,373 - Wei , et al. August 21, 2	2018-08-21
Siloxane and organic-based MOL contact patterning Grant 10,056,458 - Maeng , et al. August 21, 2	2018-08-21
Merged Gate And Source/drain Contacts In A Semiconductor Device App 20180233585 - Bouche; Guillaume ; et al.	2018-08-16
Contact line having insulating spacer therein and method of forming same Grant 10,049,985 - Basker , et al. August 14, 2	2018-08-14
Devices With Chamfer-less Vias Multi-patterning And Methods For Forming Chamfer-less Vias App 20180226294 - STEPHENS; Jason Eugene ; et al.	2018-08-09
Apparatus and method for forming interconnection lines having variable pitch and variable widths Grant 10,043,703 - Bouche , et al. August 7, 2	2018-08-07
Air-gap Gate Sidewall Spacer And Method App 20180204927 - CHANEMOUGAME; DANIEL ; et al.	2018-07-19
Air-gap gate sidewall spacer and method Grant 10,026,824 - Chanemougame , et al. July 17, 2	2018-07-17
Inner spacer formation for nanosheet field-effect transistors with tall suspensions Grant 10,014,390 - Bouche , et al. July 3, 2	2018-07-03
Apparatus And Method For Forming Interconnection Lines Having Variable Pitch And Variable Widths App 20180174894 - BOUCHE; Guillaume ; et al.	2018-06-21
Interconnection Lines Having Variable Widths And Partially Self-aligned Continuity Cuts App 20180174896 - LICAUSI; Nicholas Vincent ; et al.	2018-06-21
Interconnection Cells Having Variable Width Metal Lines And Fully-self Aligned Variable Length Continuity Cuts App 20180174895 - LICAUSI; Nicholas Vincent ; et al.	2018-06-21
Interconnection cells having variable width metal lines and fully-self aligned variable length continuity cuts Grant 10,002,786 - Licausi , et al. June 19, 2	2018-06-19
Method For Fabricating A Finfet Metallization Architecture Using A Self-aligned Contact Etch App 20180138308 - BOUCHE; Guillaume	2018-05-17
Merged gate and source/drain contacts in a semiconductor device Grant 9,960,256 - Bouche , et al. May 1, 2	2018-05-01
Method Of Patterning Target Layer App 20180113975 - Sherazi; Syed Muhammad Yasser ; et al.	2018-04-26
Self-aligned contact etch for fabricating a FinFET Grant 9,905,473 - Bouche , et al. February 27, 2	2018-02-27
Cap layer for spacer-constrained epitaxially grown material on fins of a FinFET device Grant 9,899,268 - Wei , et al. February 20, 2	2018-02-20
Interconnection lines having variable widths and partially self-aligned continuity cuts Grant 9,887,127 - Licausi , et al. February 6, 2	2018-02-06
Methods, Apparatus And System For A Passthrough-based Architecture App 20180033701 - Bouche; Guillaume ; et al.	2018-02-01
Methods For Forming Mask Layers Using A Flowable Carbon-containing Silicon Dioxide Material App 20180005893 - Cao; Huy ; et al.	2018-01-04
Contact Line Having Insulating Spacer Therein And Method Of Forming Same App 20170373007 - Basker; Veeraraghavan S. ; et al.	2017-12-28
Cut first alternative for 2D self-aligned via Grant 9,852,984 - Bouche , et al. December 26, 2	2017-12-26
Method of patterning pillars to form variable continuity cuts in interconnection lines of an integrated circuit Grant 9,852,986 - Stephens , et al. December 26, 2	2017-12-26
Methods of forming a high-k contact liner to improve effective via separation distance and the resulting devices Grant 9,825,031 - Bouche , et al. November 21, 2	2017-11-21
Contact Line Having Insulating Spacer Therein And Method Of Forming Same App 20170330834 - Basker; Veeraraghavan S. ; et al.	2017-11-16
Methods, apparatus and system for a passthrough-based architecture Grant 9,818,651 - Bouche , et al. November 14, 2	2017-11-14
Method for fabricating a finFET metallization architecture using a self-aligned contact etch Grant 9,818,876 - Bouche November 14, 2	2017-11-14
Apparatus and method of forming self-aligned cuts in a non-mandrel line of an array of metal lines Grant 9,818,640 - Stephens , et al. November 14, 2	2017-11-14
Method of forming a pattern for interconnection lines and associated continuity blocks in an integrated circuit Grant 9,818,623 - Stephens , et al. November 14, 2	2017-11-14
Apparatus and method of forming self-aligned cuts in mandrel and a non-mandrel lines of an array of metal lines Grant 9,818,641 - Bouche , et al. November 14, 2	2017-11-14
Methods to control fin tip placement Grant 9,812,324 - Zhuang , et al. November 7, 2	2017-11-07
Contact line having insulating spacer therein and method of forming same Grant 9,812,400 - Basker , et al. November 7, 2	2017-11-07
Interconnect structure for semiconductor devices with multiple power rails and redundancy Grant 9,812,396 - Stephens , et al. November 7, 2	2017-11-07
Interconnection cells having variable width metal lines and fully-self aligned continuity cuts Grant 9,812,351 - Licausi , et al. November 7, 2	2017-11-07
Method of forming semiconductor structure including suspended semiconductor layer and resulting structure Grant 9,805,988 - Bentley , et al. October 31, 2	2017-10-31
Devices And Methods For Forming Cross Coupled Contacts App 20170309560 - BOUCHE; Guillaume ; et al.	2017-10-26
Methods for forming mask layers using a flowable carbon-containing silicon dioxide material Grant 9,793,169 - Cao , et al. October 17, 2	2017-10-17
Method of forming ANA regions in an integrated circuit Grant 9,786,545 - Bouche , et al. October 10, 2	2017-10-10
Compensating for lithographic limitations in fabricating semiconductor interconnect structures Grant 9,779,943 - Bouche , et al. October 3, 2	2017-10-03
Method Of Forming A Pattern For Interconnection Lines And Associated Continuity Blocks In An Integrated Circuit App 20170278720 - STEPHENS; Jason Eugene ; et al.	2017-09-28
Methods, Apparatus And System For A Passthrough-based Architecture App 20170263506 - Bouche; Guillaume ; et al.	2017-09-14
Method, Apparatus And System For A High Density Middle Of Line Flow App 20170263715 - Bouche; Guillaume ; et al.	2017-09-14
Compensating For Lithographic Limitations In Fabricating Semiconductor Interconnect Structures App 20170250080 - BOUCHE; Guillaume ; et al.	2017-08-31
Transistor Contacts Self-aligned In Two Dimensions App 20170221886 - Wei; Andy Chih-Hung ; et al.	2017-08-03
Siloxane And Organic-based Mol Contact Patterning App 20170200792 - MAENG; Chang Ho ; et al.	2017-07-13
Combined SADP fins for semiconductor devices and methods of making the same Grant 9,691,775 - Licausi , et al. June 27, 2	2017-06-27
Method of forming a pattern for interconnection lines in an integrated circuit wherein the pattern includes gamma and beta block mask portions Grant 9,691,626 - Bouche , et al. June 27, 2	2017-06-27
Self-aligned back end of line cut Grant 9,679,805 - Bouche , et al. June 13, 2	2017-06-13
Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect lines Grant 9,679,809 - Kye , et al. June 13, 2	2017-06-13
Vertical semiconductor device having frontside interconnections Grant 9,673,316 - Blair , et al. June 6, 2	2017-06-06
Pass-through contact using silicide Grant 9,666,488 - Neogi , et al. May 30, 2	2017-05-30
Transistor contacts self-aligned two dimensions Grant 9,660,040 - Wei , et al. May 23, 2	2017-05-23
Integrated circuits with dual silicide contacts and methods for fabricating same Grant 9,660,075 - Koh , et al. May 23, 2	2017-05-23
Self-aligned gate contact formation Grant 9,640,625 - Bouche , et al. May 2, 2	2017-05-02
FinFET device including silicon oxycarbon isolation structure Grant 9,589,829 - Cao , et al. March 7, 2	2017-03-07
Self-aligned Back End Of Line Cut App 20170047247 - Bouche; Guillaume ; et al.	2017-02-16
Self-aligned Via Process Flow App 20170004999 - Bouche; Guillaume ; et al.	2017-01-05
Methods for fabricating integrated circuits using multi-patterning processes Grant 9,530,689 - Civay , et al. December 27, 2	2016-12-27
FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack Grant 9,520,395 - Bouche , et al. December 13, 2	2016-12-13
Self-aligned back end of line cut Grant 9,508,642 - Bouche , et al. November 29, 2	2016-11-29
Self-aligned via process flow Grant 9,502,293 - Bouche , et al. November 22, 2	2016-11-22
Borderless contact formation through metal-recess dual cap integration Grant 9,502,528 - Bouche , et al. November 22, 2	2016-11-22
2d Self-aligned Via First Process Flow App 20160329278 - BOUCHE; Guillaume ; et al.	2016-11-10
Methods of forming nanowire devices with doped extension regions and the resulting devices Grant 9,490,340 - Koh , et al. November 8, 2	2016-11-08
Cut First Alternative For 2d Self-aligned Via App 20160322298 - BOUCHE; Guillaume ; et al.	2016-11-03
Methods For Fabricating Integrated Circuits Using Multi-patterning Processes App 20160300754 - Civay; Deniz Elizabeth ; et al.	2016-10-13
Self-aligned contacts and methods of fabrication Grant 9,460,963 - Wells , et al. October 4, 2	2016-10-04
Method for creating self-aligned transistor contacts Grant 9,461,128 - Zaleski , et al. October 4, 2	2016-10-04
10 nm alternative N/P doped fin for SSRW scheme Grant 9,455,204 - Cao , et al. September 27, 2	2016-09-27
LDMOS with field plate connected to gate Grant 9,450,074 - Yang , et al. September 20, 2	2016-09-20
Cap Layer For Spacer-constrained Epitaxially Grown Material On Fins Of A Finfet Device App 20160268171 - Wei; Andy C. ; et al.	2016-09-15
Fabricating stacked nanowire, field-effect transistors Grant 9,443,931 - Zang , et al. September 13, 2	2016-09-13
Methods of forming nanowire devices with spacers and the resulting devices Grant 9,431,512 - Koh , et al. August 30, 2	2016-08-30
Cut first alternative for 2D self-aligned via Grant 9,425,097 - Bouche , et al. August 23, 2	2016-08-23
Forming merged lines in a metallization layer by replacing sacrificial lines with conductive lines Grant 9,412,655 - Bouche , et al. August 9, 2	2016-08-09
Forming Merged Lines In A Metallization Layer By Replacing Sacrificial Lines With Conductive Lines App 20160225666 - Bouche; Guillaume ; et al.	2016-08-04
Method for creating self-aligned compact contacts in an IC device meeting fabrication spacing constraints Grant 9,406,775 - Bouche , et al. August 2, 2	2016-08-02
Methods for fabricating FinFET integrated circuits with simultaneous formation of local contact openings Grant 9,397,004 - Bouche , et al. July 19, 2	2016-07-19
Opposite polarity borderless replacement metal contact scheme Grant 9,390,979 - Wei , et al. July 12, 2	2016-07-12
Semiconductor Device Metal-Insulator-Semiconductor Contacts with Interface Layers and Methods for Forming the Same App 20160181380 - Joshi; Amol ; et al.	2016-06-23
Integrated Circuits With Dual Silicide Contacts And Methods For Fabricating Same App 20160172493 - Koh; Shao Ming ; et al.	2016-06-16
2D self-aligned via first process flow Grant 9,362,165 - Bouche , et al. June 7, 2	2016-06-07
Fabricating Stacked Nanowire, Field-effect Transistors App 20160155800 - ZANG; Hui ; et al.	2016-06-02
Self-aligned Via Process Flow App 20160141206 - Bouche; Guillaume ; et al.	2016-05-19
Precut Metal Lines App 20160118341 - Wei; Andy Chih-Hung ; et al.	2016-04-28
Semiconductor contacts and methods of fabrication Grant 9,305,785 - Wei , et al. April 5, 2	2016-04-05
Integrated circuits with nanowires and methods of manufacturing the same Grant 9,306,019 - Wan , et al. April 5, 2	2016-04-05
Method For Creating Self-aligned Transistor Contacts App 20160093704 - Zaleski; Mark A. ; et al.	2016-03-31
Integrated circuits with dual silicide contacts and methods for fabricating same Grant 9,293,462 - Koh , et al. March 22, 2	2016-03-22
Integrated Circuits With Metal-titanium Oxide Contacts And Fabrication Methods App 20160079168 - NIIMI; Hiroaki ; et al.	2016-03-17
Patterning Multiple, Dense Features In A Semiconductor Device Using A Memorization Layer App 20160079242 - BOUCHE; GUILLAUME ; et al.	2016-03-17
Opposite Polarity Borderless Replacement Metal Contact Scheme App 20160071774 - Wei; Andy Chih-Hung ; et al.	2016-03-10
Borderless Contact Formation Through Metal-recess Dual Cap Integration App 20160064514 - Bouche; Guillaume ; et al.	2016-03-03
Methods for fabricating integrated circuits using directed self-assembly Grant 9,275,896 - Civay , et al. March 1, 2	2016-03-01
Fabricating stacked nanowire, field-effect transistors Grant 9,276,064 - Zang , et al. March 1, 2	2016-03-01
Precut Metal Lines App 20160056075 - Wei; Andy Chih-Hung ; et al.	2016-02-25
Self-aligned Back End Of Line Cut App 20160056104 - Bouche; Guillaume ; et al.	2016-02-25
Transistor Contacts Self-aligned Two Dimensions App 20160049481 - Wei; Andy Chih-Hung ; et al.	2016-02-18
Integrated Circuits With Dual Silicide Contacts And Methods For Fabricating Same App 20160049490 - Bouche; Guillaume ; et al.	2016-02-18
Integrated Circuits With Nanowires And Methods Of Manufacturing The Same App 20160049489 - Wan; Jing ; et al.	2016-02-18
Precut metal lines Grant 9,263,325 - Wei , et al. February 16, 2	2016-02-16
Methods For Fabricating Integrated Circuits Using Directed Self-assembly App 20160027685 - Civay; Deniz Elizabeth ; et al.	2016-01-28
Method for creating self-aligned transistor contacts Grant 9,236,437 - Zaleski , et al. January 12, 2	2016-01-12
Semiconductor Contacts And Methods Of Fabrication App 20150380250 - Wei; Andy Chih-Hung ; et al.	2015-12-31
Patterning multiple, dense features in a semiconductor device using a memorization layer Grant 9,224,842 - Bouche , et al. December 29, 2	2015-12-29
Integrated circuits with metal-titanium oxide contacts and fabrication methods Grant 9,224,638 - Niimi , et al. December 29, 2	2015-12-29
Methods Of Forming Nanowire Devices With Spacers And The Resulting Devices App 20150372111 - Koh; Shao-Ming ; et al.	2015-12-24
Methods Of Forming Nanowire Devices With Doped Extension Regions And The Resulting Devices App 20150372115 - Koh; Shao-Ming ; et al.	2015-12-24
Integrated monolithic galvanic isolator Grant 9,209,091 - Harper , et al. December 8, 2	2015-12-08
Transistor contacts self-aligned in two dimensions Grant 9,202,751 - Wei , et al. December 1, 2	2015-12-01
Merged Gate And Source/drain Contacts In A Semiconductor Device App 20150340467 - Bouche; Guillaume ; et al.	2015-11-26
Integrated circuits with dual silicide contacts and methods for fabricating same Grant 9,196,694 - Bouche , et al. November 24, 2	2015-11-24
Methods Of Forming Nanowire Devices With Metal-insulator-semiconductor Source/drain Contacts And The Resulting Devices App 20150333162 - Bouche; Guillaume ; et al.	2015-11-19
Devices And Methods Of Forming Finfets With Self Aligned Fin Formation App 20150333067 - WAN; Jing ; et al.	2015-11-19
Integrated Circuits With Metal-titanium Oxide Contacts And Fabrication Methods App 20150325473 - NIIMI; Hiroaki ; et al.	2015-11-12
Integrated circuits with metal-insulator-semiconductor (MIS) contact structures and methods for fabricating same Grant 9,177,805 - Bouche , et al. November 3, 2	2015-11-03
Multiple Fin Finfet With Low-resistance Gate Structure App 20150311199 - Bouche; Guillaume ; et al.	2015-10-29
Self-aligned Gate Contact Formation App 20150311082 - Bouche; Guillaume ; et al.	2015-10-29
LDMOS with thick interlayer-dielectric layer Grant 9,171,916 - Snyder , et al. October 27, 2	2015-10-27
Self-aligned Contact Openings Over Fins Of A Semiconductor Device App 20150303295 - Wan; Jing ; et al.	2015-10-22
Patterning Multiple, Dense Features In A Semiconductor Device Using A Memorization Layer App 20150303273 - Bouche; Guillaume ; et al.	2015-10-22
Transistor Contacts Self-aligned In Two Dimensions App 20150287636 - Wei; Andy Chih-Hung ; et al.	2015-10-08
Self-aligned Contacts And Methods Of Fabrication App 20150279738 - Wells; Gabriel Padron ; et al.	2015-10-01
Devices and methods of forming finFETs with self aligned fin formation Grant 9,147,696 - Wan , et al. September 29, 2	2015-09-29
Replacement low-K spacer Grant 9,129,987 - Wan , et al. September 8, 2	2015-09-08
Method For Creating Self-aligned Transistor Contacts App 20150236106 - Zaleski; Mark A. ; et al.	2015-08-20
Integrated Circuits With Metal-insulator-semiconductor (mis) Contact Structures And Methods For Fabricating Same App 20150214059 - Bouche; Guillaume ; et al.	2015-07-30
Replacement Low-k Spacer App 20150214330 - WAN; Jing ; et al.	2015-07-30
Iintegrated Circuits With Dual Silicide Contacts And Methods For Fabricating Same App 20150214228 - Koh; Shao Ming ; et al.	2015-07-30
Methods For Fabricating Finfet Integrated Circuits With Simultaneous Formation Of Local Contact Openings App 20150214113 - Bouche; Guillaume ; et al.	2015-07-30
Completing middle of line integration allowing for self-aligned contacts Grant 9,093,557 - Bouche , et al. July 28, 2	2015-07-28
Devices And Methods Of Forming Finfets With Self Aligned Fin Formation App 20150091094 - WAN; Jing ; et al.	2015-04-02
Integrated Circuits With Dual Silicide Contacts And Methods For Fabricating Same App 20150091093 - Bouche; Guillaume ; et al.	2015-04-02
Completing Middle Of Line Integration Allowing For Self-aligned Contacts App 20150041909 - Bouche; Guillaume ; et al.	2015-02-12
Method of forming a cooling device for an integrated circuit Grant 8,804,300 - Bouche August 12, 2	2014-08-12
Method to control BAW resonator top electrode edge during patterning Grant 8,522,411 - Bouche , et al. September 3, 2	2013-09-03
BAW resonator filter bandwidth and out-of-band frequency rejection Grant 8,525,620 - Stuebing , et al. September 3, 2	2013-09-03
Cooling Device For An Integrated Circuit App 20120187519 - Bouche; Guillaume	2012-07-26
Process of making a BAW resonator bi-layer top electrode Grant 8,201,311 - Hamou , et al. June 19, 2	2012-06-19
Integrated circuit cooling device Grant 8,164,183 - Bouche April 24, 2	2012-04-24
Microresonator Grant 8,159,109 - Abele , et al. April 17, 2	2012-04-17
Bragg mirror and method for making same Grant 8,149,500 - Godshalk , et al. April 3, 2	2012-04-03
Micro-component packaging process and set of micro-components resulting from this process Grant 7,999,366 - Bouche , et al. August 16, 2	2011-08-16
Planarization method in the fabrication of a circuit Grant 7,966,722 - Hart , et al. June 28, 2	2011-06-28
Assembly of a microswitch and of an acoustic resonator Grant 7,960,900 - Caruyer , et al. June 14, 2	2011-06-14
Orientation-dependent etching of deposited AlN for structural use and sacrificial layers in MEMS Grant 7,960,200 - Bouche , et al. June 14, 2	2011-06-14
Process for packaging micro-components using a matrix Grant 7,897,436 - Bouche , et al. March 1, 2	2011-03-01
Antenna having a dielectric structure for a simplified fabrication process Grant 7,876,283 - Bouche , et al. January 25, 2	2011-01-25
Microresonator Grant 7,858,407 - Abele , et al. December 28, 2	2010-12-28
Microresonator App 20100295416 - Abele; Nicolas ; et al.	2010-11-25
Bulk acoustic resonators with multi-layer electrodes Grant 7,768,364 - Hart , et al. August 3, 2	2010-08-03
Support for acoustic resonator and corresponding integrated circuit Grant 7,737,804 - Bouche , et al. June 15, 2	2010-06-15
BAW resonator bi-layer top electrode with zero etch undercut Grant 7,737,612 - Hamou , et al. June 15, 2	2010-06-15
Bragg Mirror and Method for Making Same App 20100123948 - Godshalk; Ed ; et al.	2010-05-20
Bragg mirror optimized for shear waves Grant 7,684,109 - Godshalk , et al. March 23, 2	2010-03-23
Planarization Methods App 20100005654 - Hart; David ; et al.	2010-01-14
BAW resonator filter bandwidth and out-of-band frequency rejection Grant 7,646,265 - Stuebing , et al. January 12, 2	2010-01-12
Bulk Acoustic Resonators with Multi-Layer Electrodes App 20090302973 - Hart; David ; et al.	2009-12-10
Method to control BAW resonator top electrode edge during patterning Grant 7,612,488 - Bouche , et al. November 3, 2	2009-11-03
BAW resonator bi-layer top electrode with zero etch undercut Grant 7,600,303 - Hamou , et al. October 13, 2	2009-10-13
Methods of contacting the top layer of a BAW resonator Grant 7,567,024 - Wall , et al. July 28, 2	2009-07-28
Method for forming a variable capacitor Grant 7,565,725 - Bouche , et al. July 28, 2	2009-07-28
Acoustic resonator device Grant 7,550,900 - Bouche , et al. June 23, 2	2009-06-23
Microresonator App 20090152998 - Abele; Nicolas ; et al.	2009-06-18
Process For Obtaining A Thin, Insulating, Soft Magnetic Film Of High Magnetization, Corresponding Film And Corresponding Integrated Circuit App 20090140384 - Bouche; Guillaume ; et al.	2009-06-04
Methods of Contacting the Top Layer of a BAW Resonator App 20090079302 - Wall; Ralph N. ; et al.	2009-03-26
Process for obtaining a thin, insulating, soft magnetic film of high magnetization Grant 7,504,007 - Bouche , et al. March 17, 2	2009-03-17
Piezoelectric deposition for BAW resonators App 20090053401 - Uppili; Sudarsan ; et al.	2009-02-26
Assembly of a Microswitch and of an Acoustic Resonator App 20080283373 - Caruyer; Gregory ; et al.	2008-11-20
Orientation-dependent etching of deposited AIN for structural use and sacrificial layers in MEMS App 20080268575 - Bouche; Guillaume ; et al.	2008-10-30
BAW Resonator Filter Bandwidth and Out-of-Band Frequency Rejection App 20080252397 - Stuebing; Carlton ; et al.	2008-10-16
Bragg mirror optimized for shear waves App 20080204857 - Godshalk; Ed ; et al.	2008-08-28
Support and decoupling structure for an acoustic resonator, acoustic resonator and corresponding integrated circuit Grant 7,391,143 - Bouche , et al. June 24, 2	2008-06-24
Acoustic resonator support, acoustic resonator and corresponding integrated circuit Grant 7,391,142 - Bouche , et al. June 24, 2	2008-06-24
Integrated Circuit Cooling Device App 20070278663 - Bouche; Guillaume	2007-12-06
Production of an integrated capacitor Grant 7,303,953 - Bouche , et al. December 4, 2	2007-12-04
Microelectromechanical system able to switch between two stable positions Grant 7,268,653 - Bouche September 11, 2	2007-09-11
Support and decoupling structure for an acoustic resonator, acoustic resonator and corresponding integrated circuit App 20070182284 - Bouche; Guillaume ; et al.	2007-08-09
Antenna having a dielectric structure for a simplified fabrication process App 20070152884 - Bouche; Guillaume ; et al.	2007-07-05
Support for acoustic resonator and corresponding integrated circuit App 20070152777 - Bouche; Guillaume ; et al.	2007-07-05
Method for forming a variable capacitor App 20070087513 - Bouche; Guillaume ; et al.	2007-04-19
Method of making a variable capacitor component Grant 7,200,908 - Cassett , et al. April 10, 2	2007-04-10
Electronic component having a resonator and fabrication process Grant 7,180,224 - Bouche , et al. February 20, 2	2007-02-20
Method for forming a tunable piezoelectric microresonator Grant 7,179,392 - Robert , et al. February 20, 2	2007-02-20
Titanium-tungsten alloy based mirrors and electrodes in bulk acoustic wave devices App 20070035364 - Sridhar; Uppili ; et al.	2007-02-15
Acoustic resonator support, acoustic resonator and corresponding integrated circuit App 20060226736 - Bouche; Guillaume ; et al.	2006-10-12
Component comprising a variable capacitor App 20060213044 - Casset; Fabrice ; et al.	2006-09-28
Micro-component packaging process and set of micro-components resulting from this process App 20060194364 - Bouche; Guillaume ; et al.	2006-08-31
Process for packaging micro-components using a matrix App 20060192260 - Bouche; Guillaume ; et al.	2006-08-31
Component comprising a variable capacitor Grant 7,082,024 - Casset , et al. July 25, 2	2006-07-25
Production of an integrated capacitor App 20060157820 - Bouche; Guillaume ; et al.	2006-07-20
Component Comprising A Variable Capacitor App 20060114638 - Casset; Fabrice ; et al.	2006-06-01
Tunable microresonator on an insulating beam deformable by the difference in thermal expansion coefficients Grant 7,038,355 - Bouche , et al. May 2, 2	2006-05-02
Process for obtaining a thin, insulating, soft magnetic film of high magnetization App 20060082390 - Bouche; Guillaume ; et al.	2006-04-20
Microelectromechanical system able to switch between two stable positions App 20050206243 - Bouche, Guillaume	2005-09-22
Lateral displacement multiposition microswitch Grant 6,927,352 - Bouche , et al. August 9, 2	2005-08-09
Acoustic resonator device App 20050168104 - Bouche, Guillaume ; et al.	2005-08-04
Support and decoupling structure for an acoustic resonator, acoustic resonator and corresponding integrated circuit App 20050023931 - Bouche, Guillaume ; et al.	2005-02-03
Electronic component having a resonator and fabrication process App 20050001698 - Bouche, Guillaume ; et al.	2005-01-06
Tunable microresonator on an insulating beam deformable by the difference in thermal expansion coefficients App 20040251781 - Bouche, Guillaume ; et al.	2004-12-16
Integrated circuit connecting pad Grant 6,822,329 - Varrot , et al. November 23, 2	2004-11-23
Lateral displacement multiposition microswitch App 20040222074 - Bouche, Guillaume ; et al.	2004-11-11
Method for forming a tunable piezoelectric microresonator App 20040174091 - Robert, Philippe ; et al.	2004-09-09
Method for the adhesion of two elements, in particular of an integrated circuit, for example an encapsulation of a resonator, and corresponding integrated circuit App 20040149808 - Bouche, Guillaume ; et al.	2004-08-05
Method for manufacturing a bipolar transistor in a CMOS integrated circuit Grant 6,756,279 - Menut , et al. June 29, 2	2004-06-29
Method for manufacturing a bipolar transistor in a CMOS integrated circuit App 20030027383 - Menut, Olivier ; et al.	2003-02-06
Integrated circuit connecting pad App 20020179991 - Varrot, Michel ; et al.	2002-12-05
Semiconductor device with an isolated zone and corresponding fabrication process App 20020109188 - Menut, Olivier ; et al.	2002-08-15