Semiconductor device

Description

FIG. 1 is a front perspective view of a semiconductor device showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom view thereof.

Claims

CLAIM We claim the ornamental design for a semiconductor device, as shown and described.

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Inventors:	Imamura; Takeshi (Kyoto, JP), Yoshida; Kazuma (Kyoto, JP), Okawa; Ryosuke (Nara, JP), Imai; Toshikazu (Hyogo, JP)
Applicant:	Name City State Country Type Panasonic Semiconductor Solutions Co., Ltd. Nagaokakyo N/A JP
Assignee:	Panasonic Semiconductor Solutions Co., Ltd. (Nagaokakyo, JP)
Appl. No.:	D/734,432
Filed:	May 12, 2020

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Foreign Application Priority Data

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Dec 11, 2019 [KR]			30-2019-0060011

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/123,133,146,147,158,182,184,199

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References Cited [Referenced By]

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U.S. Patent Documents

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Foreign Patent Documents

	D1581768		Jul 2017		JP
	D1588125		Oct 2017		JP
	D1588481		Oct 2017		JP
	D1632160		May 2019		JP
	D1632597		May 2019		JP
	D1640664		Sep 2019		JP
	D1641048		Sep 2019		JP
	D1641049		Sep 2019		JP

Primary Examiner: Gingrich; Shawn T
Assistant Examiner: Murray; Anton Dennis
Attorney, Agent or Firm: Crowell & Moring LLP