U.S. patent application number 13/664311 was filed with the patent office on 2014-05-01 for passivation layer and method of making a passivation layer.
This patent application is currently assigned to Infineon Technologies AG. The applicant listed for this patent is INFINEON TECHNOLOGIES AG. Invention is credited to Christoph Brunner, Herbert Gietler, Uwe Hoeckele, Markus Kahn, Elfriede Kraxner Wellenzohn, Christian Krenn, Hubert Maier, Kurt Matoy, Fister Schlemitz Silvana, Helmut Schoenherr, Juergen Steinbrenner.
Application Number | 20140117511 13/664311 |
Document ID | / |
Family ID | 50479839 |
Filed Date | 2014-05-01 |
United States Patent
Application |
20140117511 |
Kind Code |
A1 |
Matoy; Kurt ; et
al. |
May 1, 2014 |
Passivation Layer and Method of Making a Passivation Layer
Abstract
A passivation layer and a method of making a passivation layer
are disclosed. In one embodiment the method for manufacturing a
passivation layer includes depositing a first silicon based
dielectric layer on a workpiece, the first silicon based dielectric
layer comprising nitrogen, and depositing in-situ a second silicon
based dielectric layer on the first silicon based dielectric layer,
the second dielectric layer comprising oxygen.
Inventors: |
Matoy; Kurt; (Villach,
AT) ; Maier; Hubert; (Villach, AT) ; Krenn;
Christian; (Klagenfurt-Viktring, AT) ; Kraxner
Wellenzohn; Elfriede; (Villach, AT) ; Schoenherr;
Helmut; (Villach, AT) ; Steinbrenner; Juergen;
(Noetsch, AT) ; Kahn; Markus; (Rangersdorf,
AT) ; Schlemitz Silvana; Fister; (Poggersdorf,
AT) ; Brunner; Christoph; (Villach, AT) ;
Gietler; Herbert; (Villach, AT) ; Hoeckele; Uwe;
(Regensburg, DE) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
INFINEON TECHNOLOGIES AG |
Neubiberg |
|
DE |
|
|
Assignee: |
Infineon Technologies AG
Neubiberg
DE
|
Family ID: |
50479839 |
Appl. No.: |
13/664311 |
Filed: |
October 30, 2012 |
Current U.S.
Class: |
257/639 ;
257/E21.24; 257/E29.001; 438/763 |
Current CPC
Class: |
H01L 21/022 20130101;
H01L 21/0206 20130101; H01L 21/0234 20130101; H01L 21/0214
20130101; H01L 23/3171 20130101; H01L 21/02274 20130101; H01L
21/02164 20130101; H01L 23/291 20130101; H01L 21/02334 20130101;
H01L 21/76801 20130101 |
Class at
Publication: |
257/639 ;
438/763; 257/E21.24; 257/E29.001 |
International
Class: |
H01L 21/31 20060101
H01L021/31; H01L 29/00 20060101 H01L029/00 |
Claims
1. A method for manufacturing a passivation layer, the method
comprising: depositing a first silicon based dielectric layer on a
workpiece, the first silicon based dielectric layer comprising
nitrogen; and depositing in-situ a second silicon based dielectric
layer on the first silicon based dielectric layer, the second
dielectric layer comprising oxygen.
2. The method according to claim 1, wherein depositing the first
and second silicon based dielectric layers comprises a plasma
enhanced CVD (PE-CVD).
3. The method according to claim 1, wherein the first silicon based
dielectric layer comprises SiO.sub.xN.sub.y.
4. The method according to claim 1, wherein the second silicon
based dielectric layer comprises SiO.sub.x.
5. The method according to claim 1, wherein the first silicon based
dielectric layer is about 100 nm to about 1000 nm thick and wherein
the second silicon based dielectric layer is about 100 nm to about
2000 nm thick.
6. A method for manufacturing a layer stack, the method comprising:
placing a workpiece in a process chamber; providing a first set of
process gases for depositing a SiO.sub.xN.sub.y layer; and without
interrupting a plasma power, changing the first set of process
gases to a second set of process gases thereby forming a SiO.sub.x
layer on the SiO.sub.xN.sub.y layer.
7. The method according to claim 6, wherein the first set of
process gases comprises providing SiH.sub.4, N.sub.2O, NH.sub.3 and
N.sub.2 or an inert gas.
8. The method according to claim 6, wherein the second set of
process gases comprises turning on SiH.sub.4, N.sub.2O or both with
an inert gas.
9. The method according to claim 6, wherein a pressure is set
between about 1 Torr and about 10 Torr.
10. A method for manufacturing a layer stack, the method
comprising: placing a workpiece in a process chamber; turning on a
first set of process gases for depositing a SiO.sub.xN.sub.y layer,
plasma-cleaning the workpiece; and depositing a dielectric layer on
the SiO.sub.xN.sub.y layer.
11. The method according to claim 10, wherein depositing the
dielectric layer comprises a silicon based layer.
12. The method according to claim 10, wherein depositing the
dielectric layer comprises turning on a second set of process gases
for depositing a SiO.sub.x layer.
13. The method according to claim 12, wherein turning on the second
set of process gases comprising SiH.sub.4, N.sub.2O or both with an
inert gas.
14. The method according to claim 13, wherein turning on the first
set of process gases comprising SiH.sub.4, N.sub.2O, NH.sub.3 and
N.sub.2.
15. The method according to claim 14, wherein cleaning the
workpiece comprises applying an N.sub.2O plasma including a second
inert gas.
16. A semiconductor device comprising a workpiece; a silicon
oxynitride layer (SiO.sub.xN.sub.y) disposed on the workpiece; a
silicon oxide layer (SiO.sub.x) disposed on the silicon oxynitride
layer; and a transition layer between the silicon oxynitride layer
and the silicon oxide layer, wherein the transition layer comprises
silicon, oxygen and nitrogen, wherein a concentration of nitrogen
in the silicon oxynitride layer is different than a concentration
of nitrogen in the transition layer.
17. The semiconductor device according to claim 16, wherein the
concentration of nitrogen in the transition layer is higher in a
lower region adjacent to the silicon oxynitride layer and lower in
an upper region adjacent to the silicon oxide layer.
18. The semiconductor device according to claim 17, wherein the
concentration of nitrogen gradually changes over a thickness of the
transition layer.
19. The semiconductor device according to claim 16, wherein the
transition layer is disposed directly on the silicon oxynitride
layer and wherein the silicon oxide layer is disposed directly on
the transition layer.
20. The semiconductor device according to claim 16, wherein the
transition layer is a thin layer.
Description
TECHNICAL FIELD
[0001] The present invention relates generally to a layer stack and
method for making a layer stack, and, in particular embodiments, to
a passivation layer and method for making a passivation layer.
BACKGROUND
[0002] Forming a passivation layer on a semiconductor chip or
substrate protects the semiconductor chip or substrate from
environmental factors and influences. For example, a passivation
layer may shield the substrate or semiconductor chip from air or
water.
SUMMARY OF THE INVENTION
[0003] In accordance with an embodiment of the present invention, a
method for manufacturing a passivation layer comprises depositing a
first silicon based dielectric layer on a workpiece, the first
silicon based dielectric layer comprising nitrogen and depositing
in-situ a second silicon based dielectric layer on the first
silicon based dielectric layer, the second dielectric layer
comprising oxygen.
[0004] In accordance with an embodiment of the present invention, a
method for manufacturing a layer stack comprises placing a
workpiece in a process chamber. The method further comprising
providing a first set of process gases for depositing a
SiO.sub.xN.sub.y layer and without interrupting a plasma power,
changing the first set of process gases to a second set of process
gases thereby forming a SiO.sub.x layer on the SiO.sub.xN.sub.y
layer.
[0005] In accordance with an embodiment of the present invention, a
method for manufacturing a layer stack comprises placing a
workpiece in a process chamber. The method further comprises
turning on a first set of process gases for depositing a
SiO.sub.xN.sub.y layer, plasma-cleaning the workpiece and
depositing a dielectric layer on the SiO.sub.xN.sub.y layer.
[0006] In accordance with an embodiment of the present invention, a
semiconductor device comprises a workpiece, a silicon oxynitride
layer (SiO.sub.xN.sub.y) disposed on the workpiece and a silicon
oxide layer (SiO.sub.x) disposed on the silicon oxynitride layer.
The workpiece further comprises a transition layer between the
silicon oxynitride layer and the silicon oxide layer, wherein the
transition layer comprises silicon, oxygen and nitrogen, wherein a
concentration of nitrogen in the silicon oxynitride layer is
different than a concentration of nitrogen in the transition layer.
The stoichiometry of the transition layer may be different than the
oxynitride and oxide layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] For a more complete understanding of the present invention,
and the advantages thereof, reference is now made to the following
descriptions taken in conjunction with the accompanying drawings,
in which:
[0008] FIGS. 1a-1c show interface bonds between an silicon
oxynitride layer and silicon oxide layer;
[0009] FIG. 2 shows an embodiment of a flow chart of an in-situ
process depositing silicon oxynitride and silicon oxide;
[0010] FIG. 3a shows an embodiment of an interface bond between
silicon oxynitride and silicon oxide;
[0011] FIG. 3b shows an embodiment of a layer stack comprising
silicon oxynitride and silicon oxide;
[0012] FIG. 4 shows an embodiment of a flow chart of a deposition
process depositing silicon oxynitride and silicon oxide; and
[0013] FIG. 5 shows an embodiment of a layer stack comprising
silicon oxynitride and silicon oxide.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0014] The making and using of the presently preferred embodiments
are discussed in detail below. It should be appreciated, however,
that the present invention provides many applicable inventive
concepts that can be embodied in a wide variety of specific
contexts. The specific embodiments discussed are merely
illustrative of specific ways to make and use the invention, and do
not limit the scope of the invention.
[0015] The present invention will be described with respect to
embodiments in a specific context, namely a passivation layer or
passivation layer stack. The invention may also be applied,
however, to other layers or layer stacks.
[0016] A problem with the conventional passivation layer of a
semiconductor device is that blisters may form between the silicon
oxynitride and the silicon oxide. FIG. 1a shows an interface 130
between a silicon oxynitride layer 110 and a silicon oxide layer
120. The interface 130 shows a number of bonds 140 after the
deposition of the silicon oxide layer 120 on the silicon oxynitride
layer 110. Humidity such as water (H.sub.2O) may diffuse through
the silicon oxide layer 120 and may reduce the number of bonds 140
across the interface 130 (shown in FIG. 1b). Blisters 150 may form
at the interface 130 reducing the number of bonds 140 even more
thereby further weakening the interface 130 (shown in FIG. 1c).
[0017] Embodiments of the present invention may provide a silicon
oxynitride/silicon oxide layer stack with a strong interface bond.
Embodiments of the present invention provide in-situ deposition
methods to form the silicon oxynitride/silicon oxide layer stack.
Embodiments of the present invention provide a deposition method to
form the silicon oxynitride/silicon oxide layer stack without
turning off the plasma power. Other embodiments provide a cleaning
step between the deposition of the silicon oxynitride and the
silicon oxide.
[0018] An advantage is that blister formation at the interface
between silicon oxynitride and silicon oxide is avoided or
substantially reduced.
[0019] FIG. 2 shows a flow chart 200 of an embodiment of a method
to manufacture a semiconductor device.
[0020] In a first step 202 a workpiece is placed into a process
chamber. The workpiece comprises a substrate. The substrate may be
a semiconductor substrate such as silicon or germanium, or a
compound substrate such as SiGe, GaAs, InP, GaN or SiC.
Alternatively, the substrate comprises other materials. The
substrate may be doped or undoped and may comprise one or more
wells. The semiconductor substrate may be a single crystal silicon
or a silicon-on insulator (SOI). One or more interconnect
metallization layers connected through vias may be arranged on the
substrate. The interconnect metallization layers comprise metal
lines in a low-k dielectric material or silicon oxide.
[0021] The workpiece may comprise a discrete device such as a
single semiconductor device or an integrated circuit (IC). For
example, the workpiece may comprise a semiconductor device such as
a MOSFET or a power semiconductor device such as a bipolar
transistor, an insulated gate bipolar transistor (IGBT), a power
MOSFET, a thyristor or a diode. Alternatively, the workpiece may be
a resistor, a protective device, a capacitor, a sensor or a
detector, for example. The workpiece may be a system on chip
(SoC).
[0022] In one embodiment the plasma chamber comprises a chemical
vapor deposition (CVD) process chamber. For example, the plasma
chamber may comprise a plasma enhanced chemical vapor deposition
chamber (PE-CVD) or an atmospheric pressure chemical vapor
deposition chamber. CVD provides highly conformal and high quality
layers at fast processing times. CVD may coat substrates with
regular or irregular shapes. In one embodiment the CVD technique
delivers gaseous reactants (precursors) to the surface of a
workpiece or substrate where chemical reactions take place under
temperature and pressure conditions that are favorable to the
thermodynamics of the desired reaction.
[0023] The workpiece is then passivated. In step 204 silicon
oxynitride SiO.sub.xN.sub.y (SiO.sub.xN.sub.y may include
SiO.sub.xN.sub.y H.sub.z) is deposited on the workpiece. For
example, the silicon oxynitride SiO.sub.xN.sub.y is deposited on
the top layer of the interconnect metallization layers. A first
parameter setting for the deposition of silicon oxynitride may
comprise: Silan (SiH.sub.4) [range 20 sccm-1000 sccm], NH.sub.3
[range 20 sccm-1000 sccm], N.sub.2O [range 20 sccm-1000 sccm],
N.sub.2 [range 0-10000 sccm] and an inert gas (e.g., Ar, He) [0.1
sccm-16000 sccm]. The pressure may be set between about 1 Torr and
about 10 Torr. The plasma power may be set below about 1000 W at a
frequency of 13.56 MHz. The process gases are turned on and flown
into the process chamber.
[0024] In step 206 silicon oxide SiO.sub.x (SiO.sub.x may include
SiO.sub.xH.sub.y) is deposited on the workpiece. For example, the
silicon oxide SiO.sub.x is deposited directly on the silicon
oxynitride SiO.sub.xN.sub.y. The silicon oxide SiO.sub.x is
deposited on the silicon oxynitride SiO.sub.xN.sub.y in an in-situ
process. The first parameter setting is changed to a second
parameter setting without removing the workpiece from the process
chamber. Moreover, the first parameter setting is changed to a
second parameter setting without turning off the plasma power.
[0025] In one embodiment some of the first process gasses are
turned off while others remain on. Moreover, the remaining
parameter set may be changed to an oxide mode. The second parameter
setting of the process chamber may comprise: Silan SiH.sub.4 [range
20 sccm-1000 sccm], N.sub.2O [range 20 sccm-5000 sccm] and an inert
gas (e.g., Ar, He) [0.1 sccm-16000 sccm]. The pressure may be set
between about 1 Torr and about 10 Torr. The plasma power may be set
below about 700 W at a frequency of 13.56 MHz. In one embodiment
the pressure is changed, e.g., lowered in the above mentioned
range.
[0026] When switching from the first parameter set for silicon
oxynitride to the second parameter set for silicon oxide residual
gasses are still available in the process chamber. The residual
gases together with the oxide process gases, produce a transition
layer or a transition region between the silicon oxynitride layer
and the silicon oxide layer.
[0027] The transition layer may comprise the same chemical
components as the silicon oxynitride layer, however, in a different
ratio or stoichiometry.
[0028] The transition layer/region may comprise a silicon
oxynitride type layer at the bottom of the transition layer and a
silicon oxide type layer at the top surface of the transition
layer. The nitrogen content of the transition layer may change from
the bottom surface to the top surface. In one embodiment, the
nitrogen content may gradually change from the bottom surface
having a relative high content of nitrogen to the top surface
having a relative low content of nitrogen.
[0029] In one embodiment, the transition layer is a thin layer. For
example, the transition layer may be about 3 nm to about 40 nm
thick. Alternatively, the transition layer may be about 10 nm to
about 20 nm thick. The silicon oxynitride layer may be about 100 nm
to about 1000 nm thick and the silicon oxide layer may be about 100
nm to about 2000 nm thick.
[0030] In step 208 the workpiece is further processed. For example,
a photoresist may be disposed on the passivation layer (silicon
oxynitride/silicon oxide layer stack), structured and developed in
order to structure and define bond pads for the component or
semiconductor device. The workpiece may be further processed in the
same process chamber or in a different process chamber.
[0031] FIG. 3a shows a passivation layer stack 300 comprising a
silicon oxynitride SiO.sub.xN.sub.y 310 and a silicon oxide
SiO.sub.x 320 formed according to the method of FIG. 2. The
interface 330 between the silicon oxynitride layer SiO.sub.xN.sub.y
310 and the silicon oxide layer SiO.sub.x 320 comprises a very high
number of bonds 340. The high number of bonds 340 provides a strong
interface 330. Blisters may not form at the interface 330. Due to
the number of bonds being very high the strength of the interface
is very high. If the number of bonds is reduced, e.g., by humidity,
the reduced number of bonds will still be high to provide a strong
interface. For example, the workpiece with such an interface may
pass a humidity test for automotive specifications.
[0032] FIG. 3b shows a component or a semiconductor device
comprising the passivation 300 layer stack on a workpiece 360. The
passivation layer stack 300 comprises the transition layer 370. The
transition layer 370 may be similar to the silicon oxide layer 320
at the upper portion 371 of the transition layer 370 and may be
similar to the silicon oxynitride layer 310 at the bottom portion
372 of the transition layer 370. The nitrogen content of the
transition layer 370 may change from the bottom surface to the top
surface. In one embodiment, the nitrogen content gradually
decreases from the bottom surface to the top surface.
[0033] FIG. 4 shows an embodiment of a flow chart 400 for forming a
passivation layer comprising silicon oxynitride and silicon
oxide.
[0034] In a first step 402 a workpiece is placed into a process
chamber. The workpiece comprises a substrate. The substrate may be
a semiconductor substrate such as silicon or germanium, or a
compound substrate such as SiGe, GaAs, InP, GaN or SiC.
Alternatively, the substrate comprises other materials. The
substrate may be doped or undoped and may comprise one or more
wells. The semiconductor substrate may be a single crystal silicon
or a silicon-on insulator (SOI). One or more interconnect
metallization layers connected through vias may be arranged on the
substrate. The interconnect metallization layers comprise metal
lines in a low-k dielectric material or silicon oxide.
[0035] The workpiece may comprise a discrete device such as a
single semiconductor device or an integrated circuit (IC). For
example, the workpiece may comprise a semiconductor device such as
a MOSFET or a power semiconductor device such as a bipolar
transistor, an insulated gate bipolar transistor (IGBT), a power
MOSFET, a thyristor or a diode. Alternatively, the workpiece may be
a resistor, a protective device, a capacitor, a sensor or a
detector, for example. The workpiece may be a system on chip
(SoC).
[0036] The workpiece is then passivated. In step 204 silicon
oxynitride SiO.sub.xN.sub.y (SiO.sub.xN.sub.y may comprise
SiO.sub.xN.sub.yH.sub.z) is deposited on the workpiece. For
example, the silicon oxynitride SiO.sub.xN.sub.y is deposited on
the top layer of the interconnect metallization layers. A first
parameter setting for the deposition of silicon oxynitride may
comprise: Silane (SiH.sub.4) [range 20-1000 accm], NH.sub.3 [range
20-1000 sccm], N.sub.2O [range 20-1000 sccm], N.sub.2 [range
0-10000 sccm] and an inert gas (e.g., Ar, He) [0.1-16000 sccm]. The
pressure may be set between about 1 Torr and about 10 Torr. The
plasma power may be set below about 1000 W at a frequency of 13.56
MHz. The process gases are turned on and flown into the process
chamber.
[0037] In step 406 the first parameter setting is deactivated. For
example, the plasma power is turned off and the process gasses for
silicon oxynitride are also turned off. In step 408 the workpiece
is kept in the process chamber or removed from the process chamber
and later placed in the same or a different process chamber. In
step 410 the workpiece is cleaned. For example, the workpiece is
cleaned in a plasma cleaning step. In one embodiment the plasma
cleaning comprises nitrous oxide (N.sub.2O). The process gasses for
cleaning may be N.sub.2O [range 20 sccm-5000 sccm] and an inert gas
(e.g., Ar, He) [0.1 sccm-16000 sccm]; power 100 kW-1.5 kW,
pressure: 1 torr-10 torr, and a frequency of 13.56 MHz.
[0038] After the cleaning, in step 412, silicon oxide SiO.sub.x
(SiO.sub.x may comprise SiO.sub.xH.sub.y) is deposited on the
workpiece. For example, the silicon oxide SiO.sub.x is disposed
directly on the silicon oxynitride SiO.sub.xN.sub.y. A second
parameter setting is applied to deposit the silicon oxide
SiO.sub.x. The second parameter setting is different than the first
parameter setting.
[0039] In one embodiment some of the first process gasses are
turned off while others remain on. Moreover, the remaining
parameter set may be changed to an oxide mode. The second parameter
setting of the process chamber may comprise: Silane SiH.sub.4
[range 20 sccm-1000 sccm], N.sub.2O [range 20 sccm-5000 sccm] and
an inert gas (e.g., Ar, He) [0.1 sccm-16000 sccm]. The pressure may
be set between about 1 Torr and about 10 Torr. The plasma power may
be set below about 700 W at a frequency of 13.56 MHz. In one
embodiment the pressure is changed, e.g., lowered in the above
mentioned range.
[0040] FIG. 5 shows a component or a semiconductor device
comprising a passivation 500 layer stack on a workpiece 560. The
passivation layer stack 500 comprises the SiO, layer 520 is
directly disposed on the SiO.sub.xN.sub.y layer 510. The silicon
oxynitride layer 510 may be about 100 to about 1000 nm thick and
the silicon oxide layer 520 may be about 100 to about 2000 nm
thick. Depositing SiO.sub.x on the SiO.sub.xN.sub.y layer after the
cleaning step does not form a transition layer or a transition
region between the silicon oxide layer 510 and the silicon
oxynitride layer 520.
[0041] In step 414 the workpiece is further processed. For example,
a photoresist may be disposed on the passivation layer (silicon
oxynitride/silicon oxide layer stack), structured and developed in
order to structure and define bond pads for the component or
semiconductor device. The workpiece may be further processed in the
same process chamber or in a different process chamber.
[0042] Although the present invention and its advantages have been
described in detail, it should be understood that various changes,
substitutions and alterations can be made herein without departing
from the spirit and scope of the invention as defined by the
appended claims.
[0043] Moreover, the scope of the present application is not
intended to be limited to the particular embodiments of the
process, machine, manufacture, composition of matter, means,
methods and steps described in the specification. As one of
ordinary skill in the art will readily appreciate from the
disclosure of the present invention, processes, machines,
manufacture, compositions of matter, means, methods, or steps,
presently existing or later to be developed, that perform
substantially the same function or achieve substantially the same
result as the corresponding embodiments described herein may be
utilized according to the present invention. Accordingly, the
appended claims are intended to include within their scope such
processes, machines, manufacture, compositions of matter, means,
methods, or steps.
* * * * *