Semiconductor Packaging Method And Structure Thereof

Shih; Cheng-Hung ;   et al.

Patent Application Summary

U.S. patent application number 13/398081 was filed with the patent office on 2013-08-22 for semiconductor packaging method and structure thereof. This patent application is currently assigned to CHIPBOND TECHNOLOGY CORPORATION. The applicant listed for this patent is Yung-Wei Hsieh, Bo-Shiun Jiang, Cheng-Fan Lin, Shu-Chen Lin, Cheng-Hung Shih. Invention is credited to Yung-Wei Hsieh, Bo-Shiun Jiang, Cheng-Fan Lin, Shu-Chen Lin, Cheng-Hung Shih.

Application Number20130214407 13/398081
Document ID /
Family ID48808662
Filed Date2013-08-22

United States Patent Application 20130214407
Kind Code A1
Shih; Cheng-Hung ;   et al. August 22, 2013

SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOF

Abstract

A semiconductor packaging method includes providing a substrate having a plurality of pads, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the substrate, said conductible gel includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, said chip comprises a plurality of copper-containing bumps, each of the copper-containing bumps comprises a ring surface and a second coupling surface having a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the conductive particles are electrically connected with the first conductive contact areas and the second conductive contact areas, said anti-dissociation substances are in contact with the second non-conductive contact area, and the ring surfaces are covered with the anti-dissociation substances.


Inventors: Shih; Cheng-Hung; (Changhua County, TW) ; Lin; Shu-Chen; (Pingtung County, TW) ; Lin; Cheng-Fan; (Hsinchu County, TW) ; Hsieh; Yung-Wei; (Hsinchu City, TW) ; Jiang; Bo-Shiun; (Taipei City, TW)
Applicant:
Name City State Country Type

Shih; Cheng-Hung
Lin; Shu-Chen
Lin; Cheng-Fan
Hsieh; Yung-Wei
Jiang; Bo-Shiun

Changhua County
Pingtung County
Hsinchu County
Hsinchu City
Taipei City

TW
TW
TW
TW
TW
Assignee: CHIPBOND TECHNOLOGY CORPORATION
Hsinchu
TW

Family ID: 48808662
Appl. No.: 13/398081
Filed: February 16, 2012

Current U.S. Class: 257/737 ; 257/E21.509; 257/E23.023; 438/106
Current CPC Class: H01L 24/13 20130101; H01L 24/29 20130101; H01L 2224/29393 20130101; H01L 2224/83192 20130101; H01L 21/50 20130101; H01L 2224/81191 20130101; H01L 2224/81903 20130101; H01L 2224/29393 20130101; H01L 2224/2929 20130101; H01L 2224/293 20130101; H01L 2224/13144 20130101; H01L 24/16 20130101; H01L 2224/13155 20130101; H01L 2224/9211 20130101; H01L 2224/13155 20130101; H01L 2224/16225 20130101; H01L 2224/13144 20130101; H01L 2224/29499 20130101; H01L 2224/73204 20130101; H01L 2224/73204 20130101; H01L 24/32 20130101; H01L 2924/00 20130101; H01L 2924/00 20130101; H01L 2224/83192 20130101; H01L 24/92 20130101; H01L 24/81 20130101; H01L 2224/32225 20130101; H01L 2224/2929 20130101; H01L 2224/13147 20130101; H01L 2224/83851 20130101; H01L 24/83 20130101; H01L 2224/9211 20130101; H01L 2224/13147 20130101; H01L 2224/83192 20130101; H01L 2224/293 20130101; H01L 2224/81 20130101; H01L 2924/00014 20130101; H01L 2224/16225 20130101; H01L 2224/32225 20130101; H01L 2224/16225 20130101; H01L 2924/00012 20130101; H01L 2224/32225 20130101; H01L 2224/32225 20130101; H01L 2924/00014 20130101; H01L 2224/73204 20130101; H01L 2924/00014 20130101; H01L 2924/00014 20130101; H01L 2924/00012 20130101; H01L 2924/00014 20130101; H01L 2224/83 20130101
Class at Publication: 257/737 ; 438/106; 257/E21.509; 257/E23.023
International Class: H01L 23/488 20060101 H01L023/488; H01L 21/60 20060101 H01L021/60

Claims



1. A semiconductor packaging method at least comprising: providing a substrate having an upper surface and a plurality of pads disposed on the upper surface, wherein each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the upper surface and the pads of the substrate, wherein the conductible gel with anti-dissociation function includes a plurality of conductive particles and a plurality of anti-dissociation substances; and mounting a chip on the substrate, the chip comprises an active surface facing toward the upper surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, wherein the conductible gel with anti-dissociation function covers the copper-containing bumps, each of the copper-containing bumps comprises a second coupling surface and a ring surface, said second coupling surface comprises a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, said copper-containing bumps are electrically connected with the pads via the conductive particles located between the first coupling surfaces and the second coupling surfaces, said conductive particles are electrically connected with the first conductive contact areas of the first coupling surfaces and the second conductive contact areas of the second coupling surfaces, wherein the anti-dissociation substances are located between adjacent conductive particles, each of the first coupling surfaces and each of the second coupling surfaces, said anti-dissociation substances are in contact with the second non-conductive contact areas of the second coupling surfaces, and the ring surfaces of the copper-containing bumps are covered with the anti-dissociation substances.

2. The semiconductor packaging method in accordance with claim 1, wherein the anti-dissociation substances are in contact with the first non-conductive contact areas of the first coupling surfaces.

3. The semiconductor packaging method in accordance with claim 1, wherein each of the pads comprises a lateral surface being covered with the anti-dissociation substances.

4. The semiconductor packaging method in accordance with claim 1, wherein the anti-dissociation substance can be an organic solderability preservative.

5. The semiconductor packaging method in accordance with claim 4, wherein the material of the organic solderability preservative can be chosen from one of benzimidazole or imidazole derivative.

6. The semiconductor packaging method in accordance with claim 5, wherein the imidazole derivative can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof, and the benzimidazole can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof.

7. The semiconductor packaging method in accordance with claim 1, wherein the material of the copper-containing bumps can be chosen from one of copper/nickel or copper/nickel/gold.

8. A semiconductor packaging structure at least includes: a substrate having an upper surface and a plurality of pads disposed at the upper surface, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; a conductible gel with anti-dissociation function formed on the upper surface and the pads of the substrate, said conductible gel with anti-dissociation function includes a plurality of conductive particles and a plurality of anti-dissociation substances; and a chip mounted on the substrate, said chip comprises an active surface facing toward the upper surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, each of the copper-containing bumps is covered with the conductible gel with anti-dissociation function and comprises a second coupling surface and a ring surface, said second coupling surface comprises a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the copper-containing bumps are electrically connected with the pads via the conductive particles located between the first coupling surfaces and the second coupling surfaces, said conductive particles are electrically connected with the first conductive contact areas of the first coupling surfaces and the second conductive contact areas of the second coupling surfaces, wherein the anti-dissociation substances are located between adjacent conductive particles, each of the first coupling surfaces and each of the second coupling surfaces, said anti-dissociation substances are in contact with the second non-conductive contact areas of the second coupling surfaces, and the ring surfaces of the copper-containing bumps are covered with the anti-dissociation substances.

9. The semiconductor packaging structure in accordance with claim 8, wherein the anti-dissociation substances are in contact with the first non-conductive contact areas of the first coupling surfaces.

10. The semiconductor packaging structure in accordance with claim 8, wherein each of the pads comprises a lateral surface being covered with the anti-dissociation substances.

11. The semiconductor packaging structure in accordance with claim 8, wherein the anti-dissociation substance can be an organic solderability preservative.

12. The semiconductor packaging structure in accordance with claim 11, wherein the material of the organic solderability preservative can be chosen from one of benzimidazole or imidazole derivative.

13. The semiconductor packaging structure in accordance with claim 12, wherein the imidazole derivative can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof, and the benzimidazole can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof.

14. The semiconductor packaging structure in accordance with claim 8, wherein the material of the copper-containing bumps can be chosen from one of copper/nickel or copper/nickel/gold.
Description



FIELD OF THE INVENTION

[0001] The present invention is generally related to a semiconductor packaging method, which particularly relates to the semiconductor packaging method that prevents copper ions from dissociation.

BACKGROUND OF THE INVENTION

[0002] Modern electronic products gradually lead a direction of light, thin, short, and small. Accordingly, the circuit layout for electronic products destines to develop technique such as "micro space between two electronic connection devices". However, a short phenomenon is easily occurred in mentioned circuit layout via an insufficient gap between two adjacent electronic connection devices.

SUMMARY

[0003] The primary object of the present invention is to provide a semiconductor packaging method includes providing a substrate having an upper surface and a plurality of pads disposed at the upper surface, and each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the upper surface and the pads of the substrate, wherein the conductible gel with anti-dissociation function includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, the chip comprises an active surface facing toward the upper surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, wherein the conductible gel with anti-dissociation function covers the copper-containing bumps, each of the copper-containing bumps comprises a second coupling surface and a ring surface, said second coupling surface comprises a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, said copper-containing bumps are electrically connected with the pads via the conductive particles located between the first coupling surfaces and the second coupling surfaces, said conductive particles are electrically connected with the first conductive contact areas of the first coupling surfaces and the second conductive contact areas of the second coupling surfaces, wherein the anti-dissociation substances are located between adjacent conductive particles, each of the first coupling surfaces and each of the second coupling surfaces, said anti-dissociation substances are in contact with the second non-conductive contact areas of the second coupling surfaces, and the ring surfaces of the copper-containing bumps are covered with the anti-dissociation substances. As a result of the ring surfaces of the copper-containing bumps being covered by the anti-dissociation substances of the conductible gel with anti-dissociation function, when a dissociation phenomenon via copper ions from the copper-containing bumps is occurred, the anti-dissociation substances may capture those dissociated copper ions to avoid short phenomenon from happening.

DESCRIPTION OF THE DRAWINGS

[0004] FIGS. 1A to 1C are section schematic diagrams illustrating a semiconductor packaging method in accordance with a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0005] With reference to FIGS. 1A to 1C, a semiconductor packaging method in accordance with a preferred embodiment of the present invention includes the steps as followed. First, referring to FIG. 1A, providing a substrate 110 having an upper surface 111 and a plurality of pads 112 disposed at the upper surface 111, in this embodiment, the pad 112 can be a pin of the substrate 110 or a bump pad of trace lines. Each of the pads 112 comprises a first coupling surface 113 and a lateral surface 114, wherein the first coupling surface 113 comprises a plurality of first conductive contact areas 113a and a plurality of first non-conductive contact areas 113b. Next, referring to FIG. 1B, FIG. 1B indicates forming a conductible gel with anti-dissociation function 120 on the upper surface 111 and the pads 112 of the substrate 110, wherein the conductible gel with anti-dissociation function 120 includes a plurality of conductive particles 121 and a plurality of anti-dissociation substances 122. In this embodiment, the anti-dissociation substance 122 can be an organic solderability preservative, wherein the material of the organic solderability preservative can be chosen from one of benzimidazole or imidazole derivative. Furthermore, the imidazole derivative can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof, and the benzimidazole can be one of Brenzotriazole, Phenylimidazole, Substituted Benzimidazole, Aryl Phonylimidazole or a mixture thereof.

[0006] Finally, referring to FIG. 1C, mounting a chip 130 on the substrate 110, said chip 130 comprises an active surface 131 facing toward the upper surface 111 of the substrate 110 and a plurality of copper-containing bumps 132 disposed at the active surface 131. In this embodiment, the material of the copper-containing bumps 132 can be chosen from one of copper/nickel or copper/nickel/gold. The conductible gel with anti-dissociation function 120 covers the copper-containing bumps 132, each of the copper-containing bumps 132 comprises a second coupling surface 133 and a ring surface 134, wherein the second coupling surface 133 comprises a plurality of second conductive contact areas 133a and a plurality of second non-conductive contact areas 133b. The copper-containing bumps 132 are electrically connected with the pads 112 via the conductive particles 121 located between the first coupling surfaces 113 and the second coupling surfaces 133. The conductive particles 121 are electrically connected with the first conductive contact areas 113a of the first coupling surfaces 113 and the second conductive contact areas 133a of the second coupling surfaces 133. The anti-dissociation substances 122 are located between adjacent conductive particles 121, each of the first coupling surfaces 113 and each of the second coupling surfaces 133. The anti-dissociation substances 122 are in contact with the second non-conductive contact areas 133b of the second coupling surfaces 133, and the ring surfaces 134 of the copper-containing bumps 132 are covered with the anti-dissociation substances 122 therefore forming a semiconductor packaging structure 100. Besides, the anti-dissociation substances 122 are in contact with the first non-conductive contact areas 113b of the first coupling surfaces 113 as well. As a result of the ring surfaces 134 of the copper-containing bumps 132 being covered by the anti-dissociation substances 122 of the conductible gel with anti-dissociation function 120, when a dissociation phenomenon via copper ions from the copper-containing bumps 132 is occurred, the anti-dissociation substances 122 may capture those dissociated copper ions in time to avoid short phenomenon from happening and to improve manufacturing yield of the semiconductor packaging structure 100.

[0007] With reference to FIG. 1C again, a semiconductor packaging structure 100 in accordance with a preferred embodiment of this invention includes a substrate 110, a conductible gel with anti-dissociation function 120 and a chip 130. The substrate 110 comprises an upper surface 111 and a plurality of pads 112 disposed at the upper surface 111, wherein each of the pads 112 comprises a first coupling surface 113 and a lateral surface 114. The first coupling surface 113 comprises a plurality of first conductive contact areas 113a and a plurality of first non-conductive contact areas 113b. The conductible gel with anti-dissociation function 120 is formed on the upper surface 111 and the pads 112 of the substrate 110, and said conductible gel with anti-dissociation function 120 includes a plurality of conductive particles 121 and a plurality of anti-dissociation substances 122. The chip 130 is mounted on the substrate 110 and comprises an active surface 131 facing toward the upper surface 111 of the substrate 110 and a plurality of copper-containing bumps 132 disposed at the active surface 131. Each of the copper-containing bumps 132 is covered with the conductible gel with anti-dissociation function 120 and comprises a second coupling surface 133 and a ring surface 134, wherein the second coupling surface 133 comprises a plurality of second conductive contact areas 133a and a plurality of second non-conductive contact areas 133b. The copper-containing bumps 132 are electrically connected with the pads 112 via the conductive particles 121 located between the first coupling surfaces 113 and the second coupling surfaces 133. Besides, the conductive particles 121 are electrically connected with the first conductive contact areas 113a of the first coupling surfaces 113 and the second conductive contact areas 133a of the second coupling surfaces 133, wherein the anti-dissociation substances 122 are located between adjacent conductive particles 121, each of the first coupling surfaces 113 and each of the second coupling surfaces 133. The anti-dissociation substances 122 are in contact with the second non-conductive contact areas 133b of the second coupling surfaces 133 and the first non-conductive contact areas 113b of the first coupling surfaces 113. The anti-dissociation substances 122 cover the ring surfaces 134 of the copper-containing bumps 132 and the lateral surfaces 114 of the pads 112.

[0008] While this invention has been particularly illustrated and described in detail with respect to the preferred embodiments thereof, it will be clearly understood by those skilled in the art that it is not limited to the specific features and describes and various modifications and changes in form and details may be made without departing from the spirit and scope of this invention.

* * * * *


uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed