U.S. patent application number 11/383341 was filed with the patent office on 2006-11-02 for method for fabricating connection regions of an integrated circuit, and integrated circuit having connection regions.
This patent application is currently assigned to Infineon Technologies AG, a German corporation. Invention is credited to Harry Hedler, Roland Irsigler, Thorsten Meyer, Barbara Vasquez.
Application Number | 20060244109 11/383341 |
Document ID | / |
Family ID | 31501907 |
Filed Date | 2006-11-02 |
United States Patent
Application |
20060244109 |
Kind Code |
A1 |
Hedler; Harry ; et
al. |
November 2, 2006 |
Method for fabricating connection regions of an integrated circuit,
and integrated circuit having connection regions
Abstract
A method for fabricating an integrated circuit connection region
includes application of a dielectric to an integrated circuit with
a connection region, application of a corrodible metalization layer
to the dielectric, application of a protection device to the
metalization layer, and removal of the protection device in a
region around the connection region.
Inventors: |
Hedler; Harry; (Germering,
DE) ; Irsigler; Roland; (Munchen, DE) ; Meyer;
Thorsten; (Dresden, DE) ; Vasquez; Barbara;
(Orinda, CA) |
Correspondence
Address: |
FISH & RICHARDSON PC
P.O. BOX 1022
MINNEAPOLIS
MN
55440-1022
US
|
Assignee: |
Infineon Technologies AG, a German
corporation
|
Family ID: |
31501907 |
Appl. No.: |
11/383341 |
Filed: |
May 15, 2006 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
10642092 |
Aug 15, 2003 |
7087512 |
|
|
11383341 |
May 15, 2006 |
|
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|
Current U.S.
Class: |
257/666 ;
257/E21.508; 257/E23.021 |
Current CPC
Class: |
H01L 2224/05568
20130101; H01L 2224/05001 20130101; H01L 2224/05569 20130101; H01L
2924/01006 20130101; H01L 2924/0001 20130101; H01L 2924/01005
20130101; H01L 2224/05008 20130101; H01L 2224/13099 20130101; H01L
2924/01079 20130101; H01L 2924/01033 20130101; H01L 2924/14
20130101; H01L 24/05 20130101; H01L 24/11 20130101; H01L 2924/01022
20130101; H01L 2924/014 20130101; H01L 2924/01013 20130101; H01L
2224/05026 20130101; H01L 2924/01029 20130101; H01L 24/13 20130101;
H01L 2924/01078 20130101; H01L 24/03 20130101; H01L 2224/131
20130101; H01L 2224/05024 20130101; H01L 2224/131 20130101; H01L
2924/014 20130101; H01L 2924/0001 20130101; H01L 2224/13099
20130101; H01L 2224/05541 20130101; H01L 2224/05005 20130101; H01L
2224/05644 20130101; H01L 2924/00014 20130101; H01L 2224/05124
20130101; H01L 2924/00014 20130101; H01L 2224/05147 20130101; H01L
2924/00014 20130101; H01L 2224/05155 20130101; H01L 2924/00014
20130101; H01L 2224/05166 20130101; H01L 2924/00014 20130101 |
Class at
Publication: |
257/666 |
International
Class: |
H01L 23/495 20060101
H01L023/495 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 23, 2002 |
DE |
102 38 816.4 |
Claims
1. A semiconductor device comprising: an integrated circuit having
a connection region, a dielectric on the integrated circuit, a
corrodible metallization layer on the dielectric, a patterned
protection device, wherein the protection device is removed around
the connection region.
2. The semiconductor device of claim 1, further comprising a
carrier layer applied above the dielectric.
3. The semiconductor device of claim 2, wherein the carrier layer
includes copper.
4. The semiconductor device of claim 1, wherein the metallization
layer includes an interconnect layer.
5. The semiconductor device of claim 4, wherein the interconnect
layer includes copper.
6. The semiconductor device of claim 1, wherein the metallization
layer includes a barrier device that is not wetted by solder.
7. The semiconductor device of claim 6, wherein the barrier device
includes nickel.
8. The semiconductor device of claim 6, wherein the barrier device
includes a metal oxide.
9. The semiconductor device of claim 1, wherein the protection
device includes a corrosion-resistant metal.
10. The semiconductor device of claim 9, wherein the corrosion
resistant metal includes gold.
11. The semiconductor device of claim 1, further comprising a
connection device on the connection region.
12. The semiconductor device of claim 11, wherein the connection
device includes solder.
13. The semiconductor device of claim 1, wherein the metallization
is oxidized and not wetted by solder in a region exposed by the
protection device.
Description
RELATED APPLICATIONS
[0001] This application is a divisional application of and claims
priority under 35 U.S.C. .sctn.120 to application Ser. No.
10/642,092, filed Aug. 15, 2003, which claims priority from German
Application Serial No. 102 38 816.4, filed Aug. 23, 2002, the
contents of which are incorporated herein by reference.
FIELD OF INVENTION
[0002] The present invention relates to a method for fabricating
connection regions of an integrated circuit and to an integrated
circuit having connection regions.
BACKGROUND
[0003] Semiconductor devices or integrated circuits which are
provided in a flip-chip structure have solder balls for making
vertical contact between the integrated circuit and a printed
circuit board or a further integrated circuit in a stack. The
solder ball is arranged on a connection device or a pad, e.g. on a
chip, which is connected to the active section of the chip by metal
lines or interconnects which form a rewiring device. The connection
device or pad and the layers are often fabricated from a stack of
plated metals, such as copper, nickel and a gold covering
layer.
[0004] All solder ball arrangements or packages require a type of
solder stop around the ball. This is required since the solder has
a tendency to wet not just the soldering pad itself but also the
adjoining rewiring device. Without solder stop structures, the
solder would flow away during the solder reliquification or reflow.
It is customary for a solder stop resist or resin to be applied to
the rewiring, preventing the solder from flowing away.
[0005] If the rewiring layout is two-dimensional, the resist is
normally applied, in particular spun on, and then patterned by
means of a photographic technique. Alternatively, the solder stop
material can be applied in a printing process if the feature sizes
are large enough. In the case of three-dimensional structures,
application is much more difficult. The adhesion or bonding of
these organic layers to gold is not very good, which may result in
the solder running under the resist and wetting covered sections of
the metal lines or interconnects. Furthermore, resists which can be
exposed by photographic techniques and have the required
temperature stability are expensive.
SUMMARY
[0006] Therefore, it is an object of the present invention to
provide a method for fabricating connection regions of an
integrated circuit and an integrated circuit having connection
regions which prevent solder from wetting the entire rewiring
device without having to use a soldering stop resist.
[0007] The idea on which the present invention is based consists in
removing the readily wettable covering layer or protection device,
which preferably includes gold, around a connection region, i.e.
around a connection pad, on which a solder ball is provided.
[0008] In the present invention, the problem mentioned in the
introduction is solved in particular through the fact that the
oxidizable or corrodible metallization located beneath the
protection device is uncovered and passivated, i.e. oxidized, in a
region around the connection region and can therefore act as a
soldering stop.
[0009] According to a preferred refinement, a connection device,
preferably a solder ball, is applied to predetermined connection
regions.
[0010] According to a further preferred refinement, a carrier layer
is applied to a dielectric, preferably by sputtering.
[0011] According to a further preferred refinement, the oxidizable
metallization has an interconnect level and/or a barrier device,
which are preferably deposited electrochemically.
[0012] According to a further preferred refinement, to produce the
patterned protection device the metallization is provided with a
patterned photomask before the protection device is applied.
[0013] According to a further preferred refinement, the protection
device is deposited electrochemically or by metal deposition
without external current.
[0014] According to a further preferred refinement, the protection
device is patterned in an etching step, preferably a wet-etching
step, by means of a photomask which has been patterned in a
photochemical process.
[0015] According to a further preferred refinement, the carrier
layer and/or the interconnect level includes Cu.
[0016] According to a further preferred refinement, the
metallization includes a metal or metal oxide, preferably based on
Ni, which cannot be wetted with solder.
[0017] According to a further preferred refinement, the protection
device consists of a corrosion-resistant metal, in particular
Au.
[0018] According to a further preferred refinement, the
metallization is oxidized and not wetted with solder in the region
around the connection region, which has been uncovered by the
protection device.
BRIEF DESCRIPTION OF DRAWINGS
[0019] FIG. 1 shows a cross section through an integrated circuit
after a first method step for the purpose of explaining an
embodiment of the present invention;
[0020] FIG. 2 shows a cross section through an integrated circuit
after a further method step for the purpose of explaining an
embodiment of the present invention;
[0021] FIGS. 3 to 7 show a cross section through an integrated
circuit after in each case further method steps for the purpose of
explaining a first embodiment of the present invention;
[0022] FIG. 8 shows a cross section through an integrated circuit
corresponding to that shown in FIG. 3, but without a protection
device having been applied, for the purpose of explaining a second
embodiment of the present invention;
[0023] FIGS. 9 to 11 show a cross section through an integrated
circuit after in each case successive method steps for the purpose
of explaining the second embodiment of the present invention.
DETAILED DESCRIPTION
[0024] FIG. 1 shows a cross section through an integrated circuit
or semiconductor device after a method step for the purpose of
explaining an embodiment of the present invention.
[0025] FIG. 1 illustrates an integrated circuit 10 or a
semiconductor substrate which has been provided with a contact
device 11. The contact device 11 is used to make electrical contact
with an active semiconductor region, e.g. with a rewiring device. A
dielectric 12 or a passivation, which has a cutout above the
contact device 11, is applied to the integrated circuit 10. The
integrated circuit may be in the form of a wafer or may already be
in the form of a semiconductor chip.
[0026] FIG. 2 shows a cross section through an integrated circuit
after a further method step for the purpose of explaining an
embodiment of the present invention.
[0027] A carrier layer 13 or seed layer has been applied to the
entire surface of the integrated circuit 10 and covers both the
dielectric 12 and the contact device 11. The carrier layer 13 is
preferably applied by sputtering and includes, for_example, Ti, Al
or Cu. As illustrated in FIG. 2, an offset or a well-like structure
is formed above the contact device 11 on account of the
metallization 13 having been substantially homogenously sputtered
onto the dielectric layer 12 provided with the recess above the
contact. device 11.
[0028] FIG. 3 shows a cross section through an integrated circuit
after a number of subsequent process steps for explaining a first
embodiment of the present invention.
[0029] FIG. 3 illustrates the integrated circuit shown in FIG. 2,
except that an interconnect level 14, which preferably includes Al
or Cu and is in particular plated on, i.e. applied
electrochemically, adjoining a further metallization 15, which has
preferably been applied electrochemically and forms a barrier layer
15, is provided above the carrier layer 13. The barrier layer 15
preferably includes an oxidizable metal, such as for example
Ni.
[0030] To protect the barrier layer 15 from corrosion, a protection
device 16 is applied above the barrier layer 15, i.e. is preferably
electroplated or deposited without the use of external current.
This protection device 16 comprises a corrosion-resistant metal
which is preferably readily wetted by solder and by way of example
includes Au. The interconnect level 14 is the primary electrical
conductor in the layer sequence 13, 14, 15 and 16. The barrier
layer 15 prevents the migration of atoms out of the interconnect
level 14, which preferably consists of copper, into a connection
device 16, 18, which subsequently, in order to make contact with
the rewiring device 13, 14, 15 and 16, can be connected in the
vertical direction preferably to a printed circuit board or a
further integrated circuit (in each case not shown). The barrier
layer 15, consisting in particular of Ni, is preferably an
oxidizable metal which is not wetted by solder as soon as it has
been oxidized. The protection device 16, preferably made from gold,
is very thin, is easy for solder to wet and protects the barrier
layer 15, preferably made from Ni, lying below it from oxidation or
corrosion.
[0031] FIG. 4 shows a cross section through an integrated circuit
after a further method step for the purpose of explaining a first
embodiment of the present invention. In FIG. 4, a photochemically
patterned photpresist mask 17, which in a subsequent etching step,
in particular a wet-etching step, protects the protection device 16
from being etched away in the region covered by the photoresist
structure, has been formed above the protection device 16.
[0032] FIG. 5 illustrates the arrangement shown in FIG. 4 after the
removal of the protection device 16 in sections which are uncovered
by the photoresist structure 17, preferably by means of a
wet-etching step.
[0033] FIG. 6 shows a cross-section through the integrated circuit
shown in FIG. 5 after the removal of the photoresist mask 17. At a
predetermined location there is a connection region 18'. At least
in a region around the connection region 18', the barrier layer 15
is uncovered and is thereby exposed to oxidation or corrosion.
[0034] FIG. 7 shows a cross section through an integrated circuit
for the purpose of explaining the first embodiment of the present
invention.
[0035] FIG. 7 illustrates the integrated circuit shown in FIG. 6,
except that a solder ball, which is used to make vertical contact,
for example with a printed circuit board or further integrated
circuits, has been applied to the contact region 18', i.e. the
patterned protection device 16. This ensures that electrical
contact is made between the contact device 11 and the connection
device 18, which preferably comprises a solder ball, via the
rewiring device 13, 14, 15 and 16.
[0036] As indicated by dotted lines in FIG. 7, it is not necessary
for the entire protection device 16 above the barrier device 15 to
be removed, but at least a region around the connection region 18',
which is wetted with solder, has to be taken out of the protection
device 16, i.e. in this region around the connection device 18 it
must be possible for the barrier layer 15 to be uncovered and
oxidized. Since the passivated metal, preferably nickel, of the
barrier layer 15 is not wetted by solder, it serves as a solder
stop device.
[0037] FIG. 8 shows a cross section through an integrated circuit
as shown in FIG. 3, but without an applied protection device, for
the purpose of explaining a second embodiment of the present
invention.
[0038] In FIG. 8, a patterned photoresist structure 17 has been
applied to the barrier layer 15, which preferably consists of an
oxidizable metal, such as Ni. However, this photoresist structure
17 represents a negative structure compared to the photo resist
structure shown in FIG. 4. In this case, the surfaces of the
barrier device 15 which are covered by the photoresist structure 17
are to be protected from deposition during a subsequent application
of a metallization 16, which is preferably carried out by means of
electrochemical plating. In this case too, as described with
reference to FIG. 4, the patterned photoresist structure 17 is
achieved using known photolithographic means.
[0039] FIG. 9 shows the integrated circuit presented in FIG. 8 in
cross section after the application of a-protection device 16,
which preferably consists of Au. The protection device 16, which in
particular forms a protection against corrosion and includes a
material which can easily be wetted by solder, is preferably
deposited in an electrochemical plating process.
[0040] FIG. 10 shows the integrated circuit as shown in FIG. 9 in
cross section after the removal of the photomask structure.
Furthermore, the statements which have been made in connection with
FIG. 6 also apply to FIG. 10.
[0041] 11 shows a cross section through the integrated circuit with
an applied contact device 18 on the readily wettable protection
device 16, around which, at least in a region, the barrier layer 15
is uncovered and oxidized. Therefore, it is not wetted by solder,
even if the solder ball 18 for making contact with a printed
circuit board, a further semiconductor device or integrated circuit
in the vertical direction, is liquefied again in order to make
electrical contact with the corresponding other device. In
addition, the statements which have been made in connection with
FIG. 7 also apply.
[0042] According to the second embodiment, in which the readily
wettable protection device 16 is applied to the barrier layer 15
only at the locations where there is no photoresist 17, it is
possible to dispense with an expensive photographic step. In
general, there are no adhesion problems with the present solder
stop passivation, which means that solder cannot run under a stop
resist, as is the case when using soldering stop resist, which
ultimately results in cost savings.
[0043] Although the present invention has been described above on
the basis of preferred exemplary embodiments, it is not restricted
to these embodiments, but rather can be modified in numerous
ways.
[0044] In particular, the choice of metal described (copper,
nickel, gold, aluminum, titanium, etc.) and layer sequences is to
be considered purely as an example; Ni, Cu, Al and Ti are to be
understood as oxidizable metallizations, unlike Au.
* * * * *