U.S. patent application number 10/096140 was filed with the patent office on 2003-09-11 for method of passivating and/or removing contaminants on a low-k dielectric/copper surface.
Invention is credited to Dostalik, William Wesley, Farber, David Gerald, Kraft, Robert, McKerrow, Andrew J., Newton, Kenneth Joseph, Tsui, Ting.
Application Number | 20030170992 10/096140 |
Document ID | / |
Family ID | 29548170 |
Filed Date | 2003-09-11 |
United States Patent
Application |
20030170992 |
Kind Code |
A1 |
Farber, David Gerald ; et
al. |
September 11, 2003 |
Method of passivating and/or removing contaminants on a low-k
dielectric/copper surface
Abstract
One aspect of the invention relates to a method of removing
contaminants from a low-k film. The method involves forming a
sacrificial layer over the contaminated film. The contaminants
combine with the sacrificial layer and are removed by etching away
the sacrificial layer. An effective material for the sacrificial
layer is, for example, a silicon carbide. The method can be used to
prevent the occurrence of pattern defects in chemically amplified
photoresists formed over low-k films.
Inventors: |
Farber, David Gerald;
(Wylie, TX) ; Dostalik, William Wesley; (Plano,
TX) ; Kraft, Robert; (Plano, TX) ; McKerrow,
Andrew J.; (Dallas, TX) ; Newton, Kenneth Joseph;
(Mckinney, TX) ; Tsui, Ting; (Dallas, TX) |
Correspondence
Address: |
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS
TX
75265
|
Family ID: |
29548170 |
Appl. No.: |
10/096140 |
Filed: |
March 8, 2002 |
Current U.S.
Class: |
438/694 ;
257/E21.215; 257/E21.252; 257/E21.257; 257/E21.266; 257/E21.576;
438/778 |
Current CPC
Class: |
H01L 21/314 20130101;
H01L 21/306 20130101; H01L 21/76829 20130101; H01L 21/31116
20130101; H01L 21/76801 20130101; H01L 21/31144 20130101 |
Class at
Publication: |
438/694 ;
438/778 |
International
Class: |
H01L 021/4763; H01L
021/311; H01L 021/31; H01L 021/469 |
Claims
What is claimed is:
1. A method of removing a contaminant from a low-k dielectric,
comprising: forming a sacrificial layer over the low-k dielectric;
and etching to remove the sacrificial layer.
2. The method of claim 1, wherein the sacrificial layer reacts with
the contaminant.
3. The method of claim 1, wherein the sacrificial layer comprises a
barrier material.
4. The method of claim 3, wherein the barrier material is silicon
carbide.
5. The method of claim 1, wherein the sacrificial layer comprises a
material that reacts with ammonia.
6. The method of claim 1, further comprising, after forming the
sacrificial layer and before etching the sacrificial layer: forming
a layer of a second material that absorbs the contaminant; and
etching to remove the second material.
7. The method of claim 6, wherein the second material is a low-k
dielectric.
8. The method of claim 1, further comprising contacting the
substrate with a solvent after forming the sacrificial layer and
before etching the sacrificial layer.
9. The method of claim 8, wherein the solvent comprises an acidic
solution.
10. The method of claim 1, wherein etching to remove the
sacrificial layer comprises dry etching with a chemistry that
removes small ceramic particles.
11. A method of patterning a low-k dielectric over a substrate,
comprising: forming a sacrificial layer over the substrate; etching
to remove the sacrificial layer; forming a low-k dielectric layer
over the substrate; coating the low-k dielectric layer with a
chemically amplified photoresist; selectively exposing the
photoresist to actinic radiation; developing the photoresist; and
etching the low-k dielectric layer using the photoresist as a
mask.
12. The method of claim 11, wherein the resist comprises a
photo-acid.
13. The method of claim 11, further comprising forming a barrier
layer over the substrate prior to forming the low-k dielectric
layer.
14. The method of claim 13, further comprising forming a second
barrier layer over the low-k dielectric layer prior to coating with
the resist.
15. The method of claim 11, wherein etching to remove the
sacrificial layer comprises dry etching with a chemistry that
removes small ceramic particles.
16. The method of claim 11, wherein the substrate comprises a
second low-k dielectric layer.
17. The method of claim 11 wherein the sacrificial layer reacts
with ammonia.
18. The method of claim 11 wherein the sacrificial layer comprises
SiC.
Description
FIELD OF THE INVENTION
[0001] The present invention relates generally to semiconductor
device manufacturing and more particularly to methods of forming
metal interconnects.
BACKGROUND OF THE INVENTION
[0002] Integrated circuits include many discrete semiconductor
devices. A multi-level network of metal within dielectric overlies
and connects these discrete devices. For many years, the metal used
was generally aluminum or an aluminum alloy. More recently, copper
has been used in place of aluminum because copper's higher
conductivity improves circuit performance.
[0003] Two major obstacles had to be overcome before copper could
be used in integrated circuits. First, copper is difficult to etch
in order to form wiring patterns. Second, copper diffuses rapidly.
Copper can diffuse into silicon where it can cause junction
failure. Copper can also diffuse through dielectric layers,
degrading them and eventually traveling though them into device
regions.
[0004] The problem of forming copper wiring patterns has been
successfully overcome using damascene processes. In a damascene
process, openings that form an image of an interconnection pattern
are patterned in a dielectric layer. Copper is deposited or grown
within these openings. Polishing is used to coplanarize the
dielectric layer and the copper. This leaves a copper
interconnection pattern inlaid within the dielectric layer. In a
single damascene process, the dielectric is patterned through.
Inter-level contacts are formed with one deposition and polishing
step, and wiring with another deposition and polishing step. In a
dual damascene process, the dielectric is patterned with both
trenches and vias, whereby both inter-level contacts and wiring can
be formed with a single metal deposition and polishing step.
Regardless of which type of process is used, multiple layers are
formed to create complex interconnection patterns.
[0005] The problem of copper diffusion into silicon and dielectric
layers has been overcome using diffusion barriers. Layers of
diffusion barrier material are provided between copper and adjacent
dielectric or silicon. A variety of barrier materials have been
reported. Conductive barrier materials include compounds of
transition metals such as tantalum nitride, titanium nitride, and
tungsten nitride as well as various transition metals themselves.
Dielectric barrier materials include silicon nitride, silicon
oxynitride, and PSG (a phophosilicate glass).
[0006] While the forgoing solutions have been implemented and
copper has now been used for some time in integrated circuits,
there is a continuing need to improve integrated circuit
performance. For several years, efforts to improve integrated
circuit performance have focused on replacing conventional
dielectric materials, generally silicon dioxide, with low
dielectric constant (low-k) materials. These materials provide a
lower capacitance than silicon dioxide and consequently, increase
circuit speed by decreasing the corresponding RC delay. Low-k
barrier materials, such as SiC, are generally used with low-k
dielectrics to achieve the goal of lowering overall
capacitance.
[0007] Unfortunately, difficulties have arisen when patterning
low-k dielectric layers. Low-k dielectric layers are patterned
using lithography. Lithography refers to processes for pattern
transfer between various media. In lithography for integrated
circuit fabrication, the substrate or dielectric or other film to
be patterned is coated uniformly with a radiation-sensitive film,
the resist. The film is selectively exposed with radiation (such as
visible light, ultraviolet light, x-rays, or an electron beam)
through an intervening master template, the mask or reticle,
forming a particular pattern. Exposed areas of the coating become
either more or less soluble than the unexposed areas, depending on
the type of coating, in a particular solvent developer. The more
soluble areas are removed with the developer in a developing step.
The less soluble areas remain on the substrate forming a patterned
coating. The pattern of the coating corresponds to the image, or
negative image, of the reticle. The patterned coating is used in
further processing of the substrate, dielectric or other film.
[0008] One type of photoresist is a chemically amplified deep UV
photoresist. A deep UV photoresist often is employed because
resolution in lithography systems is primarily limited by
diffraction of radiation passing through the reticle. Employing the
small wavelengths of deep UV light reduces diffraction, however, it
is difficult to produce deep UV light at high intensity. To
compensate, a chemically amplified photoresist is used. In a
chemically amplified photoresist, the radiation generates a
catalyst, typically an acid, which catalyzes a solubility-changing
reaction that occurs during a post-bake operation following
selective exposure of the photoresist to actinic radiation.
Sometimes contaminants can occur which may impact negatively the
pattern of the resist, which then may be transferred to an
underlying material during subsequent patterning.
[0009] Attempts have been made to remove contaminants from low-k
dielectrics using conventional techniques, such as washing with
solvents. Unfortunately, conventional techniques have not proven
effective in preventing contamination of chemically amplified
photoresist formed over low-k dielectrics. There remains an
unsatisfied need for a method of dealing with contamination when
low-k dielectrics are employed.
SUMMARY OF THE INVENTION
[0010] The following presents a simplified summary in order to
provide a basic understanding of some aspects of the invention.
This summary is not an extensive overview of the invention. It is
intended neither to identify key or critical elements of the
invention nor to delineate the scope of the invention. Rather, the
primary purpose of the summary is to present some concepts of the
invention in a simplified form as a prelude to the more detailed
description that is presented later.
[0011] One aspect of the invention relates to a method of removing
contaminants from a low-k film. The method involves forming a
sacrificial layer over the contaminated film. The contaminants
combine with the sacrificial layer and are removed by etching away
the sacrificial layer. An effective material for the sacrificial
layer is, for example, a silicon carbide. The method can be used to
prevent the occurrence of pattern defects in chemically amplified
photoresists formed over low-k films.
[0012] To the accomplishment of the foregoing and related ends, the
following description and annexed drawings set forth in detail
certain illustrative aspects and implementations of the invention.
These are indicative of but a few of the various ways in which the
principles of the invention may be employed. Other aspects,
advantages and novel features of the invention will become apparent
from the following detailed description of the invention when
considered in conjunction with the drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] FIGS. 1A-1C are schematic illustrations of a resist
undergoing exposure and development;
[0014] FIGS. 2A-2C are schematic illustrations of a resist
undergoing exposure and development and experiencing a pattern
defect due to contamination;
[0015] FIG. 3A is a cross section diagram illustrating a defect
associated with a dielectric layer with a barrier layer lying
thereover;
[0016] FIGS. 3B-3C are plan views of SEM photographs illustrating a
contaminant underlying a barrier layer and a dielectric layer,
respectively;
[0017] FIG. 4A is a cross section diagram illustrating an etch back
of the barrier layer of FIG. 3A, revealing the defect associated
with the underlying dielectric layer;
[0018] FIG. 4B is a plan view of an SEM photograph illustrating the
exposed defect of FIG. 4A;
[0019] FIG. 5A is a cross section diagram illustrating the
dielectric layer of FIG. 4A after substantially complete removal of
the barrier layer of FIG. 4A, wherein removal of the barrier layer
results in removal of the contaminant previously associated with
the dielectric layer;
[0020] FIG. 5B is a plan view of an SEM photograph illustrating the
dielectric layer of FIG. 5A after removal of the barrier layer and
the contaminant;
[0021] FIG. 6A is a cross section diagram illustrating a second
dielectric layer overlying a barrier layer and the initial
dielectric layer after removal of the sacrificial barrier
layer;
[0022] FIG. 6B is a plan view of an SEM photograph illustrating a
portion of a second dielectric layer of FIG. 6A in accordance with
the present invention, wherein contaminants associated with
underlying low-k dielectric material has been eliminated;
[0023] FIG. 7 is fragmentary a cross section diagram illustrating a
patterned photoresist layer free of pattern defects in accordance
with the present invention; and
[0024] FIG. 8 is a flow chart of a process according to another
aspect of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0025] The present invention will now be described with reference
to the attached drawings, wherein like reference numerals are used
to refer to like elements throughout. The present invention relates
to a method of eliminating or mitigating the negative effects of
contaminants (e.g., associated with a dielectric layer) on a resist
such as a DUV resist during semiconductor processing. According to
one exemplary aspect of the invention, a sacrificial layer is
formed over a dielectric film that may have one or more
contaminants associated therewith. The potential contaminants are
then removed by the removal of the sacrificial layer. Subsequently,
one or more layers may then be formed over the dielectric and any
subsequent patterned resist formed thereover then avoids pattern
defects associated with the contaminants.
[0026] Historically, contaminants were not a significant problem
with dense dielectric materials such as silicon dioxide, and with
high quality diffusion barriers that were patterned with DUV resist
or when the pattern was made with non-chemically amplified resists.
However, it was noted by the inventors of the present invention
that when using low-k dielectric materials, DUV resist in some
cases would not take a pattern. That is, the desired pattern
transfer from the photomask to the resist did not occur with
sufficient accuracy (e.g., pattern defects). Although the exact
cause of the problem is not known, it is believed that amino
by-products from previous processing steps may be causing a source
of contamination.
[0027] Referring generally to FIGS. 1A-1C, a light source is shown
through a patterned opaque plate intended to illuminate
predetermined regions in the resist that will be removed during
subsequent development. When the photons impinge on regions of the
resist, an acid is generated in local regions where the light is
absorbed. After exposure to the DUV energy, the wafer is subjected
to a post exposure bake (e.g., moved to a hot plate), where the
acid induces subsequent chemical transformations including the
changing of the solubility of the resist. Following the post
exposure bake (PEB), a developer solution is placed on the wafer to
remove the resist with the higher solubility.
[0028] In particular, in FIG. 1A, a photoresist 10 is illustrated
as a composition of polymer chains 12 with protection groups 14 and
photon acid generators 16. Then in FIG. 1B, the transposing of a
pattern into the resist is accomplished when acid is generated from
DUV light 18 through a photomask 20. A reaction is then brought
between the acid and the protection groups 14 with the PEB in FIG.
1C. This reaction converts an un-soluble matrix into one that is
soluble in common base developers and thus leads to a pattern
created by dissolution of the resist 10 in the light exposed
regions (for a positive type resist, for example). In contrast, in
FIGS. 2A-2C, an exemplary illustration is provided to show how it
is believed that a base contaminate in the photoresist neutralizes
the photon-generated acid before reactions can occur, which
prevents proper resist patterning and resulting in a pattern
defect.
[0029] The move to low-k materials as the inter-metal dielectric
has required the use, in some instances, of low quality diffusion
barriers in order to satisfy the overall capacitance (k-value) of
the film stack. This has inadvertently affected how well
contaminants are contained near their original location beneath the
diffusion barrier film. In addition to the low quality diffusion
barriers, the intrinsic porosity of low-k material compounds the
above problem by acting as a reservoir for contaminants. The low-k
material is expected to act as both a conduit and a storage center
for contaminants generated in prior or future processing steps.
Considering the potential for the low-k material to trap and act as
a source of contaminants, coupled with the lower quality of some
diffusion barriers, pattern defects discussed above are expected to
form in overlying photoresists due to diffusion of such
contaminants in underlying materials.
[0030] Turning to FIG. 3A, a typical integration using a low-k
material with copper starts with a patterned low-k dielectric 30
that has been patterned, etched and filled with metal 32 such as
copper, and then chemically mechanically polished (CMP) to form
metal lines. During the CMP process, it is speculated by the
inventors of the present invention that CMP slurry and/or residue
is left on top of the low-k material and likely is absorbed into
the surface thereof. After CMP cleaning, a passivation or barrier
layer 34 is deposited over the copper 32 and low-k film 30. In some
instances, the barrier deposition is followed by the deposition of
another low-k dielectric (not shown) that will be subsequently
patterned. If the photoresist used for such patterning fails to
take the photon generated pattern due to the presence of a defect
36, the etch process will also fail local to the defect location
and thus the desired shape will not be generated.
[0031] It is believed by the inventors of the present invention
that something is either hindering the acid in the resist from
being generated or neutralized once it has been generated. Since
some CMP processes use a solution with a high pH (base solution) to
clean the surface, it is possible that some of the base may be
absorbed by the low-k dielectric 30 or trapped in remaining residue
and later released. Once at the surface, the base may neutralize
the acid and prevent the photoresist from taking the pattern.
Another potential source identified by the inventors is the
NH.sub.3 pretreatment prior to the barrier deposition.
[0032] In appreciating the problem above and the various potential
causes of such pattern defects within the resist, the inventors of
the present invention hypothesized that by depositing a sacrificial
layer (e.g., a reactive film) over the low-k dielectric material
(e.g., the contamination source), a reaction may occur with the
defect. Then, by removing the sacrificial layer (e.g., with an etch
back process) the defect is also removed.
[0033] To test the above hypothesis, the inventors of the present
invention prepared a test wafer. Upon depositing the low-k
dielectric film 30 over the substrate (e.g., as the second
inter-metal dielectric overlying active circuitry), a defect 36 was
found therein or otherwise associated therewith, as illustrated in
FIG. 3A. A sacrificial film, in this example a SiC film 34 was
formed over the low-k layer 30, and the defect 36 was again
observed, as illustrated in FIG. 3B. FIG. 3C illustrates an affect
of an untreated defect on the photoresist (e.g., lines and spaces
are not formed in the photoresist in the vicinity of an underlying
defect). A partial etch back process was then performed on the
barrier layer 34 to expose a portion of the defect, as illustrated
in FIGS. 4A and 4B, and finally the entire sacrificial layer 34 36
was removed by the remaining portion of the etch back process, and
the defect was eliminated, as illustrated in FIGS. 5A and 5B. After
removal of the defect, a new barrier layer 40 is formed thereover,
followed by another low-k dielectric film 42 and a patterned
photoresist 44, as illustrated in FIG. 6A. Upon evaluating the
photoresist, the defect location is eliminated, and a potential
pattern defect in the photoresist due to the contaminant is
eliminated, as illustrated in FIG. 6B.
[0034] In light of the inventors' appreciation of the problem and
above tests in light of the inventors' hypothesis, FIG. 7
illustrates an exemplary device 100 formed according to one aspect
of the present invention. Device 100 includes substrate 101,
underlying dielectric layer 103, copperfeatures 105, barrier layer
107, overlying dielectric layer 109, and patterned resist 111.
Contaminants have been removed from the underlying dielectric layer
103 by a process according to the present invention. Without such a
process, contaminants could have diffused from the underlying
dielectric layer 103, through the barrier layer 107, and through
the overlying dielectric layer 109, into the resist layer 111
wherein the contaminants could have affected the formation of the
resist pattern.
[0035] FIG. 8 is a flow chart of a process 200 for providing a
patterned low-k dielectric film or other layer over an underlying
low-k dielectric film according to one aspect of the present
invention. Acts 201 and 203 are forming a layer of sacrificial
material over the underlying low-k dielectric film and then
removing that sacrificial material. These acts remove contaminants
from the underlying low-k dielectric film. The process 200
continues with forming a barrier/etch stop layer, act 205, forming
the overlying low-k dielectric film, act 207, forming a resist
coating, act 209, patterning the resist coating, act 211, and
etching the overlying low-k dielectric film using the patterned
resist coating as a mask, act 213.
[0036] The underlying low-k dielectric film is generally provided
over a semiconductor substrate. A semiconductor includes a
semiconductor, which is typically silicon. Other examples of
semiconductors include GaAs and InP. In addition to a
semiconductor, the substrate may include various elements therein
and/or layers thereon. These can include metal layers, barrier
layers, dielectric layers, device structures, active elements and
passive elements including silicon gates, word lines, source
regions, drain regions, bit lines, bases emitters, collectors,
conductive lines, conductive vias, etc.
[0037] A low-k dielectric is a dielectric material having a
dielectric constant significantly lower than that of silicon
dioxide. Examples of low-k dielectrics include porous glasses and
polyimide nanofoams. Porous glasses include organosilicate glasses
(OSGs). The low-k dielectric can be organic or inorganic. Examples
or organic low-k dielectric include benzocyclobutene, parylene,
polyarylene ethers, and fluorocarbons. Examples of inorganic low-k
dielectrics include porous silica, fluorinated amorphous carbon,
methyl silsesquioxane, hydrogen silsesquioxane, and fluorinated
silicon dioxide. Specific examples of low-k dielectric materials
include Applied Material's Black Diamond.RTM., Novellus'
Coral.RTM., Allied Signal's Nanoglass.RTM. and FLARE.RTM., JSR's
LKD5104.RTM., Texas Instrument's Xerogel.RTM., and Dow Chemical's
BCB.RTM. and SiLK.RTM.. The low-k dielectric can be applied by any
suitable means, including for example, spin coating or CVD.
[0038] The invention is suitable for removing a variety of
contaminants. In one embodiment, the contaminant is a base. In a
more specific embodiment, the contaminant is an amine, such as
ammonia.
[0039] Act 201 is forming a sacrificial layer over the underlying
low-k dielectric layer. The sacrificial layer is of a suitable type
whereby the contaminant diffuses from the underlying low-k
dielectric layer into the sacrificial layer. Preferably, the
sacrificial layer reacts with the contaminant. Preferably, the
sacrificial layer can be etched with selectivity against the low-k
dielectric. In one embodiment, the sacrificial layer includes a
barrier material. Examples of barrier materials include silicon
carbide, silicon nitride, tantalum, tantalum nitride, titanium
nitride, tungsten nitride, silicon oxynitride, and PSG (a
phophosilicate glass). A barrier material for a sacrificial layer
does not have to be the same as the barrier material used to form
barriers in the finished device. However, one advantage of using
the barrier material of the finished device to form the sacrificial
layer is that contaminants that diffuse into the sacrificial
material will include all the contaminants that could diffuse
through the subsequently formed barrier layer and thereby
potentially affect an overlying photoresist.
[0040] The sacrificial layer can be of any suitable thickness. In
one embodiment, the sacrificial layer is from about 0.01 .mu.m to
about 100 .mu.m thick. In another embodiment, the sacrificial layer
is from about 0.2 .mu.m to about 10 .mu.m thick. In a further
embodiment, the sacrificial layer is from about 0.3 .mu.m to about
1 .mu.m thick.
[0041] The sacrificial layer may be formed by any suitable process,
including spin coating or CVD, for example. Mild heating may
facilitate contaminant removal. Such heating may take place during
the process of forming the sacrificial layer. Optionally, however,
heat can be provided to facilitate diffusion into and/or reaction
of contaminants with the sacrificial film. In one embodiment, the
substrate, along with the sacrificial film, is heated to at least
about 100.degree. C. In another embodiment, it is heated to at
least about 150.degree. C. In a further embodiment, it is heated to
at least about 200.degree. C. The temperature is maintained for a
short time. In one embodiment, it is maintained for at least about
10 minutes. In another embodiment, it is maintained for at least
about 20 minutes. In a further embodiment, it is maintained for at
least about 30 minutes.
[0042] The sacrificial layer formed with act 201 is removed by act
203. Acts 201 and 203 together provide a process for cleaning the
underlying low-k dielectric. Generally, the sacrificial layer is
removed by etching. Etching can be wet or dry, but dry etching is
preferred. For example, where the sacrificial layer is SiC, it can
be dry etched using a combination of O.sub.2, CF.sub.4, CH.sub.3F,
N.sub.2 and Ar. A small portion of the underlying low-k dielectric,
typically less that about 1000 .ANG., is sometimes removed together
with the sacrificial layer.
[0043] The contaminants removed from the underlying low-k
dielectric may result from chemical mechanical polishing. In
addition to reactive contaminants, chemical mechanical polishing
may leave behind small ceramic particle. Preferable, the process of
removing sacrificial layer is also effective in removing any small
ceramic particles left over from chemical mechanical polishing.
This can be accomplished with a dry etch chemistry including, for
example, a fluorine compound and/or Argon.
[0044] After removing the sacrificial layer, an overlying low-k
dielectric layer, or a layer of another material, can be formed and
patterned. Before forming the overlying low-k dielectric layer, a
barrier/etch stop layer is deposited with act 205. Generally, this
barrier/etch stop layer has a relatively low-k value. The overlying
low-k dielectric layer is formed with act 207.
[0045] Act 209 is forming the resist coating over the low-k
dielectric layer. Any suitable resist can be used. However, the
invention is particularly useful when the resist is chemically
amplified. Preferably, the resist contains a photo-acid, such as a
compound that forms an acid on exposure to deep-UV radiation. The
resist coating is applied by any suitable means, including, for
example, spin coating.
[0046] Optionally, another barrier layer is provided between the
resist and the overlying low-k dielectric. Such a barrier layer can
provide additional protection against contamination of the
resist.
[0047] Act 211 is selectively exposing the resist to actinic
radiation and developing the resist. Exposure takes place through
an intervening mask or reticle. Developing the resist generally
includes a post-exposure bake followed by removal of the more
soluble portions of the resist using a suitable solvent
developer.
[0048] Act 213 is etching the overlying low-k dielectric, whereby
the mask pattern is transferred into the overlying low-k
dielectric. For example, where the low-k dielectric is OSG, it can
be dry etch using Ar, N.sub.2, and C.sub.4F.sub.8. The resist is
subsequently stripped, another barrier layer is provided, and the
gaps in the overlying dielectric layer are filled with copper.
[0049] Between acts 201 and 203, providing and removing the
sacrificial layer, additional procedures can be carried out to
facilitate the removal of contaminants from the underlying low-k
film. In one embodiment, a second sacrificial layer can be provided
and then removed. The second sacrificial layer can be, for example,
a low-k dielectric layer, which will generally be effective in
absorbing the types of contaminants found in the underlying low-k
dielectric.
[0050] In another embodiment, a solvent for the contaminant is
applied over the sacrificial layer. For example, a weak acid
solution can be used as a solvent for amine contaminants. The
sacrificial layer may prevent the solvent from contacting the
underlying low-k dielectric layer. In addition, it should be
understood that the present invention is applicable to standard
semiconductor processing as well as re-work type processing, and
both applications, as well as others, are contemplated as falling
within the scope of the present invention.
[0051] Although the invention has been illustrated and described
with respect to one or more implementations, equivalent alterations
and modifications will occur to others skilled in the art upon the
reading and understanding of this specification and the annexed
drawings. In particular regard to the various functions performed
by the above described components (assemblies, devices, circuits,
systems, etc.), the terms (including a reference to a "means") used
to describe such components are intended to correspond, unless
otherwise indicated, to any component which performs the specified
function of the described component (e.g., that is functionally
equivalent), even though not structurally equivalent to the
disclosed structure which performs the function in the herein
illustrated exemplary implementations of the invention. In
addition, while a particular feature of the invention may have been
disclosed with respect to only one of several implementations, such
feature may be combined with one or more other features of the
other implementations as may be desired and advantageous for any
given or particular application. Furthermore, to the extent that
the terms "includes", "having", "has", "with", or variants thereof
are used in either the detailed description and the claims, such
terms are intended to be inclusive in a manner similar to the term
"comprising."
* * * * *