Grooves formed around a semiconductor device on a circuit board
Ohsawa , et al. September 30, 2
U.S. patent number D577,691 [Application Number D/303,833] was granted by the patent office on 2008-09-30 for grooves formed around a semiconductor device on a circuit board. This patent grant is currently assigned to Nitto Denko Corporation. Invention is credited to Tetsuya Ohsawa, Emiko Tani.
| United States Patent | D577,691 |
| Ohsawa , et al. | September 30, 2008 |
Grooves formed around a semiconductor device on a circuit board
Claims
CLAIM The ornamental design for grooves formed around a semiconductor device on a circuit board, as shown and described.
| Inventors: | Ohsawa; Tetsuya (Ibaraki, JP), Tani; Emiko (Ibaraki, JP) |
|---|---|
| Assignee: | Nitto Denko Corporation (Osaka,
JP) |
| Appl. No.: | D/303,833 |
| Filed: | February 19, 2008 |
Related U.S. Patent Documents
| Application Number | Filing Date | Patent Number | Issue Date | ||
|---|---|---|---|---|---|
| 29240188 | Oct 11, 2005 | D566060 | |||
Foreign Application Priority Data
| Apr 13, 2005 [JP] | 2005-010991 | |||
| Apr 13, 2005 [JP] | 2005-010992 | |||
| Apr 13, 2005 [JP] | 2005-010995 | |||
| Current U.S. Class: | D13/182 |
| Current International Class: | 1303 |
| Field of Search: | ;D13/182,158-177 ;336/200 ;324/754 ;D1/106 ;D19/10 ;361/813 |
References Cited [Referenced By]
U.S. Patent Documents
| 3676748 | July 1972 | Kobayashi et al. |
| D279670 | July 1985 | Lukits |
| D288556 | March 1987 | Wallgren |
| D295401 | April 1988 | Klees |
| 5008614 | April 1991 | Shreeve et al. |
| D318271 | July 1991 | Hasegawa et al. |
| D319629 | September 1991 | Hasegawa et al. |
| D374541 | October 1996 | Garza |
| 5969590 | October 1999 | Gutierrez |
| 6114937 | September 2000 | Burghartz et al. |
| D487430 | March 2004 | Asaka et al. |
| D510103 | September 2005 | Allard et al. |
Assistant Examiner: Johannes; Thomas J
Attorney, Agent or Firm: Osha .cndot. Liang LLP
Description
FIG. 1 shows a plan view of grooves formed around a semiconductor device on a circuit board showing our new design.
FIG. 2 shows an enlarged view of the claimed portion identified by the area boxed by the dot-dash line in FIG. 1; and,
FIG. 3 shows an enlarged sectional view along the line III--III in FIG. 2.
The special dot-dash broken line defines the boundary of the claimed design; the gray stippling indicates the surface of the groove bed; the broken lines show unclaimed subject matter forming no part of the claimed design.
* * * * *
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 