U.S. patent number D470,824 [Application Number D/156,570] was granted by the patent office on 2003-02-25 for semiconductor device.
This patent grant is currently assigned to Mitsubishi Denki Kabushiki Kaisha. Invention is credited to Toru Iwagami, Mitsutaka Iwasaki, Hisashi Kawafuji.
United States Patent |
D470,824 |
Iwasaki , et al. |
February 25, 2003 |
Semiconductor device
Claims
The ornamental design for a semiconductor device, as shown and
described.
Inventors: |
Iwasaki; Mitsutaka (Tokyo,
JP), Iwagami; Toru (Tokyo, JP), Kawafuji;
Hisashi (Fukuoka, JP) |
Assignee: |
Mitsubishi Denki Kabushiki
Kaisha (Tokyo, JP)
|
Appl.
No.: |
D/156,570 |
Filed: |
March 5, 2002 |
Foreign Application Priority Data
|
|
|
|
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Nov 30, 2001 [JP] |
|
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2001-035251 |
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Current U.S.
Class: |
D13/182 |
Current International
Class: |
1303 |
Field of
Search: |
;D13/182
;174/16.3,52.1,52.2,52.4 ;257/670,672,676,686,688,690,696,703,787
;361/736,742,748,752,760,761,774,783,784,785,798,813,820 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Shooman; Ted
Assistant Examiner: Sikder; Selina
Attorney, Agent or Firm: Oblon, Spivak, McClelland, Maier
& Neustadt, P.C.
Description
FIG. 1 is a front, top and right side perspective view of a
semiconductor device, showing our new design;
FIG. 2 is a rear, bottom and left side perspective view
thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a top plan view thereof;
FIG. 6 is a bottom plan view thereof;
FIG. 7 is a left side elevational view thereof;
FIG. 8 is a right side elevational view thereof; and,
FIG. 9 is a cross-sectional view thereof, taken along line 9--9 of
FIG. 3, with the internal system omitted.
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