Semiconductor
Mochizuki , et al. September 29, 1
U.S. patent number D260,986 [Application Number 06/015,159] was granted by the patent office on 1981-09-29 for semiconductor. This patent grant is currently assigned to Hitachi, Ltd.. Invention is credited to Hideki Kosaka, Hidetoshi Mochizuki, Gen Murakami, Keizo Otsuki.
| United States Patent | D260,986 |
| Mochizuki , et al. | September 29, 1981 |
Semiconductor
Claims
The ornamental design for a semiconductor, as shown.
| Inventors: | Mochizuki; Hidetoshi (Fuchu, JP), Otsuki; Keizo (Higashiyamayo, JP), Kosaka; Hideki (Kodaira, JP), Murakami; Gen (Machida, JP) |
|---|---|
| Assignee: | Hitachi, Ltd. (Tokyo,
JP) |
| Appl. No.: | 06/015,159 |
| Filed: | February 26, 1979 |
Foreign Application Priority Data
| Aug 25, 1978 [JP] | 53-35731 | |||
| Current U.S. Class: | D13/182 |
| Current International Class: | D1303 |
| Field of Search: | ;D13/12,99,40,41 ;174/52R,52PE,52S,52FP,50.5,50.52,50.56 ;357/70,73,74,80 |
References Cited [Referenced By]
U.S. Patent Documents
| 3208892 | September 1965 | Miller et al. |
| 3436451 | April 1969 | Wasser |
| 4012766 | March 1977 | Phillips et al. |
Other References
|
Electronics, 3-17-1977, p. 89, LSI Package, Leaded B Type. . Electronics, 11-24-1977, p. 145, Integrated Circuit Housing.. |
Primary Examiner: Lucas; Susan J.
Attorney, Agent or Firm: Craig and Antonelli
Description
FIG. 1 is a right side, top and front perspective view of a semiconductor showing our new design.
FIG. 2 is a rear elevational view thereof;
FIG. 3 is a left side view thereof;
FIG. 4 is a bottom view thereof.
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