U.S. patent application number 16/588600 was filed with the patent office on 2020-04-02 for selective passivation and selective deposition.
This patent application is currently assigned to ASM IP Holding B.V.. The applicant listed for this patent is ASM IP Holding B.V.. Invention is credited to Shaoren Deng, Michael Eugene Givens, Suvi P. Haukka, Andrea Illiberi, Delphine Longrie, Jan Willem Hub Maes, Vamsi Paruchuri, Ivo Johannes Raaijmakers, Eva E. Tois.
Application Number | 20200105515 16/588600 |
Document ID | / |
Family ID | 69946453 |
Filed Date | 2020-04-02 |
![](/patent/app/20200105515/US20200105515A1-20200402-D00000.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00001.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00002.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00003.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00004.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00005.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00006.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00007.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00008.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00009.png)
![](/patent/app/20200105515/US20200105515A1-20200402-D00010.png)
View All Diagrams
United States Patent
Application |
20200105515 |
Kind Code |
A1 |
Maes; Jan Willem Hub ; et
al. |
April 2, 2020 |
SELECTIVE PASSIVATION AND SELECTIVE DEPOSITION
Abstract
Methods for selective deposition are provided. Material is
selectively deposited on a first surface of a substrate relative to
a second surface of a different material composition. An inhibitor,
such as a polyimide layer, is selectively formed from vapor phase
reactants on the first surface relative to the second surface. A
layer of interest is selectively deposited from vapor phase
reactants on the second surface relative to the first surface. The
first surface can be metallic while the second surface is
dielectric. Accordingly, material, such as a dielectric transition
metal oxides and nitrides, can be selectively deposited on metallic
surfaces relative dielectric surfaces using techniques described
herein.
Inventors: |
Maes; Jan Willem Hub;
(Wilrijk, BE) ; Givens; Michael Eugene; (Helsinki,
FI) ; Haukka; Suvi P.; (Helsinki, FI) ;
Paruchuri; Vamsi; (Mesa, AZ) ; Raaijmakers; Ivo
Johannes; (Bilthoven, NL) ; Deng; Shaoren;
(Ghent, BE) ; Illiberi; Andrea; (Leuven, BE)
; Tois; Eva E.; (Espoo, FI) ; Longrie;
Delphine; (Ghent, BE) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
ASM IP Holding B.V. |
Almere |
|
NL |
|
|
Assignee: |
ASM IP Holding B.V.
Almere
NL
|
Family ID: |
69946453 |
Appl. No.: |
16/588600 |
Filed: |
September 30, 2019 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
62805471 |
Feb 14, 2019 |
|
|
|
62740124 |
Oct 2, 2018 |
|
|
|
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 21/02189 20130101;
H01L 21/0262 20130101; H01L 21/67213 20130101; H01L 21/02068
20130101; H01L 21/02669 20130101; H01L 21/02178 20130101; H01L
21/02118 20130101; H01L 21/02642 20130101; H01L 21/02565 20130101;
H01L 21/02315 20130101; H01L 21/768 20130101; H01L 21/32 20130101;
H01L 21/02422 20130101; H01L 21/02425 20130101; H01L 21/321
20130101; H01L 21/324 20130101; H01L 21/0228 20130101; H01L
21/31138 20130101 |
International
Class: |
H01L 21/02 20060101
H01L021/02; H01L 21/324 20060101 H01L021/324; H01L 21/67 20060101
H01L021/67 |
Claims
1. A method of selective deposition on a second surface of a
substrate relative to a first surface of the substrate, where the
first and second surfaces have different compositions, the method
comprising, in order: selectively forming an inhibitor layer from
vapor phase reactants on the first surface relative to the second
surface; baking the inhibitor layer; and selectively depositing a
layer of interest from vapor phase reactants on the second surface
relative to the passivation layer.
2. The method of claim 1, additionally comprising treating the
first and second surfaces prior to selectively forming the
inhibitor layer.
3. The method of claim 2, wherein treating comprises exposing the
substrate to a plasma.
4. The method of claim 2, wherein treating comprises exposing the
substrate to a silane, such as an alkylaminosilane.
5. The method of claim 4, wherein treating comprises exposing the
substrate to N-(trimethylsilyl)dimethylamine (TMSDMA) or
trimethylchlorosilane.
6. The method of claim 2, additionally comprising cleaning the
second surface to remove any inhibitor after selectively forming
the inhibitor layer.
7. The method of claim 6, wherein cleaning comprises treatment with
hydrogen plasma.
8. The method of claim 1, wherein baking comprises heating the
substrate to a temperature of from about 300 to 400.degree. C.
9. The method of claim 1, additionally comprising cleaning the
first and second surfaces after selectively depositing the layer of
interest.
10. The method of claim 9, wherein cleaning comprises treating the
surfaces with hydrogen plasma.
11. The method of claim 1, wherein selectively forming an inhibitor
layer comprises selectively vapor depositing an organic layer on
the first surface.
12. The method of claim 11, wherein the organic layer is a
polyimide layer.
13. The method of claim 1, wherein the layer of interest is
selectively deposited by an atomic layer deposition process.
14. The method of claim 1, wherein the first surface comprises a
metal or metallic material and the second surface comprises a
dielectric material.
15. The method of claim 1, wherein the layer of interest comprises
a metal oxide.
16. The method of claim 15, wherein the metal oxide comprises
zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide,
tantalum oxide, yttrium oxide, lanthanum oxide, or other transition
metal oxide or mixtures thereof.
17. The method of claim 15, wherein the metal oxide comprises a
dielectric transition metal oxide.
18. The method of claim 15, wherein the metal oxide comprises
aluminum oxide.
19. The method of claim 18, wherein the aluminum oxide is deposited
using an aluminum precursor comprising trimethyl aluminum (TMA),
dimethylaluminumchloride, aluminum trichloride (AlCl.sub.3),
dimethylaluminum isopropoxide (DMAI) or triethyl aluminum
(TEA).
20. The method of claim 18, wherein the aluminum oxide is deposited
using an aluminum precursor comprising a heteroleptic aluminum
compound comprising an alkyl group and another ligand, such as a
halide, for example Cl.
21. The method of claim 18, wherein the aluminum oxide is deposited
using an aluminum precursor comprising an aluminum alkyl compound
comprising two different alkyl groups as ligands.
22. The method of claim 18, wherein the aluminum compound is
deposited using an aluminum precursor comprising a metalorganic
aluminum compound or an organometallic aluminum compound.
23. The method of claim 1, wherein the layer of interest comprises
a metal nitride.
24. The method of claim 23, wherein the metal nitride is titanium
nitride.
25. The method of claim 24, wherein the titanium nitride is
deposited by a vapor deposition process from TiCl.sub.4 and
NH.sub.3.
26. A cluster tool for selective deposition of a layer of interest
on a second surface of a substrate relative to a first surface of
the substrate, where the first and second surfaces have different
compositions, the cluster tool comprising: a first module
configured for pretreating the substrate; a second module
configured for treating the substrate with plasma; a third module
configured for vapor deposition of an inhibitor on the first
surface of the substrate relative to the second surface of the
substrate; and a fourth module configured for vapor deposition of
the layer of interest.
27. A system for selective deposition of a dielectric on a second
surface of a substrate relative to a first surface of the
substrate, the system comprising: a first chamber configured for
selective deposition of an organic passivation layer and for
partial etch-back of the organic passivation layer; and a second
chamber configured for selective deposition of the dielectric on
the second surface relative to the first surface of the
substrate.
28. A system for selective deposition of a film of interest on a
second surface of a substrate relative to the first surface of the
substrate, the system comprising: a first chamber configured for
pretreating the substrate and for etch processing; a second chamber
configured for selective deposition of an organic passivation
layer; and a third chamber configured for selective deposition of
the film of interest on a second surface of the substrate relative
to the first surface of the substrate.
29. The system of claim 28, wherein the third chamber is further
configured for a bake process.
30. The system of claim 28, further comprising a fourth chamber
configured for a bake process.
Description
INCORPORATION BY REFERENCE TO ANY PRIORITY APPLICATIONS
[0001] This application claims benefit to U.S. Provisional Patent
Application Ser. No. 62/805,471 entitled "Selective Passivation and
Selective Deposition," filed on Feb. 14, 2019 and U.S. Provisional
Patent Application Ser. No. 62/740,124 entitled "Selective
Passivation and Selective Deposition," filed on Oct. 2, 2018, the
contents of each of which are hereby incorporated by reference in
their entireties.
BACKGROUND
Field
[0002] The present disclosure relates generally to selective
deposition of materials on a first surface of a substrate relative
to a second surface of a different material composition.
Description of the Related Art
[0003] The shrinking device dimensions in semiconductor
manufacturing call for new innovative processing approaches.
Conventionally, patterning in semiconductor processing involves
subtractive processes, in which blanket layers are deposited,
masked by photolithographic techniques, and etched through openings
in the mask. Additive patterning is also known, in which masking
steps precede deposition of the materials of interest, such as
patterning using lift-off techniques or damascene processing. In
most cases, expensive multi-step lithographic techniques are
applied for patterning.
[0004] Patterning could be simplified by selective deposition,
which has gained increasing interest among semiconductor
manufacturers. Selective deposition would be highly beneficial in
various ways. Significantly, it could allow a decrease in
lithography steps, reducing the cost of processing. Selective
deposition could also enable enhanced scaling in narrow structures,
such as by making bottom up fill possible. Electrochemical
deposition is one form of selective deposition, as metals can be
formed selectively on conductive elements. Chemical vapor
deposition (CVD) and atomic layer deposition (ALD) are
surface-sensitive techniques vapor deposition techniques and
therefore have been investigated as good candidates for selective
deposition. Selective ALD was suggested, for example, in U.S. Pat.
No. 6,391,785.
[0005] One of the challenges with selective deposition is
selectivity for deposition processes are often not high enough to
accomplish the goals of selectivity. Surface pretreatment is
sometimes available to either inhibit or encourage deposition on
one or both of the surfaces, but often such treatments themselves
call for lithography to have the treatments applied or remain only
on the surface to be treated.
[0006] Accordingly, a need exists for more practical processes for
accomplishing selective deposition.
SUMMARY OF INVENTION
[0007] In one aspect a method is provided for selective deposition
on a second surface of a substrate relative to a first surface of
the substrate, where the first and second surfaces have different
compositions. The method includes, in order: selectively forming an
inhibitor layer from vapor phase reactants on the first surface
relative to the second surface; baking the inhibitor layer; and
selectively depositing a layer of interest from vapor phase
reactants on the second surface relative to the passivation
layer.
[0008] In some embodiments, the method additionally includes
treating the first and second surfaces prior to selectively forming
the inhibitor layer. In some embodiments, the method includes
wherein treating includes exposing the substrate to a plasma. In
some embodiments, treating includes exposing the substrate to a
silane, such as an alkylaminosilane. In some embodiments, treating
includes exposing the substrate to N-(trimethylsilyl)dimethylamine
(TMSDMA) or trimethylchlorosilane. In some embodiment, the method
further includes cleaning the second surface to remove any
inhibitor after selectively forming the inhibitor layer. In some
embodiments, the method includes wherein cleaning comprises
treatment with hydrogen plasma. In some embodiments, baking
includes heating the substrate to a temperature of from about 300
to 400.degree. C.
[0009] In some embodiments, the method further includes cleaning
the first and second surfaces after selectively depositing the
layer of interest. In some embodiments, cleaning includes treating
the surfaces with hydrogen plasma. In some embodiments, the method
further includes wherein selectively forming an inhibitor layer
includes selectively vapor depositing an organic layer on the first
surface. In some embodiments, the organic layer is a polyimide
layer.
[0010] In some embodiments, the layer of interest is selectively
deposited by an atomic layer deposition process. In some
embodiments, the first surface comprises a metal or metallic
material and the second surface comprises a dielectric
material.
[0011] In some embodiments, wherein the layer of interest comprises
a metal oxide. In some embodiments, the metal oxide comprises
zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide,
tantalum oxide, yttrium oxide, lanthanum oxide, or other transition
metal oxide or mixtures thereof. In some embodiments, the metal
oxide comprises a dielectric transition metal oxide. In some
embodiments, the metal oxide comprises aluminum oxide. In some
embodiments, the aluminum oxide is deposited using an aluminum
precursor comprising trimethyl aluminum (TMA),
dimethylaluminumchloride, aluminum trichloride (AlCl.sub.3),
dimethylaluminum isopropoxide (DMAI) or triethyl aluminum (TEA). In
some embodiments, the aluminum oxide is deposited using an aluminum
precursor comprising a heteroleptic aluminum compound comprising an
alkyl group and another ligand, such as a halide, for example Cl.
In some embodiments, the aluminum oxide is deposited using an
aluminum precursor comprising an aluminum alkyl compound comprising
two different alkyl groups as ligands. In some embodiments, the
aluminum compound is deposited using an aluminum precursor
comprising a metalorganic aluminum compound or an organometallic
aluminum compound.
[0012] In some embodiments, the layer of interest comprises a metal
nitride. In some embodiments, the metal nitride is titanium
nitride. In some embodiments, the titanium nitride is deposited by
a vapor deposition process from TiCl.sub.4 and NH.sub.3.
[0013] In another aspect, a cluster tool is provided for selective
deposition of a layer of interest on a second surface of a
substrate relative to a first surface of the substrate, where the
first and second surfaces have different compositions. The cluster
tool includes: a first module configured for pretreating the
substrate; a second module configured for treating the substrate
with plasma; a third module configured for vapor deposition of an
inhibitor on the first surface of the substrate relative to the
second surface of the substrate; and a fourth module configured for
vapor deposition of the layer of interest.
[0014] In another aspect, a system is provided for selective
deposition of a dielectric on a second surface of a substrate
relative to a first surface of the substrate. The system includes:
a first chamber configured for selective deposition of an organic
passivation layer and for partial etch-back of the organic
passivation layer; and a second chamber configured for selective
deposition of the dielectric on the second surface relative to the
first surface of the substrate.
[0015] In another aspect, a system is provided for selective
deposition of a film of interest on a second surface of a substrate
relative to the first surface of the substrate. The system
includes: a first chamber configured for pretreating the substrate
and for etch processing; a second chamber configured for selective
deposition of an organic passivation layer; and a third chamber
configured for selective deposition of the film of interest on a
second surface of the substrate relative to the first surface of
the substrate.
[0016] In some embodiments, the third chamber is further configured
for a bake process. In some embodiments, the system further
includes a fourth chamber configured for a bake process.
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] FIG. 1A is a schematic cross section of a portion of a
substrate having first and second surfaces of different
compositions, in accordance with a first embodiment.
[0018] FIG. 1B is a schematic cross section of the substrate of
FIG. 1A after a selective passivation of the first surface.
[0019] FIG. 1C is a schematic cross section of the substrate of
FIG. 1B after selective deposition on the second surface.
[0020] FIG. 1D is a schematic cross section of the substrate of
FIG. 1C after removal of the passivation material from the first
surface.
[0021] FIG. 2A is a schematic cross section of a portion of a
substrate having first and second surfaces of different
compositions, with a passivation blocking material formed on the
second surface, in accordance with a second embodiment.
[0022] FIG. 2B is a schematic cross section of the substrate of
FIG. 2A after a selective passivation of the first surface.
[0023] FIG. 2C is a schematic cross section of the substrate of
FIG. 2B after removal of the passivation blocking material from the
second surface.
[0024] FIG. 2D is a schematic cross section of the substrate of
FIG. 2C after selective deposition on the second surface.
[0025] FIG. 2E is a schematic cross section of the substrate of
FIG. 2D after removal of the passivation material from the first
surface.
[0026] FIG. 3A is a schematic cross section of the substrate of
FIG. 2D after selective deposition of a further material over the
second surface, in accordance with a third embodiment.
[0027] FIG. 3B is a schematic cross section of the substrate of
FIG. 3A after removal of the passivation material from the first
surface.
[0028] FIG. 4A is a flow diagram generally illustrating processes
for selectively depositing an organic passivation layer.
[0029] FIG. 4B is a flow diagram generally illustrating atomic
layer deposition (ALD) processes for selectively depositing an
organic layer.
[0030] FIG. 5 is a schematic illustration of an apparatus
configured for selective deposition of a polymer layer and in situ
etch back from undesired surfaces.
[0031] FIG. 6 is a flow diagram generally illustrating processes
for selectively depositing a dielectric layer on second surfaces
after selective passivation of first surfaces with organic material
in accordance with embodiments.
[0032] FIG. 7 is a flow diagram utilizing schematic cross sections
of a portion of a substrate having first and second surfaces of
different compositions, and generally illustrates the effect that
the extent of etch back on the passivation material has on the
relationship of the dielectric layer formed with the interface of
the first and second surfaces.
[0033] FIG. 8 is a flow diagram utilizing schematic cross sections
of a portion of a substrate having first and second surfaces of
different compositions, and generally illustrates the effect
passivation layer thickness has on the relationship of the
dielectric layer formed with the interface of the first and second
surfaces.
[0034] FIG. 9 is a flow diagram utilizing schematic cross sections
of a portion of a substrate having first and second surfaces of
different compositions, and generally illustrates the effect
dielectric thickness has on the relationship of the dielectric
layer formed with the interface of the first and second
surfaces.
[0035] FIG. 10A is a schematic cross section of a portion of
substrate having flush first and second surfaces of different
compositions with passivation and dielectric layers selectively
deposited thereover, respectively.
[0036] FIG. 10B is a schematic cross section of a portion of
substrate having first and second surfaces of different
compositions with the first surfaces recessed relative to the
second surfaces and passivation and dielectric layers selectively
deposited thereover, respectively.
[0037] FIG. 10C is a schematic cross section of a portion of
substrate having first and second surfaces of different
compositions with first surfaces elevated relative to the second
surfaces and with passivation and dielectric layers selectively
deposited thereover, respectively.
[0038] FIG. 10D is a schematic cross section of a portion of
substrate having first and second surfaces of different
compositions with first surfaces recessed relative to the second
surfaces and with passivation and dielectric layers selectively
deposited thereover, respectively.
[0039] FIG. 11A is a schematic cross section of a portion of a
substrate with an embedded metal feature.
[0040] FIG. 11B is a schematic cross section of the substrate of
FIG. 11A after formation of a metal cap to define a first
surface.
[0041] FIG. 11C is a schematic cross section of the substrate of
FIG. 11B after selective passivation deposition and etch back,
leaving a passivation film over the metal cap with edges of the
metal cap exposed.
[0042] FIG. 11D is a schematic cross section of the substrate of
FIG. 11C after selective deposition of a dielectric material over
low k surfaces of the substrate, where the deposited dielectric
resists etching of low k materials and overlaps with the metal
cap.
[0043] FIG. 11E is a schematic cross section of the substrate of
FIG. 11D after removal of the passivation layer.
[0044] FIG. 12A is a flow diagram showing schematic cross sections
of a portion of a substrate having first and second surfaces of
different compositions, and generally illustrates selective
passivation of the first surfaces, etch back in a manner that
leaves the passivation overlapping with the second surfaces, and
selective deposition of a dielectric etch mask on the remainder of
the second surfaces.
[0045] FIG. 12B are schematic cross sections of the substrate of
FIG. 12A, following removal of the passivation layers, leaving gaps
between the first surfaces and the dielectric etch mask, selective
etching of the low k material exposed in the gaps, and deposition
to leave air-gaps within the substrate.
[0046] FIG. 13 is a flow diagram illustrating a process flow for
selective deposition.
[0047] FIG. 14 is a flow diagram illustrating a process flow for
selective deposition on a three-dimensional structure such as a
trench or via.
DETAILED DESCRIPTION OF EMBODIMENTS
[0048] Methods and apparatus are disclosed for selectively
depositing material over a second surface relative to a first
surface, where the first and second surfaces have material
differences. For example, one of the surfaces can include a
metallic material and the other surface can include an inorganic
dielectric material. In embodiments described herein, an organic
passivation layer is deposited selectively on the first surface
relative to the second surface. In some embodiments, the first
surface is metallic and the second surface is dielectric; in other
embodiments the first surface is dielectric and second surface is
metallic. Subsequently, a layer of interest is selectively
deposited on the second surface relative to the organic passivation
layer. In some embodiments the layer of interest may be an
Al.sub.2O.sub.3 layer. In some embodiments the layer of interest
may be a TiN layer. Further layers can be selectively deposited on
the layer of interest, over the second surface, relative to the
organic passivation layer.
[0049] In one embodiment, the first surface comprises a metallic
surface, such as an elemental metal or metal alloy, while the
second surface comprises an inorganic dielectric surface, such as
low-k material. Examples of low-k material include silicon oxide
based materials, including grown or deposited silicon dioxide,
doped and/or porous oxides, native oxide on silicon, etc. A polymer
passivation layer is selectively deposited on the metallic surface
relative to the inorganic dielectric surface. Subsequently, a layer
of interest is selectively deposited on the inorganic dielectric
surface. The layer of interest may include a metal element.
Examples of the layer of interest include dielectrics, such as
zirconium oxide (e.g., ZrO.sub.2), hafnium oxide (e.g., HfO.sub.2),
aluminum oxide (e.g. Al.sub.2O.sub.3), titanium nitride (e.g., TiN)
and titanium oxide (e.g., TiO.sub.2). Processes are provided for
selectively depositing such materials on silicon-oxide based
surfaces relative to polymer surfaces.
[0050] In a second embodiment, the first surface comprises an
inorganic dielectric surface, such as low-k material, while the
second surface comprises a metallic surface, such as an elemental
metal or metal alloy. Examples of low-k material include silicon
oxide based materials, including grown or deposited silicon
dioxide, doped and/or porous oxides, native oxide on silicon, etc.
A polymer passivation layer is selectively deposited on the
inorganic dielectric surface relative to metallic surface. Prior to
depositing the polymer passivation layer, the metallic surface can
be provided with a passivation blocking layer, such as a
self-assembled monolayer (SAM). The passivation blocking layer
facilitates selectivity for the polymer deposition on inorganic
dielectric surface, and can be removed thereafter to permit
selective deposition of a layer of interest on the metallic surface
relative to the polymer passivation layer. The layer of interest
may include a metal element. Examples of the layer of interest
include metal layers (e.g., see U.S. Pat. No. 8,956,971, issued
Feb. 17, 2015 and U.S. Pat. No. 9,112,003, issued Aug. 18, 2015),
metal nitride layers (e.g., titanium nitride) and metal oxide
layers (e.g., zirconium oxide, hafnium oxide, titanium oxide and
aluminum oxide). Processes are provided for selectively depositing
such materials on metallic surfaces relative to polymer
surfaces.
[0051] In a third embodiment, the process of the second embodiment
is conducted to provide a layer of interest selectively over a
metallic surface relative to a polymer-passivated inorganic
dielectric surface. Thereafter, a further layer of interest is
selectively deposited over the layer of interest while the polymer
remains passivating the inorganic dielectric surface. For example,
the layer of interest may comprise a metal layer while the further
layer of interest comprises a metal oxide layer (e.g., zirconium
oxide, hafnium oxide, titanium oxide). Processes are provided for
selectively depositing such materials on metallic surfaces relative
to polymer surfaces.
[0052] The polymer passivation layer may be removed from the first
surface following selective deposition of the layer(s) of interest
over the second surface. For example, oxidation processes may
selectively remove polymer materials. Conditions are chosen to
avoid damage to surrounding materials on the substrate.
[0053] Embodiments are also provided for controlling the edge
profiles and edge positions for selectively deposited layers
relative to other features on the substrate, such as the boundaries
between underlying metallic and dielectric surfaces. Accordingly,
control is provided over relative positioning of selective layer
edges without the need for expensive lithographic patterning.
Examples illustrate applications for such control, including
examples in which the selective layer overlaps the material on
which deposition is minimized; examples in which the selective
layer is formed with a gap spacing the layer from the material on
which deposition is minimized; and examples in which the edge of
the selective layer aligns with the boundary between the two
disparate underlying materials.
Substrate Surfaces
[0054] According to some aspects of the present disclosure,
selective deposition can be used to deposit films of interest on a
second surface relative to a first surface. The two surfaces can
have different material properties that permit selective formation
of an organic material thereon, such as selective deposition of a
polymer layer on the first surface relative to the second surface,
which in turn permits subsequent selective deposition of a layer of
interest on the second surface relative to the organic-passivated
first layer.
[0055] For example, in embodiments described herein, one of the
surfaces can be a conductive (e.g., metal or metallic) surface of a
substrate, while the other surface can be a non-conductive (e.g.,
inorganic dielectric) surface of the substrate. In some
embodiments, the non-conductive surface comprises --OH groups, such
as a silicon oxide-based surface (e.g., low-k materials, including
grown and deposited silicon-oxide materials and native oxide over
silicon). In some embodiments the non-conductive surface may
additionally comprise --H terminations, such as an HF dipped Si or
HF dipped Ge surface. In such embodiments, the surface of interest
will be considered to comprise both the --H terminations and the
material beneath the --H terminations
[0056] For any of the examples noted above, the material
differences between the two surfaces are such that vapor deposition
methods can selectively deposit the organic passivation layer on
the first surface relative to the second surface. In some
embodiments, cyclical vapor deposition is used, for example,
cyclical CVD or atomic layer deposition (ALD) processes are used.
In some embodiments, selectivity for the organic passivation layer
can be achieved without passivation/blocking agents on the surface
to receive less of the organic layer; and/or without catalytic
agents on the surface to receive more of the organic layer. For
example, in embodiments where the first surface is metallic and the
second surface is dielectric, polymers can be selectively deposited
directly on metallic surfaces relative to inorganic dielectric
surfaces. In other embodiments, where the first surface is
dielectric and the second surface is metallic, the second surface
is first treated to inhibit polymer deposition thereover. For
example, a passivation blocking self-assembled monolayer (SAM) can
be first formed over a metallic surface relative, facilitating
selective deposition of a polymer passivation layer on a dielectric
surface, such as an inorganic dielectric surface, relative to a
SAM-covered second metallic surface. After selective deposition of
the organic passivation is completed, further selective deposition
of materials of interest, such as metal oxide or metal layers, can
be conducted on the non-passivated second surface relative to the
passivated first surface.
[0057] For embodiments in which one surface comprises a metal
whereas the other surface does not, unless otherwise indicated, if
a surface is referred to as a metal surface herein, it may be a
metal surface or a metallic surface. In some embodiments, the metal
or metallic surface may comprise metal, metal oxides, and/or
mixtures thereof. In some embodiments, the metal or metallic
surface may comprise surface oxidation. In some embodiments, the
metal or metallic material of the metal or metallic surface is
electrically conductive with or without surface oxidation. In some
embodiments, metal or a metallic surface comprises one or more
transition metals. In some embodiments, the metal or metallic
surface comprises one or more of Al, Cu, Co, Ni, W, Nb, Fe, or Mo.
In some embodiments, a metallic surface comprises titanium nitride.
In some embodiments, the metal or metallic surface comprises one or
more noble metals, such as Ru. In some embodiments, the metal or
metallic surface comprises a conductive metal oxide, nitride,
carbide, boride, or combination thereof. For example, the metal or
metallic surface may comprise one or more of RuO.sub.x, NbC.sub.x,
NbB.sub.x, NiO.sub.x, CoO.sub.x, NbO.sub.x, MoO.sub.x, WO.sub.x,
WNC.sub.x, TaN, or TiN.
[0058] In some embodiments, a metal or metallic surface comprises
cobalt (Co), copper (Cu), tungsten (W) or molybdenum (Mo). In some
embodiments, the metal or metallic surface may be any surface that
can accept or coordinate with the first or second precursor
utilized in a selective deposition process of either the organic
passivation layer or the layer of interest, as described herein,
depending upon the embodiment.
[0059] In some embodiments an organic passivation material, such as
a polyimide, is selectively deposited on a metal surface, such as a
Co, Cu, W, or Mo surface. In some embodiments, selective deposition
of the organic passivation material on the metal surface occurs at
a growth rate of about 0.5 .ANG./cycle to about 20 .ANG./cycle,
about 1 .ANG./cycle to about 15 .ANG./cycle, about 1.5 .ANG./cycle
to about 10 .ANG./cycle, or about 2 .ANG./cycle to about 8
.ANG./cycle. In some embodiments the growth rate of the organic
passivation material on the metal surface is more than about 0.5
.ANG./cycle, more than about 1 .ANG./cycle, more than about 3
.ANG./cycle, more than about 5 .ANG./cycle while on the upper end
the growth rate in some embodiments is less than about 20
.ANG./cycle, less than about 15 .ANG./cycle, less than about 10
.ANG./cycle or less than about 8 .ANG./cycle. Selectivity for the
metal surface relative to a second surface is maintained at these
growth rates in some embodiments.
[0060] In some embodiments, an organic passivation material is
selectively deposited on a metal oxide surface relative to other
surfaces. A metal oxide surface may be, for example a WO.sub.x,
TiO.sub.x, surface. In some embodiments, a metal oxide surface is
an oxidized surface of a metallic material. In some embodiments, a
metal oxide surface is created by oxidizing at least the surface of
a metallic material using oxygen compound, such as compounds
comprising O.sub.3, H.sub.2O, H.sub.2O.sub.2, O.sub.2, oxygen
atoms, plasma or radicals or mixtures thereof. In some embodiments,
a metal oxide surface is a native oxide formed on a metallic
material.
[0061] In some embodiments, the second surface may comprise a metal
surface including a passivation block layer thereover. That is, in
some embodiments, the second surface may comprise a metal surface
comprising a material that inhibits deposition of the passivation
layer thereover, for example a self-assembled monolayer (SAM).
[0062] In some embodiments, an organic passivation material is
selectively deposited on a first metal oxide surface, which is an
oxidized surface of metallic material, relative to a second
dielectric surface
[0063] In some embodiments, one of the first and second surfaces is
a metal or metallic surface of a substrate and the other surface is
a dielectric surface of the substrate. The term dielectric is used
in the description herein for the sake of simplicity in
distinguishing from the other surface, namely the metal or metallic
surface. It will be understood by the skilled artisan that not all
non-conducting surfaces are dielectric surfaces, and conversely not
all metallic surfaces are conducting. For example, the metal or
metallic surface may comprise an oxidized metal surface that is
electrically non-conducting or has a very high resistivity.
Selective deposition processes taught herein can deposit on such
non-conductive metallic surfaces with minimal deposition on
passivated dielectric surfaces and similarly selective deposition
processes can deposit on dielectric surfaces with minimal
deposition on passivated non-conductive metallic surfaces.
[0064] In some embodiments, the substrate may be pretreated or
cleaned prior to or at the beginning of the selective deposition
process. In some embodiments, the substrate may be subjected to a
plasma cleaning process at prior to or at the beginning of the
selective deposition process. In some embodiments, a plasma
cleaning process may not include ion bombardment, or may include
relatively small amounts of ion bombardment. For example, in some
embodiments the substrate surfaces may be exposed to plasma,
radicals, excited species, and/or atomic species prior to or at the
beginning of the selective passivation layer deposition process. In
some embodiments, the substrate surface may be exposed to hydrogen
plasma, radicals, or atomic species prior to or at the beginning of
the selective passivation layer deposition process.
[0065] In some embodiments a non-plasma pretreatment process is
conducted. For example, in some embodiments the substrate surface
may be exposed to a silicon reactant, such as
N-(trimethylsilyl)dimethylamine (TMSDMA) or trimethylchlorosilane.
The reactant may be provided in a single long pulse, or in a
sequence of multiple shorter pulses. In some embodiments the
reactant is provided in 1 to 25 pulses of from about 1 to about 60
seconds. In between pulses, the reaction chamber may be purged with
an inert gas. The purge may be, for example for about 1 to 30
seconds.
[0066] In some embodiments the surface is contacted with an
alkylaminosilane having the formula
(R.sup.I).sub.3Si(NR.sup.IIR.sup.III), wherein R.sup.I is a linear
or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl
group, R.sup.II is a linear or branched C1-C5 alkyl group, a linear
or branched C1-C4 alkyl group, or hydrogen, and R.sup.I is a linear
or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl
group.
[0067] In some embodiments the surface is contacted with a silane
having the general formula (R.sup.I).sub.3SiA, wherein R.sup.I is a
linear or branched C1-C5 alkyl group or a linear or branched C1-C4
alkyl group, and A is any ligand which is reactive with the silicon
containing surface. That is, the silane bonds to the surface
through ligand A, or ligand A forms an bond to the surface but then
ligand A may migrate away from the surface and/or silane.
[0068] The temperature of the pretreatment process may be, for
example, from about 100 to about 300.degree. C. The pressure during
the pretreatment process may be, for example, from about 10.sup.-5
to about 760 Torr, or in some embodiments from about 1 to 10 Torr
or about 0.1 to about 10 Torr. In some embodiments, a pretreatment
or cleaning process may be carried out in situ, that is in the same
reaction chamber as a selective deposition process. However in some
embodiments a pretreatment or cleaning process may be carried out
in a separate reaction chamber. In some embodiments the reaction
chamber in which the pretreatment process is carried out is part of
a cluster tool, including one or more additional reaction chambers.
For example, such a cluster tool may include additional reaction
chambers for the deposition of the inhibitor, etching and/or
deposition of the film of interest. In some embodiments a cluster
tool includes separate modules for pretreatment, inhibitor
deposition, plasma cleaning (etch) post-deposition of the
inhibitor, deposition of the layer of interest and plasma
post-deposition cleaning. In some embodiments the same module can
be used for two or more processes. For example, the same module may
be used for pretreatment, plasma cleaning after deposition of the
inhibitor and after deposition of the layer of interest. In some
embodiments a cluster tool comprises a first pretreatment module, a
plasma cleaning module, an inhibitor deposition module, and a
module for depositing the layer of interest.
Selectivity
[0069] The skilled artisan will appreciate that selective
deposition can be fully selective or partially selective. A
partially selective process can result in fully selective layer by
a post-deposition etch that removes all of the deposited material
from over surface B without removing all of the deposited material
from over surface A. Because a simple etch back process can leave a
fully selective structure without the need for expensive masking
processes, the selective deposition need not be fully selective in
order to obtain the desired benefits.
[0070] Selectivity of deposition on surface A relative to surface B
can be given as a percentage calculated by [(deposition on surface
A)-(deposition on surface B)]/(deposition on the surface A).
Deposition can be measured in any of a variety of ways. For
example, deposition may be given as the measured thickness of the
deposited material, or may be given as the measured amount of
material deposited. In embodiments described herein, selective
deposition of an organic passivation layer can be conducted on a
first surface (A) relative to a second surface (B). Subsequently, a
layer of interest is selectively deposited on the second surface
(A) relative to the organic passivation layer (B) over the first
surface.
[0071] In some embodiments, selectivity for the selective
deposition of the passivation layer on the first surface (relative
to the second surface) and/or selectivity of the layer of interest
on the second surface (relative to the passivation layer on the
first surface) is greater than about 10%, greater than about 50%,
greater than about 75%, greater than about 85%, greater than about
90%, greater than about 93%, greater than about 95%, greater than
about 98%, greater than about 99% or even greater than about 99.5%.
In embodiments described herein, the selectivity for the organic
passivation layer deposition can change over the duration or
thickness of a deposition. Surprisingly, selectivity has been found
to increase with the duration of the deposition for the vapor phase
polymer layer depositions described herein. In contrast, typical
selective deposition based on differential nucleation on different
surfaces tends to become less selective with greater duration or
thickness of a deposition.
[0072] In some embodiments, deposition only occurs on the first
surface and does not occur on the second surface. In some
embodiments, deposition on surface A of the substrate relative to
surface B of the substrate is at least about 80% selective, which
may be selective enough for some particular applications. In some
embodiments, the deposition on the surface A of the substrate
relative to surface B of the substrate is at least about 50%
selective, which may be selective enough for some particular
applications. In some embodiments the deposition on surface A of
the substrate relative to the surface B of the substrate is at
least about 10% selective, which may be selective enough for some
particular applications. The skilled artisan will appreciate that a
partially selective process can result in fully selective structure
layer by a post-deposition etch that removes all of the deposited
material from over surface B without removing all of the deposited
material from over surface A. Furthermore, the post-deposition etch
can also aid in tailoring the position and/or profile of the
selectively deposited layer, as will be better understood from the
description of FIGS. 17-23B below.
[0073] In some embodiments, the organic layer deposited on the
first surface of the substrate may have a thickness less than about
50 nm, less than about 20 nm, less than about 10 nm, less than
about 5 nm, less than about 3 nm, less than about 2 nm, or less
than about 1 nm, while a ratio of material deposited on the first
surface of the substrate relative to the second surface of the
substrate may be greater than or equal to about 200:1, greater than
or equal to about 100:1, greater than or equal to about 50:1,
greater than or equal to about 25:1, greater than or equal to about
20:1, greater than or equal to about 15:1, greater than or equal to
about 10:1, greater than or equal to about 5:1, greater than or
equal to about 3:1, or greater than or equal to about 2:1.
[0074] In some embodiments the selectivity of the selective
deposition processes described herein may depend on the material
compositions of the materials which define the first and/or second
surface of the substrate. For example, in some embodiments where
the first surface comprises a BTA passivated Cu surface and the
second surface comprises a natural or chemical silicon dioxide
surface the selectivity may be greater than about 8:1 or greater
than about 15:1. In some embodiments, where the first surface
comprises a metal or metal oxide and the second surface comprises a
natural or chemical silicon dioxide surface the selectivity may be
greater than about 5:1 or greater than about 10:1.
Selective Deposition on Dielectric
[0075] FIGS. 1A-1D schematically illustrate a first embodiment for
selective passivation of a first surface relative to a second
surface, followed by selective deposition on the second surface
relative to the passivated first surface. In the illustrated
embodiment, the first surface comprises a metallic material; the
second surface comprises an inorganic dielectric material; and the
material of interest deposited on the second surface comprises a
dielectric material.
[0076] FIG. 1A illustrates a substrate having materially different
surfaces exposed. For example, the first surface can comprise or be
defined by a metal, such as cobalt (Co), copper (Cu), tungsten (W)
or molybdenum (Mo). The second surface can comprise or be defined
by an inorganic dielectric, such as a low-k layer (typically a
silicon oxide-based layer) or a silicon surface having native oxide
(also a form of silicon oxide) formed thereover.
[0077] FIG. 1B shows the substrate of FIG. 1A after selective
deposition of a passivation layer over the first surface. For
example, the passivation layer may be a polymer layer deposited
selectively on the metallic surface of the first layer. Methods for
selectively depositing polymer layers by vapor deposition
techniques are disclosed in U.S. patent application Ser. No.
15/170,769, filed Jun. 1, 2016, the entire disclosure of which is
incorporated herein by references for all purposes. Further
information and examples of selective deposition of polymer layers
to serve as the passivation layer are provided below.
[0078] In some embodiments, the selectively deposited polymer is a
polyimide. In some embodiments, the polymer deposited is a
polyamide. Other examples of deposited polymers include dimers,
trimers, polyurea layers, polythiophene polyurethanes,
polythioureas, polyesters, polyimines, other polymeric forms or
mixtures of the above materials. Vapor deposited organic materials
include polyamic acid, which may be a precursor to polymer
formation. The selectively deposited layer can be a mixture
including polymer and polyamic acid, which for purposes of the
present disclosure will be considered to be a polymer.
[0079] In some embodiments, selective deposition of the polymer,
such as a polyimide, on the first metal-comprising surface, such as
a Cu surface, occurs at a growth rate of about 0.5 .ANG./cycle to
about 20 .ANG./cycle, about 1 .ANG./cycle to about 15 .ANG./cycle,
about 1.5 .ANG./cycle to about 10 .ANG./cycle, or about 2
.ANG./cycle to about 8 .ANG./cycle. In some embodiments the growth
rate of the polymer, such as a polyimide, on the first
metal-comprising surfaces, such as Cu, is more than about 0.5
.ANG./cycle, more than about 1 .ANG./cycle, more than about 3
.ANG./cycle, more than about 5 .ANG./cycle while on the upper end
the growth rate in some embodiments is less than about 20
.ANG./cycle, less than about 15 .ANG./cycle, less than about 10
.ANG./cycle or less than about 8 .ANG./cycle. Selectivity is
maintained at these growth rates in some embodiments.
[0080] In some embodiments, selective deposition of a polyimide on
Cu surfaces occurs at a growth rate of about 0.5 .ANG./cycle to
about 20 .ANG./cycle, about 1 .ANG./cycle to about 15 .ANG./cycle,
about 1.5 .ANG./cycle to about 10 .ANG./cycle, or about 2
.ANG./cycle to about 8 .ANG./cycle. In some embodiments the growth
rate of the polyimide on the Cu surfaces is more than about 0.5
.ANG./cycle, more than about 1 .ANG./cycle, more than about 3
.ANG./cycle, more than about 5 .ANG./cycle while on the upper end
the growth rate in some embodiments is less than about 20
.ANG./cycle, less than about 15 .ANG./cycle, less than about 10
.ANG./cycle or less than about 8 .ANG./cycle. Selectivity is
maintained at these growth rates in some embodiments.
[0081] As noted above, any organic material deposited on the second
surface (an inorganic dielectric surface in this example) can be
removed by an etch back process. In some embodiments, an etch
process subsequent to selective deposition of the organic layer may
remove deposited organic material from both the first surface and
the second surface of the substrate. In some embodiments the etch
process may be isotropic.
[0082] In some embodiments, the etch process may remove the same
amount, or thickness, of material from the first and second
surfaces. That is, in some embodiments the etch rate of the organic
material deposited on the first surface may be substantially
similar to the etch rate of the organic material deposited on the
second surface. Due to the selective nature of the deposition
processes described herein, the amount of organic material
deposited on the second surface of the substrate is substantially
less than the amount of material deposited on the first surface of
the substrate. Therefore, an etch process may completely remove
deposited organic material from the second surface of the substrate
while deposited organic material may remain on the first surface of
the substrate. Suitable processes for etching polymers are
described below with respect to FIG. 1D.
[0083] FIG. 1C shows the substrate of FIG. 1B following selective
deposition of a layer of interest X on the second surface (an
inorganic dielectric surface in this example) relative to the
passivation layer on the first surface (a metallic surface in this
example). The layer of interest X can be a dielectric material,
such as a metal oxide such as zirconium oxide, hafnium oxide,
aluminum oxide, titanium oxide, tantalum oxide, yttrium oxide,
lanthanum oxide, or other transition metal oxide or mixtures
thereof. In some embodiments the metal oxide is a dielectric
transition metal oxide, or mixture of dielectric transition metal
oxides. In some embodiments the layer of interest X can be a metal
nitride, such as titanium nitride. Methods for selectively
depositing such metal oxide layers by vapor deposition techniques,
employing hydrophobic precursors to aid selectivity relative to
organic passivation layers, are disclosed in U.S. provisional
patent application No. 62/332,396, filed May 5, 2016, the entire
disclosure of which is incorporated herein by references for all
purposes. Further information and examples of selective deposition
of metal oxide and other layers of interest are provided below.
[0084] As noted above, any X material deposited on the passivation
layer over the first surface can be removed by an etch back
process. Because the layer of interest is deposited selectively on
the second surface, any X material left on the passivation surface
will be thinner than the passivation layer formed on the metallic
surface. Accordingly, the etch back process can be controlled to
remove all of the X material over the passivation layer without
removing all of the layer of interest from over the dielectric
surface. Repeatedly depositing selectively and etching back in this
manner can result in an increasing thickness of the X material on
the dielectric with each cycle of deposition and etch. Repeatedly
depositing selectively and etching back in this manner can also
result in increased overall selectivity of the X material on the
dielectric, as each cycle of deposition and etch leaves a clean
passivation layer over which the selective X deposition nucleates
poorly. Alternatively, any X material can be removed during
subsequent removal of the passivation layer, example conditions for
which are described with respect to FIG. 1D below, in a lift-off
process. As is known in the art, a lift-off process removes an
overlying material by undercutting with removal of an underlying
material. Any X material formed on the passivation layer in a short
selective deposition process tends to be noncontinuous, allowing
access of the etchant to the underlying material to be removed. The
lift-off etch need not fully remove the passivation layer in order
to remove all of the undesired X material from the passivation
layer surface, such that either a direct etch or the lift-off
method can be used to remove the X material from the passivation
layer surface in a cyclical selective deposition and removal.
[0085] FIG. 1D shows the substrate of FIG. 1C after removal of the
passivation layer from the first surface. In some embodiments, the
etch process may comprise exposing the substrate to a plasma. In
some embodiments, the plasma may comprise oxygen atoms, oxygen
radicals, oxygen plasma, or combinations thereof. In some
embodiments, the plasma may comprise hydrogen atoms, hydrogen
radicals, hydrogen plasma, or combinations thereof (see, e.g.,
Example 2 for selective deposition of passivation layer below). In
some embodiments, the plasma may also comprise noble gas species,
for example Ar or He species. In some embodiments the plasma may
consist essentially of noble gas species. In some instances, the
plasma may comprise other species, for example nitrogen atoms,
nitrogen radicals, nitrogen plasma, or combinations thereof. In
some embodiments, the etch process may comprise exposing the
substrate to an etchant comprising oxygen, for example O.sub.3. In
some embodiments, the substrate may be exposed to an etchant at a
temperature of between about 30.degree. C. and about 500.degree.
C., or between about 100.degree. C. and about 400.degree. C. In
some embodiments, the etchant may be supplied in one continuous
pulse or may be supplied in multiple shorter pulses. As noted
above, the passivation layer removal can be used to lift-off any
remaining X material from over the passivation layer, either in a
complete removal of the passivation layer or in a partial removal
of the passivation layer in a cyclical selective deposition and
removal.
[0086] As noted above, in some embodiments, O.sub.3 (e.g.
O.sub.3/N.sub.2) can be used in the etch process for removal of the
organic passivation layer. In some embodiments, the etch process
may be performed at a substrate temperature of about 20.degree. C.
to about 500.degree. C. In some embodiments, the etch process may
be performed at a substrate temperature of about 50.degree. C. to
about 300.degree. C. In some embodiments, the etch process may be
performed at a substrate temperature of about 100.degree. C. to
about 250.degree. C. In some embodiments, the etch process may be
performed at a substrate temperature of about 125.degree. C. to
about 200 C. In some embodiments, the etch process may be performed
at a rate of about 0.05 nm/min to about 50.0 nm/min. In some
embodiments, the etch process may be performed at a rate of about
0.1 nm/min to about 5.0 nm/min. In some embodiments, the etch
process may be performed at a rate of about 0.2 nm/min to about 2.5
nm/min. In some embodiments for single wafer or small batch (e.g.,
5 wafers or less) processing, a low O.sub.3 concentration etch
process may be used, wherein the low O.sub.3 concentration etch
process is performed at 0.01 Torr to 200 Torr, or about 0.1 Torr to
100 Torr (e.g., 2 Torr). Etchant pulsing can be between 0.01 sec
and 20 seconds, between 0.05 sec and 10 sec, or between 0.1 sec and
2 seconds (e.g., 0.5 sec pulse/0.5 sec purge of O.sub.3). O.sub.3
flow can range from 0.01 slm to 1 slm, or from 0.01 slm to 0.250
slm. Inert (e.g., N.sub.2) carrier gas flow of can range from 0.1
slm to 20 slm, or from 0.5 slm to 5 slm (e.g., 1.2 slm). In some
embodiments, a high O.sub.3 concentration etch process may be used,
wherein the high O.sub.3 concentration etch process is performed at
1-100 Torr, or 5-20 Torr (e.g., 9 Torr), with longer exposures per
cycle. For example, O.sub.3 exposure times can be between 0.1 sec
and 20 s, or between 0.5 sec and 5 seconds (e.g., 1 sec pulse/1 sec
purge of O.sub.3). O.sub.3 flow for such high O.sub.3 concentration
processes can be between 0.1 slm and 2.0 slm, or between 0.5 slm
and 1.5 slm (e.g, 750 sccm), with an inert (e.g., N.sub.2) dilution
flow of 0.1 slm to 20 slm, or 0.5 slm to 5 slm (e.g., 1.2 slm).
[0087] In some embodiments a bake step can be carried out after
etching. The bake may be carried out in the same reactor as the
deposition of the organic material, the same reactor as the etch
process, the same reactor in which a layer of interest is to be
subsequently deposited, or may be carried out in a separate reactor
from one or more of those aspects of the process. In some
embodiments the bake process is carried out in a reaction chamber
that is part of a cluster tool and the substrate is moved to one or
more different reaction chambers of the cluster tool for additional
processing after the bake.
[0088] In some embodiments the substrate is baked for a period of
about 1 to about 15 minutes. In some embodiments the substrate is
baked at a temperature of about 200 to about 500.degree. C. In some
embodiments the bake step comprises two or more steps in which the
substrate is baked for a first period of time at a first
temperature and then baked for a second period of time at a second
temperature.
[0089] Additional treatments, such as heat or chemical treatment,
can be conducted prior to, after or between the foregoing
processes. For example, treatments may modify the surfaces or
remove portions of the metal, silicon oxide, polymer passivation
and metal oxide surfaces exposed at various stages of the process.
In some embodiments the substrate may be pretreated or cleaned
prior to or at the beginning of the selective deposition process.
In some embodiments, the substrate may be subjected to a plasma
cleaning process at prior to or at the beginning of the selective
deposition process. In some embodiments, a plasma cleaning process
may not include ion bombardment, or may include relatively small
amounts of ion bombardment. For example, in some embodiments the
substrate surface may be exposed to plasma, radicals, excited
species, and/or atomic species prior to or at the beginning of the
selective deposition process. In some embodiments, the substrate
surface may be exposed to hydrogen plasma, radicals, or atomic
species prior to or at the beginning of the selective deposition
process. In some embodiments, a pretreatment or cleaning process
may be carried out in the same reaction chamber as a selective
deposition process, however in some embodiments a pretreatment or
cleaning process may be carried out in a separate reaction
chamber.
Selective Deposition on Metal
[0090] FIGS. 2A-2E illustrate schematically illustrate a second
embodiment for selective passivation of a first surface relative to
a second surface, followed by selective deposition on the second
surface relative to the passivated first surface. In the
illustrated embodiment, the first surface comprises an inorganic
dielectric material; the second surface comprises a metallic
surface; and the material of interest deposited on the second
surface comprises a dielectric material or a metal.
[0091] FIG. 2A illustrates a substrate similar to that of FIG. 1A,
having materially different surfaces. For this embodiment, however,
the surfaces are described with reversed terminology. In
particular, the second surface can comprise or be defined by a
metallic material, such as cobalt (Co), copper (Cu), tungsten (W)
or molybdenum (Mo). The first surface can comprise an inorganic
dielectric, such as a low-k layer (typically a silicon oxide-based
layer) or a silicon surface having native oxide (also a form of
silicon oxide) formed thereover. A passivation blocking layer is
formed over the second surface. Note that the term "blocking" is
not meant to imply that the subsequent selective deposition of a
passivation layer is completely blocked by the passivation blocking
layer. Rather, the passivation blocking layer over the second
surface need only inhibit the deposition of the passivation layer
to have a lower growth rate relative to the growth rate over the
first surface.
[0092] In one embodiment, the passivation blocking layer comprises
a self-assembled monolayer (SAM). A SAM can be selectively formed
over the second (metallic) surface without forming on the first
(dielectric) surface. Advantageously, sulfur-containing SAM has
been found effective to minimize deposition of the passivation
layer thereover.
[0093] FIG. 2B shows the selective formation of a passivation layer
(e.g., organic passivation layer) over the first surface, in this
case the inorganic dielectric layer, relative to the passivation
blocking layer over the second surface. As noted in the above
incorporated patent application Ser. No. 15/170,769, filed Jun. 1,
2016, vapor deposition processes described therein are capable of
depositing polymer on inorganic dielectrics, and can even deposit
selectively (i.e., at differential deposition rates) over different
types of silicon oxide. In the present embodiment,
sulfur-containing SAM inhibits the polymer deposition thereover,
such that polymer can selectively form over the first surface, and
can serve as a passivation layer against a subsequent
deposition.
[0094] FIG. 2C shows the substrate of FIG. 2B after removal of the
passivation blocking layer from over the second surface. For
example, sulfur-containing SAM material can be removed by heat
treatment at temperatures lower than those that would remove a
polymer layer like polyimide. Accordingly, a passivation layer is
left selectively over the first surface, while the second surface
is exposed. The structure is similar to that of FIG. 1B except that
the first passivated surface is an inorganic dielectric in this
embodiment, and the second surface is a metallic surface.
[0095] FIG. 2D shows the substrate of FIG. 2C after selective
deposition of a layer of interest X on the second surface relative
to the passivation layer over the first surface. As noted with
respect to the first embodiment, and described in the
above-incorporated provisional patent application No. 62/332,396,
filed May 5, 2016, metal oxides can be selectively deposited using
vapor deposition techniques and hydrophobic precursors to aid
selectivity relative to organic passivation layers, on a number of
different surfaces. Further information and examples of selective
deposition of metal oxide and other layers of interest are provided
below.
[0096] Alternatively, the layer of interest X is a metal layer.
U.S. Pat. No. 8,956,971, issued Feb. 17, 2015 and U.S. Pat. No.
9,112,003, issued Aug. 18, 2015, the entire disclosures of which
are incorporated herein by reference for all purposes, teach
processes for selective deposition of metallic materials on
metallic surfaces, relative to other material surfaces, including
organic surfaces.
[0097] FIG. 2E shows the substrate of FIG. 2D after removal of the
passivation layer from the first surface, leaving a selectively
formed dielectric on metal or metal on metal. The passivation layer
can be removed as described above with respect to the first
embodiment, such as by O.sub.3 etching.
[0098] FIGS. 3A-3B illustrate a third embodiment for selective
passivation of a first surface relative to a second surface,
followed by selective deposition on the second surface relative to
the passivated first surface. In the illustrated embodiment, the
process of FIGS. 2A-2D is first conducted.
[0099] FIG. 3A shows the substrate of FIG. 2D after a further
selective deposition. In the event the layer of interest X is a
metallic material, the further selective deposition can form a
dielectric material as a second layer of interest Y over the first
layer of interest, selectively relative to the organic passivation
layer. As noted above with respect to the first and second
embodiments, and described in the above-incorporated provisional
patent application No. 62/332,396, filed May 5, 2016, metal oxides
can be selectively deposited using vapor deposition techniques and
hydrophobic precursors to aid selectivity relative to organic
passivation layers, on a number of different surfaces. Further
information and examples of selective deposition of metal oxide and
other layers of interest are provided below.
[0100] FIG. 3B shows the substrate of FIG. 3A after removal of the
passivation layer from the first surface, leaving a selectively
formed dielectric on metal. The passivation layer can be removed as
described above with respect to the first embodiment, such as by
O.sub.3 etching.
[0101] The second and third embodiments, like the first embodiment,
can involve additional treatments, such as heat or chemical
treatment, conducted prior to, after or between the foregoing
processes.
Selective Deposition of Passivation Layer
[0102] As disclosed in the incorporated U.S. patent application
Ser. No. 15/170,769, filed Jun. 1, 2016, vapor phase deposition
techniques can be applied to organic passivation layers and
polymers such as polyimide layers, polyamide layers, polyuria
layers, polyurethane layers, polythiophene layers, and more. CVD of
polymer layers can produce greater thickness control, mechanical
flexibility, conformal coverage, and biocompatibility as compared
to the application of liquid precursor. Sequential deposition
processing of polymers can produce high growth rates in small
research scale reactors. Similar to CVD, sequential deposition
processes can produce greater thickness control, mechanical
flexibility, and conformality. The terms "sequential deposition"
and "cyclical deposition" are employed herein to apply to processes
in which the substrate is alternately or sequentially exposed to
different precursors, regardless of whether the reaction mechanisms
resemble ALD, CVD, MLD or hybrids thereof.
[0103] Referring to FIG. 4A and in some embodiments, a substrate
comprising a first surface and a second surface is provided at
block 11. The first and second surfaces may have different material
properties as discussed herein. In some embodiments, the first
surface may be a conductive surface, for example a metal or
metallic surface, and the second surface may be a dielectric
surface (see, e.g., FIGS. 1A-1D). In some embodiments, the first
surface may be a dielectric surface and the second surface may be a
second, different dielectric surface. In some embodiments, the
first surface may be a dielectric surface, for example a silicon
oxide-based material, and the second surface may be a passivation
blocking material such as an SAM (see, e.g., FIGS. 2A-3B).
[0104] In some embodiments, the first precursor may be vaporized at
a first temperature to form the first vapor phase precursor. In
some embodiments, the first precursor vapor is transported to the
substrate through a gas line at a second temperature. In some
embodiments, the second transportation temperature is higher than
the first vaporization temperature. In some embodiments, the
substrate is contacted with a first vapor phase precursor, or
reactant, at block 12 for a first exposure period. In some
embodiments, the substrate may be contacted with the first vapor
phase precursor at a third temperature that is higher than the
first temperature.
[0105] In some embodiments, the first precursor exposure period is
from about 0.01 seconds to about 60 seconds, about 0.05 seconds to
about 30 seconds, about 0.1 seconds to about 10 seconds or about
0.2 seconds to about 5 seconds. The optimum exposure period can be
readily determined by the skilled artisan based on the particular
circumstances. In some embodiments where batch reactors may be
used, exposure periods of greater than 60 seconds may be
employed.
[0106] In some embodiments, the substrate is contacted with a
second vapor phase precursor, or reactant, at block 13 for a second
exposure period. In some embodiments, the second precursor may be
vaporized at a fourth temperature to form the second vapor phase
precursor. In some embodiments, the second reactant vapor is
transported to the substrate through a gas line at a second
temperature. In some embodiments, the fifth transportation
temperature is higher than the first vaporization temperature. In
some embodiments, the substrate may be contacted with the second
vapor phase precursor at a sixth temperature that is higher than
the fourth temperature. In some embodiments, the sixth temperature
may be substantially the same as the third temperature at which the
first vapor phase precursor contacts the substrate.
[0107] In some embodiments, the second precursor exposure period is
from about 0.01 seconds to about 60 seconds, about 0.05 seconds to
about 30 seconds, about 0.1 seconds to about 10 seconds or about
0.2 seconds to about 5 seconds. The optimum exposure period can be
readily determined by the skilled artisan based on the particular
circumstances. In some embodiments, where batch reactors may be
used, exposure periods of greater than 60 seconds may be
employed.
[0108] In block 14 an organic layer is selectively deposited on the
first surface relative to the second surface. The skilled artisan
will appreciate that selective deposition of an organic layer is
the result of the above-described contacting actions, 12-13, rather
than a separate action. In some embodiments, the above-described
contacting actions, blocks 12-13, may be considered a deposition
cycle. Such a selective deposition cycle can be repeated until a
layer of sufficient thickness is left on the substrate (block 15)
and the deposition is ended (block 16). The selective deposition
cycle can include additional acts, need not be in the same sequence
nor identically performed in each repetition, and can be readily
extended to more complex vapor deposition techniques. For example,
a selective deposition cycle can include additional reactant supply
processes, such as the supply and removal (relative to the
substrate) of additional reactants in each cycle or in selected
cycles. Though not shown, the process may additionally comprise
treating the deposited layer to form a polymer (for example, UV
treatment, annealing, etc.). The selectively formed organic layer
can serve as a passivation layer to inhibit deposition thereover
and increase selectivity in a subsequent selective deposition of a
layer of interest, as noted above
[0109] Referring to FIG. 4B, the vapor deposition process of FIG.
4A may in some embodiments comprise an atomic layer deposition
process. A substrate comprising a first surface and a second
surface is provided at block 21. The first and second surfaces may
have different material properties. In some embodiments, the first
surface may be a conductive surface, for example a metal or
metallic surface, and the second surface may be a dielectric
surface (see, e.g., FIGS. 1A-1D). In some embodiments, the first
surface may be a dielectric surface and the second surface may be a
second, different dielectric surface. In some embodiments, the
first surface may be a dielectric surface, for example a silicon
oxide-based material, and the second surface may be a passivation
blocking material such as an SAM (see, e.g., FIGS. 2A-3B).
[0110] In some embodiments a sequential deposition method for
selective vapor deposition of an organic passivation layer
comprises vaporizing a first organic precursor is at a first
temperature to form a first precursor vapor at block 22. In some
embodiments, the first precursor vapor is transported to the
substrate through a gas line at a second temperature. In some
embodiments the second transportation temperature is higher than
the first vaporization temperature. In some embodiments, the
substrate is contacted with the vapor phase first precursor for a
first exposure period at block 23. In some embodiments, the first
precursor, or species thereof, chemically adsorbs on the substrate
in a self-saturating or self-limiting fashion. The gas line can be
any conduit that transports the first precursor vapor from the
source to the substrate. In some embodiments, the substrate may be
exposed to the first precursor vapor at a third temperature that is
higher than the first temperature.
[0111] In some embodiments the first precursor exposure period is
from about 0.01 seconds to about 60 seconds, about 0.05 seconds to
about 30 seconds, about 0.1 seconds to about 10 seconds or about
0.2 seconds to about 5 seconds. The optimum exposure period can be
readily determined by the skilled artisan based on the particular
circumstances. In some embodiments, where batch reactors may be
used, exposure periods of greater than 60 seconds may be
employed.
[0112] Excess of the first precursor vapor (and any volatile
reaction by-products) may then be removed from contact with the
substrate at block 24. Such removal can be accomplished by, for
example, purging, pump down, moving the substrate away from a
chamber or zone in which it is exposed to the first reactant, or
combinations thereof. In some embodiments, a first precursor
removal period, for example a purge period, is from about 0.01
seconds to about 60 seconds, about 0.05 seconds to about 30
seconds, about 0.1 seconds to about 10 seconds or about 0.2 seconds
to about 5 seconds. The optimum removal period can be readily
determined by the skilled artisan based on the particular
circumstances. In some embodiments, where batch reactors may be
used, removal periods of greater than 60 seconds may be
employed.
[0113] In some embodiments, the second precursor may be vaporized
at a fourth temperature to form the second vapor phase precursor at
block 25. In some embodiments, the second reactant vapor is
transported to the substrate through a gas line at a second
temperature. In some embodiments, the fifth transportation
temperature is higher than the first vaporization temperature. In
some embodiments, the substrate may be contacted with the second
vapor phase precursor at a sixth temperature that is higher than
the fourth temperature. In some embodiments, the sixth temperature
may be substantially the same as the third temperature at which the
first vapor phase precursor contacts the substrate. In some
embodiments, the substrate may be exposed to a second precursor
vapor for a second exposure period at block 26. In some
embodiments, the second reactant may react with the adsorbed
species of the first reactant on the substrate.
[0114] In some embodiments, the first precursor exposure period is
from about 0.01 seconds to about 60 seconds, about 0.05 seconds to
about 30 seconds, about 0.1 seconds to about 10 seconds or about
0.2 seconds to about 5 seconds. The optimum exposure period can be
readily determined by the skilled artisan based on the particular
circumstances. In some embodiments, where batch reactors may be
used, exposure periods of greater than 60 seconds may be
employed.
[0115] In some embodiments, excess of the second precursor vapor
(and any volatile reaction by-product) is removed from contact with
the substrate at block 27, such that the first reactant vapor and
the second reactant vapor do not mix. In some embodiments, the
vapor deposition process of the organic layer does not employ
plasma and/or radicals, and can be considered a thermal vapor
deposition process. In some embodiments, a second precursor removal
period, for example a purge period, is from about 0.01 seconds to
about 60 seconds, about 0.05 seconds to about 30 seconds, about 0.1
seconds to about 10 seconds or about 0.2 seconds to about 5
seconds. The optimum removal period can be readily determined by
the skilled artisan based on the particular circumstances. In some
embodiments, where batch reactors may be used, removal periods of
greater than 60 seconds may be employed.
[0116] In block 28 an organic layer is selectively deposited on the
first surface relative to the second surface. The skilled artisan
will appreciate that selective deposition of an organic layer is
the result of the above-described contacting actions rather than a
separate action. In some embodiments, the above-described
contacting and removing (and/or halting supply) actions, blocks
23-27, may be considered a deposition cycle. In some embodiments, a
deposition cycle may be repeated until an organic layer of a
desired thickness is selectively deposited. Such a selective
deposition cycle can be repeated (block 29) until a layer of
sufficient thickness is left on the substrate and the deposition is
ended (block 30). The selective deposition cycle can include
additional acts, need not be in the same sequence nor identically
performed in each repetition, and can be readily extended to more
complex vapor deposition techniques. For example, a selective
deposition cycle can include additional reactant supply processes,
such as the supply and removal of additional reactants in each
cycle or in selected cycles. Though not shown, the process may
additionally comprise treating the deposited layer to form a
polymer (for example, UV treatment, annealing, etc.).
[0117] Various reactants can be used for the above described
processes. For example, in some embodiments, the first precursor or
reactant is an organic reactant such as a diamine, e.g.,
1,6-diaminohexane (DAH), or any other monomer with two reactive
groups. In some embodiments, the second reactant or precursor is
also an organic reactant capable of reacting with adsorbed species
of the first reactant under the deposition conditions. For example,
the second reactant can be an anhydride, such as furan-2,5-dione
(maleic acid anhydride). The anhydride can comprise a dianhydride,
e.g., pyromellitic dianhydride (PMDA), or any other monomer with
two reactive groups which will react with the first reactant.
[0118] In some embodiments the substrate is contacted with the
first precursor prior to being contacted with the second precursor.
Thus, in some embodiments the substrate is contacted with an amine,
such as a diamine, for example 1,6-diaminohexane (DAH) prior to
being contacted with another precursor. However, in some
embodiments the substrate may be contacted with the second
precursor prior to being contacted with the first precursor. Thus,
in some embodiments the substrate is contacted with an anhydride,
such as furan-2,5-dione (maleic acid anhydride), or a dianhydride,
e.g., pyromellitic dianhydride (PMDA) prior to being contacted with
another precursor.
[0119] In some embodiments, different reactants can be used to tune
the layer properties. For example, a polyimide layer could be
deposited using 4,4'-oxydianiline or 1,4-diaminobenzene instead of
1,6-diaminohexane to get a more rigid structure with more
aromaticity and increased dry etch resistance.
[0120] In some embodiments, the reactants do not contain metal
atoms. In some embodiments, the reactants do not contain semimetal
atoms. In some embodiments, one of the reactants comprises metal or
semimetal atoms. In some embodiments, the reactants contain carbon
and hydrogen and one or more of the following elements: N, O, S, P
or a halide, such as Cl or F. In some embodiments, the first
reactant may comprise, for example, adipoyl chloride (AC).
[0121] Deposition conditions can differ depending upon the selected
reactants and can be optimized upon selection. In some embodiments,
the reaction temperature can be selected from the range of about
80.degree. C. to about 250.degree. C. In some embodiments, the
reaction chamber pressure may be from about 1 mTorr to about 1000
Torr, from about 10.sup.-5 to about 760 Torr, or in some
embodiments from about 1 to 10 Torr. In some embodiments, for
example where the selectively deposited organic layer comprises
polyamide, the reaction temperature can be selected from a range of
about 80.degree. C. to about 150.degree. C. In some embodiments
where the selectively deposited organic layer comprises polyamide,
the reaction temperature may be greater than about 80.degree. C.,
90.degree. C., 100.degree. C., 110.degree. C., 120.degree. C.,
130.degree. C., 140.degree. C., or 150.degree. C. In some
embodiments where the selectively deposited organic layer comprises
polyimide, the reaction temperature may be greater than about
160.degree. C., 180.degree. C., 190.degree. C., 200.degree. C., or
210.degree. C.
[0122] For example, for sequential deposition of polyimide using
PMDA and DAH in a single wafer deposition tool, substrate
temperatures can be selected from the range of about 150.degree. C.
to about 250.degree. C., or from about 170.degree. C. to about
210.degree. C., and pressures can be selected from the range of
about 1 mTorr to about 760 Torr, or between about 100 mTorr to
about 100 Torr.
[0123] In some embodiments reactants for use in the selective
deposition processes described herein may have the general
formula:
R.sup.1(NH.sub.2).sub.2 (1)
wherein R.sup.1 may be an aliphatic carbon chain comprising 1-5
carbon atoms, 2-5 carbon atoms, 2-4 carbon atoms, 5 or fewer carbon
atoms, 4 or fewer carbon atoms, 3 or fewer carbon atoms, or 2
carbon atoms. In some embodiments, the bonds between carbon atoms
in the reactant or precursor may be single bonds, double bonds,
triple bonds, or some combination thereof. Thus, in some
embodiments a reactant may comprise two amino groups. In some
embodiments, the amino groups of a reactant may occupy one or both
terminal positions on an aliphatic carbon chain. However, in some
embodiments the amino groups of a reactant may not occupy either
terminal position on an aliphatic carbon chain. In some
embodiments, a reactant may comprise a diamine. In some
embodiments, a reactant may comprise an organic precursor selected
from the group of 1,2-diaminoethane (1), 1,3-diaminopropane (1),
1,4-diaminobutane(1), 1,5-diaminopentane (1), 1,2-diaminopropane
(1), 2,3-butanediamine, 2,2-dimethyl-1,3-propanediamine (1).
[0124] In some embodiments, reactants for use in the selective
deposition processes described herein may have the general
formula:
R.sup.2(COCl).sub.2 (2)
wherein R.sup.2 may be an aliphatic carbon chain comprising 1-3
carbon atoms, 2-3 carbon atoms, or 3 or fewer carbon atoms. In some
embodiments, the bonds between carbon atoms in the reactant or
precursor may be single bonds, double bonds, triple bonds, or some
combination thereof. In some embodiments, a reactant may comprise a
chloride. In some embodiments, a reactant may comprise a diacyl
chloride. In some embodiments, a reactant may comprise an organic
precursor selected from the group of oxalyl chloride (I), malonyl
chloride, and fumaryl chloride.
[0125] In some embodiments, a reactant comprises an organic
precursor selected from the group of 1,4-diisocyanatobutane or
1,4-diisocyanatobenzene. In some embodiments, a reactant comprises
an organic precursor selected from the group of terephthaloyl
dichloride, alkyldioyl dichlorides, such as hexanedioyl dichloride,
octanedioyl dichloride, nonanedioyl dichloride, decanedioyl
dichloride, or terephthaloyl dichloride. In some embodiments, a
reactant comprises an organic precursor selected from the group of
1,4-diisothiocyanatobenzene or terephthalaldehyde. In some
embodiments, a reactant being vaporized can be also a diamine, such
as 1,4-diaminobenzene, decane-1,10-diamine,
4-nitrobenzene-1,3-diamine, 4,4'-oxydianiline, or ethylene diamine.
In some embodiments, a reactant can be a terephthalic acid
bis(2-hydroxyethyl) ester. In some embodiments, a reactant can be a
carboxylic acid, for example alkyl-, alkenyl-,
alkadienyl-dicarboxylic or tricarboxylic acid, such as ethanedioic
acid, propanedioic acid, butanedioic acid, pentanedioic acid or
propane-1,2,3-tricarboxylic acid. In some embodiments, a reactant
can be an aromatic carboxylic or dicarboxylic acid, such as benzoic
acid, benzene-1,2-dicarboxylic acid, benzene-1,4-dicarboxylic acid
or benzene-1,3-dicarboxylic acid. In some embodiments, a reactant
may comprise one or more OH-groups bonded to a hydrocarbon. In some
embodiments, a reactant can be selected from the group of diols,
triols, aminophenols such as 4-aminophenol, benzene-1,4-diol or
benzene-1,3,5-triol. In some embodiments, a reactant can be
8-quinolinol. In some embodiments, the reactant can comprise
alkenylchlorosilanes, like alkenyltrichlorosilanes, such as
7-octenyltrichlorosilane.
[0126] In some embodiments, a reactant may have a vapor pressure
greater than about 0.5 Torr, 0.1 Torr, 0.2 Torr, 0.5 Torr, 1 Torr
or greater at a temperature of about 20.degree. C. or room
temperature. In some embodiments, a reactant may have a boiling
point less than about 400.degree. C., less than 300.degree. C.,
less than about 250.degree. C., less than about 200.degree. C.,
less than about 175.degree. C., less than about 150.degree. C., or
less than about 100.degree. C.
Selective Deposition of Layers of Interest Relative to Organic
Surfaces
[0127] As disclosed in the incorporated U.S. provisional patent
application No. 62/332,396, filed May 5, 2016, selective deposition
of metallic materials and metal oxides, relative to organic
materials such as the passivation layers disclosed herein, can be
facilitated by employing hydrophobic reactants. After selectively
forming a passivation layer on the first surface, in some
embodiments a metal oxide is selectively deposited on the second
surface by contacting the substrate alternately and sequentially
with a first hydrophobic reactant comprising a metal of the metal
oxide and a second reactant comprising oxygen. In some embodiments,
the second reactant is water or H.sub.2O.sub.2. In some embodiments
the substrate is contacted sequentially with the first and second
reactants, similar to the sequence of FIG. 4A, except that a
non-organic layer is selectively deposited on or over the second
surface (see, e.g., FIGS. 1A-3B).
[0128] The hydrophobic reactant comprises one or more hydrophobic
ligands. In some embodiments, the hydrophobic reactant comprises
two to four hydrophobic ligands. In the case of hydrophobic
reactants comprising a metal with a valence/oxidation state of n,
in some embodiments, the hydrophobic precursor comprises n-1 or n-2
hydrophobic ligands.
[0129] In some embodiments, at least one hydrophobic ligand
comprises only C and H. In some embodiments, at least one
hydrophobic ligand comprises C, H and Si or Ge, but no additional
elements.
[0130] In some embodiments, a hydrocarbon ligand comprises one or
more of the following: [0131] C1-C10 hydrocarbon (single, double or
triple bonded) [0132] Alkyls [0133] C1-C5 alkyls [0134] Me, Et, Pr,
.sup.iPr, Bu, .sup.tBu [0135] Alkenyls [0136] C1-C6 alkenyls [0137]
Cyclic hydrocarbons [0138] C3-C8 [0139] Cyclopentadienyl [0140]
Cycloheptadienyl [0141] Cycloheptatrienyl [0142] Cyclohexyl [0143]
Derivatives of those [0144] Aromatic [0145] C6 aromatic ring and
derivatives of those
[0146] In some embodiments, the hydrophobic reactant comprises no
hydrophilic ligands. However, in some embodiments the hydrophobic
reactant may comprise one or two hydrophilic ligands. In some
embodiments, a hydrophilic ligand comprises nitrogen, oxygen and/or
a halogen group.
[0147] In some embodiments, a hydrophilic ligand is an alkylamine
(--NR.sub.2, where each R can be alkyl, hydrogen). In some
embodiments, the hydrophilic ligand can be --NMe.sub.2, --NEtMe, or
--NEt.sub.2.
[0148] In some embodiments, a hydrophilic ligand is an alkoxide,
for example --OMe, --OEt, --O.sup.iPr, --O.sup.tBu.
[0149] In some embodiments, a hydrophilic ligand comprises a
halide, such as a chloride, fluoride or other halide.
[0150] In some embodiments, the hydrophobic precursor comprises the
formula:
[0151] L.sub.nMX.sub.y, in which [0152] In some embodiments n is
from 1-6; [0153] In some embodiments n is from 1-4 or 3-4. [0154]
In some embodiments y is from 0-2; [0155] In some embodiments y is
from 0-1. [0156] L is a hydrophobic ligand; [0157] In some
embodiments L is Cp or a C1-C4 alkyl ligand. [0158] X is
hydrophilic ligand; [0159] In some embodiments X is an alkylamine,
alkoxide or halide ligand. [0160] M is metal (including group 13
elements, B, Ga); [0161] In some embodiments M has an oxidation
state of +1 up to +VI. [0162] In some embodiments M has an
oxidation state of +IV to +V. [0163] In some embodiments M can be a
transition metal. [0164] In some embodiments M is Ti, Ta, Nb, W,
Mo, Hf, Zr, V, or Cr. [0165] In some embodiments M is Hf, Zr, Ta or
Nb. In some embodiments M is Zr. [0166] In some embodiments M is
Co, Fe, Ni, Cu, or Zn. [0167] In some embodiments the metal is not
W or Mo. [0168] In some embodiments M can be a rare earth metal.
[0169] In some embodiments M is La, Ce, or Y. [0170] In some
embodiments M can be a metal from groups of 2-13. [0171] In some
embodiments M is Ba, Sr, Mg, Ca, or Sc. [0172] In some embodiments
M is not a noble metal.
[0173] More generally, in some embodiments, the selective ALD
process employs a metal precursor. In some embodiments, the metal
of the metal precursor may be selected from the group comprising
Al, Ti, Ta, Nb, W, Mo, Hf, Zr, V, Cr, Co, Fe, Ni, Cu, Zn, La, Ce,
Y, Ba, Sr, Mg, Ca, or Sc, or mixtures thereof. In some embodiments,
the metal may be Al.
[0174] In some embodiments, the hydrophobic reactant is
Bis(methylcyclopentadienyl) methoxymethyl Zirconium(IV)
((CpMe).sub.2-Zr--(OMe)Me).
[0175] In some embodiments, the hydrophobic reactant is
bis(methylcyclopentadienyl) methoxymethyl Hafnium(IV)
((CpMe).sub.2-Hf--(OMe)Me).
[0176] In other embodiments, the selective ALD process employs an
Al precursor. Examples of Al precursors include trimethyl aluminum
(TMA), aluminum trichloride (AlCl.sub.3), dimethylaluminum
isopropoxide (DMAI) and triethyl aluminum (TEA). In some
embodiments the aluminum precursor is a heteroleptic aluminum
compound. In some embodiments the heteroleptic aluminum compound
comprises an alkyl group and another ligand, such as a halide, for
example Cl. In some embodiments the aluminum compound is
dimethylaluminumchloride. In some embodiments the aluminum
precursor is an alkyl precursor comprising two different alkyl
groups as ligands. In some embodiments the aluminum precursor is a
metalorganic compound. In some embodiments the aluminum precursor
is an organometallic compound.
[0177] In some embodiments, the second reactant contributes one or
more elements to the material that is selectively deposited. For
example, the second reactant can be an oxygen precursor used to
deposit a metal oxide or a nitrogen precursor used to deposit a
metal nitride.
[0178] In some embodiments, the second reactant comprises an oxygen
precursor.
[0179] In some embodiments, the second reactant comprises
H.sub.2O.
[0180] In some embodiments, the second reactant comprises
O.sub.3.
[0181] In some embodiments, the second reactant comprises
H.sub.2O.sub.2.
[0182] In some embodiments, the second reactant comprises oxygen
plasma, ions, radicals, atomic O or excited species of oxygen.
[0183] In some embodiments, the second reactant comprises a
nitrogen precursor.
[0184] In some embodiments, the second reactant comprises
NH.sub.3.
[0185] In some embodiments, the second reactant comprises
N.sub.2H.sub.4.
[0186] In some embodiments, the second reactant comprises nitrogen
containing plasma, ions, radicals, atomic N or excited species
comprising N. In some embodiments, the nitrogen reactant can
comprise a mixture with corresponding hydrogen species.
[0187] In some embodiments, other reactants can be utilize that
contribute elements other than N or O to the deposited material.
These reactants may be used in addition to a N or O second
reactant, or may themselves serve as a second reactant. For
example, in some embodiments a sulfur reactant may be used to
deposit a sulphide, a carbon reactant may be used to deposit carbon
or a silicon reactant may be used to deposit a silicide.
[0188] In some embodiments, a second (or additional) reactant may
be used that aid in depositing a metal or metallic film, such as an
elemental metal film. For example, in some embodiments a hydrogen
reactant may be used.
[0189] Alternatively, as described with respect to FIG. 2D, a
metallic conductive film of interest can be selectively deposited
on the second surface, a metallic surface, relative to the organic
passivation layer. For example, U.S. Pat. No. 8,956,971, issued
Feb. 17, 2015 and U.S. Pat. No. 9,112,003, issued Aug. 18, 2015,
the entire disclosures of which are incorporated herein by
reference for all purposes, teach processes for selective
deposition of metallic materials on metallic surfaces relative to
non-metallic surfaces, including organic materials. As also noted
above with respect to FIG. 3A, a further dielectric layer, a metal
oxide material, can be selectively formed over the selectively
formed metallic material layer prior to removal of the organic
passivation layer.
[0190] In some embodiments a thin film comprising a material of
interest, such as aluminum oxide (e.g., Al.sub.2O.sub.3) or
titanium nitride (e.g., TiN) is selectively deposited on one or
more first dielectric or low-k surfaces relative to one or more
second metal surfaces, such as a copper, cobalt, titanium nitride
or tungsten surfaces. An exemplary process is illustrated in FIG.
13.
[0191] In Step 1A of FIG. 13 a substrate comprising low k surface
and metal surfaces is pretreated. As discussed above, in some
embodiments pretreatment may comprise exposing the substrate to a
plasma, such as hydrogen plasma. In some embodiments a non-plasma
pretreatment process is conducted. For example, in some embodiments
the substrate surface may be exposed to a silicon reactant, such as
N-(trimethylsilyl)dimethylamine (TMSDMA) or trimethylchlorosilane.
The reactant may be provided in a single long pulse, or in a
sequence of multiple shorter pulses. In some embodiments the
reactant is provided in 1 to 25 pulses of from about 1 to about 60
seconds. In between pulses, the reaction chamber may be purged with
an inert gas. The purge may be, for example for about 1 to 30
seconds.
[0192] In some embodiments the surface is contacted with an
alkylaminosilane having the formula
(R.sup.I).sub.3Si(NR.sup.IIR.sup.III), wherein R.sup.I is a linear
or branched C1-C10 hydrocarbon group or a linear or branched C1-C5
alkyl group or a linear or branched C1-C4 alkyl group, R.sup.II is
a linear or branched C1-C10 hydrocarbon group or a linear or
branched C1-C5 alkyl group, a linear or branched C1-C4 alkyl group,
or hydrogen, and R.sup.III is a linear or branched C1-C10
hydrocarbon group or a linear or branched C1-C5 alkyl group or a
linear or branched C1-C4 alkyl group.
[0193] In some embodiments the surface is contacted with a silane
having the general formula (R.sup.I).sub.3SiA, wherein R.sup.I is a
linear or branched C1-C10 hydrocarbon group or a linear or branched
C1-C5 alkyl group or a linear or branched C1-C4 alkyl group, and A
is any ligand which is reactive with the silicon containing
surface. That is, the silane bonds to the surface through ligand A,
or ligand A forms an bond to the surface but then ligand A may
migrate away from the surface and/or silane.
[0194] The temperature of the pretreatment process may be, for
example, from about 100 to about 300.degree. C. The pressure during
the pretreatment process may be, for example, from about 10.sup.-5
to about 760 Torr, or in some embodiments from about 1 to 10 Torr
or about 0.1 to about 10 Torr. In some embodiments, a pretreatment
or cleaning process may be carried out in situ, that is in the same
reaction chamber as a selective deposition process.
[0195] In Step 1B, an inhibitor, such as an organic material like a
polyimide, is selectively deposited on the metal surfaces. The
inhibitor may be deposited as described herein. In some embodiments
the deposition temperature is about 160 to about 220.degree. C. The
reaction chamber pressure may be, for example, from about 10.sup.-5
to about 760 Torr, or in some embodiments from about 1 to 10 Torr
or about 1 to 25 Torr. In some embodiments a vapor deposition cycle
for depositing a polyimide inhibitor is carried out from about 1 to
1000 times.
[0196] In some embodiments a polyimide inhibitor is deposited by
alternately and sequentially contacting the substrate with DAH and
PDMA. The DAH and PDMA may be alternately and sequentially provided
to the reaction space by pulses with a pulse length of about 0.1 to
10s, followed by a purge of about 0.1 to 10s between pulses.
[0197] In Step 1C, a cleanup process is carried out to remove any
inhibitor that is present on the low-k surfaces. The cleanup
process may comprise H.sub.2 plasma treatment. The cleanup process
may be carried out as described herein. In some embodiments the
cleanup process is carried out at a temperature of about room
temperature to about 400.degree. C. Plasma power of about 10 to
1000 W or about 25 to 250 W may be used to generate a plasma in
flowing H.sub.2, for example at a flow rate of about 10 to 500
sccm. The clean time after inhibitor deposition may be, for
example, from about 1 to 600 seconds.
[0198] In Step 1D a bake is carried out. The bake may, for example,
densify the inhibition layer and make it more robust, for example
against higher temperature processes that follow. In some
embodiments the bake is carried out at a temperature of about 100
to about 800.degree. C., for example about 300 to about 600.degree.
C. In some embodiments the bake step is carried out at a
temperature greater than 300.degree. C. In some embodiments the
bake step is carried out at a temperature of about 400.degree. C.
In some embodiments the bake time is about 1 to about 15 minutes.
The bake may comprise two steps--a first step at a lower
temperature and a second step at a higher temperature. For example,
the bake may comprise a first step at a temperature of about
250.degree. C. and a second step at a temperature of about
400.degree. C. In some embodiments the first and second steps are
carried out for the same amount of time. In other embodiments they
are carried out for different amounts of time.
[0199] In some embodiments the bake is carried out in the same
reactor as the subsequent selective deposition of the material of
interest. In some embodiments the bake is carried out in the same
reactor as the deposition of the inhibitor. In some embodiments the
bake is carried out in a separate reaction chamber.
[0200] In Step 1E a material is selectively deposited on the
dielectric surface relative to the metal surfaces comprising the
inhibitor by a vapor deposition process. Selective deposition may
be as described herein.
[0201] In some embodiments aluminum oxide is deposited in Step 1E
by alternately contacting the substrate with an aluminum reactant
and an oxygen reactant. The aluminum reactant may comprise,
trimethyl aluminum (TMA), aluminum trichloride (AlCl.sub.3),
dimethylaluminum isopropoxide (DMAI) and triethyl aluminum (TEA).
In some embodiments the aluminum precursor is a heteroleptic
aluminum compound. In some embodiments the heteroleptic aluminum
compound comprises an alkyl group and another ligand, such as a
halide, for example Cl. In some embodiments the aluminum compound
is dimethylaluminumchloride. In some embodiments, the aluminum
precursor is an alkyl precursor comprising two different alkyl
groups as ligands. In some embodiments, the aluminum precursor is a
metalorganic compound. In some embodiments, the aluminum precursor
is an organometallic compound. The oxygen reactant may comprise,
for example, water or H.sub.2O.sub.2. In some embodiments, aluminum
oxide may be deposited by an atomic layer deposition process in
which the substrate is alternately and sequential contacted with
dimethylaluminum isopropoxide (DMAI) and water or H.sub.2O.sub.2.
In some embodiments, the temperature in the reaction chamber during
aluminum oxide deposition is from about 150 to about 350.degree. C.
The pulse time for the reactants may be from about 0.1 to about 10
seconds, and the purge time between reactant pulses may also be
from about 0.1 to about 10 seconds. The reaction chamber pressure
may be, for example, from about 10.sup.-5 to about 760 Torr, or in
some embodiments from about 1 to 10 Torr.
[0202] In some embodiments titanium nitride is deposited in Step 1E
by alternately contacting the substrate with a titanium reactant
and a nitrogen reactant. The titanium reactant may comprise, for
example, TiCl.sub.4. The nitrogen reactant may comprise, for
example, NH.sub.3. In some embodiments TiN may be deposited by an
atomic layer deposition process in which the substrate is
alternately and sequential contacted with TiCl.sub.4 and NH.sub.3.
In some embodiments the temperature in the reaction chamber during
titanium nitride deposition is from about 250 to about 500.degree.
C. The pulse time for the titanium reactant may be from about 0.2
to about 10 seconds, and the pulse time for the nitrogen reactant
may be from about 0.1 to about 10 seconds. The purge time between
reactant pulses may also be from about 0.1 to about 10 seconds. The
reaction chamber pressure may be, for example, from about 10.sup.-5
to about 760 Torr, or in some embodiments from about 1 to 10 Torr.
The titanium nitride layer was deposited using the process flow
illustrated in FIG. 13.
[0203] In Step 1F the substrate is subjected to a post-deposition
cleaning step to remove the inhibitor from the metal surfaces, such
as treatment with H.sub.2 plasma. The cleaning step may comprise
H.sub.2 plasma treatment. The cleaning process may be carried out
as described herein. In some embodiments the cleaning step is
carried out at a temperature of about room temperature to about
400.degree. C. Plasma power of about 10 to 2000 W, 25 to 1000 W or
25 to 250 W may be used to generate a plasma in flowing H.sub.2,
for example at a flow rate of about 10 to 500 sccm. The clean time
after deposition of the layer of interest may be, for example, from
about 1 to 600 seconds.
[0204] In some embodiments a thin film comprising a material of
interest, such as aluminum oxide (e.g., Al.sub.2O.sub.3) or
titanium nitride (e.g., TiN) is selectively deposited on a first
surface of a three-dimensional structure relative to one or more
second surfaces. The three-dimensional structure may comprise, for
example, a via or a trench. In some embodiments an inhibitor, such
as a polyimide layer, is non-selectively deposited on the
three-dimensional structure. The inhibitor is then patterned to
expose the region on which selective deposition is desired. For
example, anisotropic etching can be used to remove the layer from
surfaces on which deposition is desired. Vapor deposition is then
carried out to deposit the layer of interest on the areas that are
not covered with inhibitor.
[0205] An exemplary process for selective deposition on a
three-dimensional structure is illustrated in FIG. 14. A structure
comprising a trench or via opening is illustrated. As shown in Step
2A, an inhibitor is conformally deposited on the feature. The
inhibitor may be deposited as described herein. For example, a
polyimide may be vapor deposited as described herein. In Step 2B,
the inhibitor is removed from the bottom of the trench by
anisotropic etch. As illustrated in Step 2C, following etch the
inhibitor is baked and the layer of interest is selectively
deposited on the exposed surface at the bottom of the trench
relative to the surfaces comprising the inhibitor. Finally, as
illustrated in Step 2D, the inhibitor material is removed from the
remaining surfaces. Although not illustrated, additional
pretreatment steps may be carried out as described herein.
Passivation Blocking Layer
[0206] As noted above, a self-assembled monolayer (SAM) can serve
to inhibit deposition of an organic passivation layer, thus
facilitating selective deposition of the organic passivation layer
on other surfaces. The term "blocking" is thus merely a label and
need not imply 100% deactivation of the organic passivation layer
deposition. As noted elsewhere herein, even imperfect selectivity
can suffice to obtain a fully selective structure after an etch
back process.
[0207] In one embodiment, a passivation blocking layer is formed on
the second surface to inhibit deposition of for comprises an SAM
containing sulfur. In one embodiment, the second surface is a
metallic surface. In one embodiment, the metallic surface is
pretreated with acid treatments prior to SAM formation.
Deposition Equipment
[0208] Examples of suitable reactors that may be used in the
selective deposition processes described herein include
commercially available ALD equipment. In addition to ALD reactors,
many other kinds of reactors capable of growth of organic
passivation layers, including CVD reactors, VDP reactors, and MLD
reactors, can be employed.
[0209] The selective dielectric on dielectric deposition described
herein with respect to FIGS. 1A-1D could be performed in up to five
processes. (1) pretreatment, (2) selective organic passivation
layer deposition on the first surface; (3) partial etch back, also
referred to as a "clean-up" etch, of any organic material from over
the second surface, (4) selective dielectric deposition on the
second surface; and (5) removal of the organic passivation layer
from over the first surface.
[0210] In one embodiment, tools for the sequence can be minimized
by combining the (2) selective organic passivation layer deposition
and the (3) partial etch-back in one chamber, and using a clustered
chamber to conduct the (4) selective dielectric deposition on the
second surface. The pretreatment can either be performed on another
platform (e.g., wet bench) or omitted through tuning of certain
recipes. The organic passivation layer removal may be performed in
a separate ashing tool, such as those often used for removal of
photoresist and other organic materials, or in the deposition
chamber using the same or a similar chemistry used for the partial
etch back of organic material. Thus, the deposition stages and
intervening etch back can be performed in platform that comprises 2
reactors, including either 4 or 8 processing stations, for the
polyimide deposition and etch back; and 2 reactors, including
either 4 or 8 processing stations, for the selective dielectric
deposition.
[0211] In some embodiments a cluster tool comprising three or more
reaction chambers. For example, a first chamber may be used for one
or both of pretreatment and etch processing. A second chamber may
be used for deposition of the organic layer, and a third chamber
may be used for selective deposition of the film of interest. A
bake process may be carried out in situ in the same chamber as the
selective deposition of the film of interest, or may be carried out
in a different chamber.
[0212] In some embodiments, selective deposition processes as
described herein can be performed in at least six processes, as
illustrated in FIG. 13. (Step 1A) pretreatment, (Step 1B) selective
inhibitor deposition, such as deposition of an organic layer
deposition on a first surface; (Step 1C) partial etch back, also
referred to as a "clean-up" etch, of any organic material from over
the second surface, (Step 1D) bake of the organic layer; (Step 1E)
selective deposition on the second surface; and (Step 1F) removal
of the organic layer from over the first surface.
[0213] Referring to FIG. 5, an apparatus 100 is provided for
conducting polymer deposition and organic material etch back in
situ. The apparatus 100 includes a reaction chamber defines a
reaction space 115 configured to accommodate at least one substrate
120. The apparatus 100 also includes a first reactant vessel 105
configured for vaporizing a first organic reactant 110 to form a
first reactant vapor. A gas line 130 fluidly connects the first
reactant vessel 105 to a reaction space 115 within which a
substrate 120 can be accommodated. The gas line 130 is configured
to selectively transport the first reactant vapor from the first
reactant vessel 105 to an inlet manifold 135 to the reaction space
115. The apparatus 100 also includes a second reactant vessel 140
holding a second reactant 145. In some embodiments, the second
reactant 145 is naturally in a gaseous state; in other embodiments,
the second reactant vessel 140 is also configured to vaporize the
second reactant 145 from a natural liquid or solid state. The
second reactant vessel 140 is in selective fluid communication with
the inlet manifold 135. The inlet manifold 135 can include a shared
distribution plenum across the chamber width, in a showerhead or
cross-flow configuration, or can maintain separate paths to the
reaction space 120 for separate reactants. For sequential
deposition embodiments, it can be desirable to keep the reactant
inlet paths separate until introduction to the reaction space 115
in order to avoid reactions along the surface of common flow paths
for multiple reactants, which can lead to particle generation. The
apparatus can in some embodiments include additional vessels for
supply of additional reactants.
[0214] The illustrated apparatus 100 also includes a plasma source
147. Although illustrated schematically as if attached to the
reaction space 115, the skilled artisan will appreciate that the
plasma source maybe be a remote plasma source external to the
reaction space 115, or may be an in situ plasma generator for
direct plasma generation (e.g., capacitively coupled) within the
reaction space 115. Alternatively or additionally, an ozone
generator may be employed for removal of organic material.
[0215] One or more additional gas source(s) 150 is (are) in
selective fluid communication with the first reactant vessel 105,
the reaction space 115 and the plasma source 147 (to the extent
separate from the reaction space 115). The gas source(s) 150 can
include inert gases that can serve as purge and carrier gases, and
other gases (e.g., Ar/H.sub.2) for plasma etch back. Inert gas
supply from the gas source(s) can also be in selective fluid
communication with the second reactant vessel 140, as shown, and
any other desired reactant vessels to serve as a carrier gas.
[0216] A control system 125 communicates with valves of the gas
distribution system in accordance with organic passivation layer
deposition and etch back methods and described herein. The control
system 125 typically includes at least one processor and a memory
programmed for desired processing. For sequential deposition
processing, the valves are operated in a manner that alternately
and repeatedly exposes the substrate to the reactants, whereas for
simultaneous supply of the reactants in a conventional CVD process,
the valves can be operated to simultaneously expose the substrate
to mutually reactive reactants.
[0217] An exhaust outlet 155 from the reaction space 115
communicates through an exhaust line 160 with a vacuum pump 165.
The control system 125 is configured to operate the vacuum pump 165
to maintain a desired operational pressure and exhaust excess
reactant vapor and byproduct through the exhaust outlet 155.
[0218] The control system 125 can also control pressure and
temperature in various components of the apparatus 100. For
example, the control system can be programmed to keep the substrate
120 at a suitable temperature for the processes being performed. In
one embodiment, control system 125 is also configured to maintain
the first reactant 110 in the first reactant vessel 105 at a
temperature A, and is configured to maintain the substrate 120 in
the reaction space 115 at a temperature B, where the temperature B
is lower than the temperature A. In an embodiment, the control
system 125 or a separate temperature control is also configured to
maintain the gas line 130 at a temperature C, where the temperature
C is higher than the temperature A.
[0219] Accordingly, the apparatus 100 includes source vessels 105,
140 for vaporizing and supplying the reactants described above for
polymer deposition (e.g., one vessel for a diamine and one vessel
for a dianhydride precursor). The plasma source 147 communicates
with gas source(s) 150 that include a source of H.sub.2 and inert
gas (e.g., noble gas, such as argon or helium). Additionally, the
apparatus 100 includes a control system 125 programmed to supply
gases and operate the plasma source in a manner to perform the
polymer deposition described herein, as well as a hydrogen plasma
etch back. The control system 125 maintains the substrate 120 in a
range of 180.degree. C. to 220.degree. C., or about 190.degree. C.
to 210.degree. C., such that the polymer deposition and etch back
can be conducted at the same temperature sequentially, without
removing the substrate 120 from the reaction space 115. The etch
back may be from 0.5-600 seconds, 1-120 seconds, 1-60 seconds, 1-20
seconds, 2-15 seconds, and 5-15 seconds. As another example, a
pulsed ozone (O.sub.3) etch process may be used for the etch back
process. As the skilled artisan will appreciate, process conditions
may be modified for slower and more controlled etching for the
purpose of partial etch back to minimize overetching of the desired
passivation layer on the first surface. Indeed, etch rate depends
strongly upon etch temperature for O.sub.3 etching of polymer.
Combining the selective deposition of the passivation layer with
the partial etch back would not increase process time of the single
chamber much, as the etch process is typically very short. The same
equipment and etchants can also be used for removal of the
passivation layer.
[0220] The apparatus 100 configured for polymer deposition and etch
back, could be a showerhead reactor with solid source vessels for
DAH (with a vaporization temperature of about 40.degree. C.) and
PMDA (with vaporization temperature of about 170.degree. C.). In
one embodiment, the plasma source 147 comprises an in situ direct
plasma (e.g., capacitively coupled) apparatus with argon and
H.sub.2 supply for the in situ etch back. In another embodiment,
the apparatus 100 may be a cross-flow reactor rather than a
showerhead reactor, but still having the above-noted with solid
source vessels 105, 140 and direct plasma capability. In another
embodiment, the plasma source 147 comprises a remote plasma is
coupled to the reaction space 115 to supply plasma produces from an
Ar/H.sub.2 plasma. In another embodiment, the plasma source 147
could be replaced with an ozone generator coupled to the reaction
space 115. The remote plasma or ozone generator could, for example,
be connected to a showerhead reactor.
[0221] The polymer deposition apparatus 100 desirably includes
self-cleaning capability to keep the reaction space 115 and exhaust
lines 160 clean after multiple depositions. In some embodiments,
the in situ or remote Ar/H.sub.2 plasma source 147 noted above for
etch back can be adapted for periodic chamber cleaning, possibly
under higher power or temperatures, as it can operate in the
absence of production substrates and only periodically (rather than
every wafer). Alternatively, the polymer deposition chamber can be
provided with a remote plasma supplied with NF.sub.3 etch, or an
ozone supply to conduct periodic chamber cleans. In some
embodiments, an O.sub.3/N.sub.2 supply can be adapted for periodic
chamber cleaning, possibly under higher power or temperatures
compared to the polymer partial etch back or removal processes, as
the chamber clean process operates in the absence of production
substrates and only periodically (rather than every wafer).
Line Edge Position
[0222] Referring to FIG. 6 and in some embodiments, as described
above, selective deposition on a second surface can be accomplished
by selective passivation of a first surface following selective
deposition of a dielectric, such as ZrO.sub.2, on the second
surface. In the illustrated flow chart, the first surface can be
metallic (e.g, an embedded metal feature in an integrated circuit
interlevel dielectric, or ILD), and the second surface can be
dielectric (e.g., the ILD). The passivation can comprise a polymer
or other organic material selectively deposited on the first
surface relative to the second surface of a part in Step 1.
Subsequently, a polymer etch back, sometimes referred to as a
"clean-up" etch to perfect the selectivity, is performed to remove
polymer that may have deposited on the second surface in Step 2,
without removing all of the polymer from the first surface. As the
polymer acts as a passivation layer, a dielectric material is
selectively deposited on the second surface in Step 3. Any number
of suitable dielectric materials may be used in Step 3. In some
embodiments, the dielectric material may be selected from ZrO.sub.2
and other metal oxides, such as transition metal oxides or aluminum
oxide, or other dielectric oxides including mixtures having etch
selectivity over SiO.sub.2-based materials or slow etch rate in
conditions in which SiO.sub.2-based materials are etched. Even
though some such metal oxides may have high k values, higher than 5
or even higher than 10, they are thin, are located in positions
that avoid significant parasitic capacitance in metallization
structures, and advantageously allow for masking surfaces against
selective etching of silicon oxide materials. In other embodiments,
the dielectric can be a silicon oxide based material, but may be
thicker to serve as an etch mask as described herein. In Step 4 of
FIG. 6, the polymer passivation is removed from the first
surface.
[0223] FIG. 7 illustrates the effect that etch back time for
removal of the passivation (e.g., polymer or other organic layer)
from the second surface has on the dielectric layer formed. More
specifically, the position of the edge of the selectively formed
dielectric layer can be controlled relative to the boundary between
the underlying metallic and dielectric surfaces by selecting the
extent of the intermediate polymer etch back process. In an
embodiment, polymer is deposited on the first surface relative to
the second surface of a part, as described previously in Step 1 of
FIG. 6, as seen in the 1.sup.st row of illustrations in FIG. 7. As
seen in the polymer as deposited illustration, the deposition of
the polymer on the first surface creates a thicker polymer layer
surface over the first surface, with a relatively thin polymer
layer over the second surface, consequently having a downwardly
sloped polymer thickness from the first surface to the second
surface at the first-second surface boundary. Subsequently, a
polymer etch back, as described previously in Step 2 of FIG. 6, may
be performed for varying durations (or for the same durations with
different etch rates, such as by different temperatures or etchant
concentrations, or for different durations and different etch
rates) to control the thickness and shape of the polymer layer, as
seen in the 2.sup.nd through 6.sup.th rows of the first column of
illustrations in FIG. 7. The etch back may be isotropic or
anisotropic. In some embodiments, a polymer etch time is minimal
and the polymer etch does not remove sufficient polymer to expose
the second surface, as seen in the 2.sup.nd row of illustrations in
FIG. 7. In this case, the subsequent selective dielectric
deposition does not work because both the first and second surfaces
are covered with the passivation layer, and even if a small amount
of dielectric deposits it will be removed by a lift-off process
with removal of the passivation layer. In some embodiments, a
polymer etch time is selected to remove the majority of the polymer
formed from the second surface, but leave a polymer layer leading
edge that extends over the first-second surface boundary onto the
second surface, as seen in the 3.sup.rd row of illustrations in
FIG. 7. In this case, subsequent selective deposition of the
dielectric and removal of the polymer leaves a gap between the
deposited dielectric edge and the first-second surface boundary. In
some embodiments, a polymer etch time is selected to remove the
polymer from the second surface, and a polymer layer edge is left
aligned with the first-second surface boundary. In this case,
subsequent selective deposition of the dielectric and removal of
the polymer leaves the bottom surface edge of deposited dielectric
aligned with the first-second surface boundary. In some
embodiments, a polymer etch time is selected to remove the polymer
from the second surface and a portion of the polymer from the first
surface, and a first gap exists between a polymer layer leading
edge and first-second surface boundary, as seen in the 5.sup.th row
of illustrations in FIG. 7. In this case, subsequent selective
deposition of the dielectric and removal of the polymer leaves the
deposited dielectric extending over the first-second surface
boundary and overlapping with the first surface. If the polymer
etch time is performed for an extended period of time and the
polymer etch completely removes the polymer from both the first
surface and the second surface, as seen in the 6.sup.th row of
illustrations in FIG. 7, then subsequent dielectric deposition is
not selective.
[0224] Thus, selective dielectric selective deposition and partial
polymer etch back, as described previously in Steps 3 and 4 of FIG.
6, may be performed to create various relationships between the
edge of the selectively deposited dielectric layer on the second
surface and the interface between the first and second surfaces,
depending on the extent of the passivation etch back following its
selective deposition, as seen in the right-most images of the
2.sup.nd through 6.sup.th rows of the third column of illustrations
in FIG. 6. In some embodiments, no dielectric layer is formed
because the polymer layer passivated the second surface, as seen in
the 2.sup.nd row of illustrations in FIG. 7. In some embodiments, a
gap exists between a dielectric on the second surface first
surface, as seen in the 3.sup.nd row of illustrations in FIG. 7. In
some embodiments, the dielectric layer edge is aligned with the
first-second surface boundary, as seen in the 4.sup.th row of
illustrations in FIG. 7. In some embodiments, the dielectric layer
overlaps the first surface, as seen in the 5.sup.th row of
illustrations in FIG. 7. In some arrangements, the dielectric layer
forms on both the first surface and the second surface because no
polymer layer passivated the first surface.
[0225] FIG. 8 illustrates the effect that passivation layer
deposition thickness has on the dielectric layer formed. More
specifically, the position of the edge of the selectively formed
dielectric layer can be controlled relative to the boundary between
the underlying metallic and dielectric surfaces by selecting the
thickness of the intermediate polymer passivation layer. As
passivation layer deposition thickness increases, the passivation
layer thicknesses on both the first surface and second surface are
increased. However, because the passivation layer is selectively
deposited on the first surface, the passivation thickness over the
second surface increases less than the passivation layer thickness
over the first surface. Therefore, a passivation etch back,
dielectric deposition and passivation removal will create selective
dielectric layers with varying positions relative to the
first-second surface boundary. In some embodiments, a passivation
layer is deposited which produces a gap between a selectively
deposited dielectric layer edge and the first-second surface
boundary, as seen in as seen in the 1.sup.st column of
illustrations in FIG. 8. In some embodiments, a thicker polymer
layer is deposited which produces a larger gap between a
selectively deposited dielectric layer edge and the first surface,
as seen in as seen in the 2.sup.nd column of illustrations in FIG.
8.
[0226] FIG. 9 illustrates the effect selectively deposited
dielectric thickness has on the relative positions of the
dielectric layer formed and the first-second surface boundary. More
specifically, the position of the edge of the selectively formed
dielectric layer can be controlled relative to the boundary between
the underlying metallic and dielectric surfaces by selecting the
thickness of the selective dielectric layer. As dielectric
deposition thickness selectively deposited on the second surface
increases, the dielectric overhang edge increasingly extends
further past the first-second surface boundary. In some
embodiments, a dielectric layer is deposited which produces a
certain overhang structure, as seen in as seen in the 1.sup.st
column of illustrations in FIG. 9. In some embodiments, a thicker
dielectric layer is deposited which produces a greater overhang, as
seen in as seen in the 2.sup.nd column of illustrations in FIG. 9.
In some embodiments, an even thicker dielectric layer is deposited
which produces an even greater dielectric overhang over the first
surface, as seen in as seen in the 3.sup.rd column of illustrations
in FIG. 9. For certain subsequent processes, such as anisotropic
processing (e.g., anisotropic reactive ion etching), the extent of
the overhang can shadow portions of the first surface and protect
against the subsequent processing.
[0227] Thus, in some embodiments, though largely selectively formed
over the dielectric surface similar to FIG. 1D, the dielectric
layer is selectively deposited to produce an overhang and/or
overlap with the metallic feature. In some embodiments, the
dielectric layer does not comprise an overhang or overlap, and the
edge of the selectively deposited dielectric on dielectric can be
aligned with the edge of the metallic feature or there can be a gap
between the edge of the selectively deposited dielectric layer and
the metallic feature. Because of the selective deposition
techniques taught herein, the selectively deposited dielectric
layer may have features characteristic of selective deposition,
without the use of traditional masking and etching to pattern the
dielectric layer. For example, the edge of the dielectric layer may
be tapered with a slope of less than 45 degrees, rather than having
a vertical or steeply sloped sidewall, as is typical of
photolithographically patterned layers. This characteristic etch
profile may remain whether or not the selectively deposited layer
was subjected to a clean-up etch, or partial etch back.
[0228] FIGS. 10A-10D illustrate how topography can affect the
relationship between a selectively deposited dielectric and the
boundary between first and second surfaces
[0229] FIG. 10A illustrates a planar structure that results in an
edge of a selectively deposited dielectric 2502 being aligned with
the first-second surface boundary. The first surface that is
passivated by a passivation layer 2504, for example a polymer
material, can be defined by a metallic material, such as embedded
metal 2506, and the second surface can be defined by a low k
dielectric, such as an interlevel dielectric (ILD) 2508. The
passivation layer 2504 is selectively deposited over the first
surface and the dielectric layer 2502 is selectively deposited over
the second surface, wherein the edge of the dielectric layer 2502
is aligned with the first-second surface boundary.
[0230] FIG. 10B illustrates a recessed first surface relative to
the second surface. As above, the first surface can comprise a
metallic material 2506 embedded and recessed with in a low k
dielectric material 2508 that defines the second surface. The
passivation layer 2504 is selectively formed over the first surface
within the recess. The dielectric layer 2502 is disposed over the
second surface and over the recess walls, wherein the edge of the
dielectric layer 2502 meets the surface of the passivation layer
2504. Removal of the passivation layer 2504 will result in the
dielectric layer 2502 selectively formed on the second surface but
overlapping with the first surface (e.g., metallic feature
2506).
[0231] FIG. 10C illustrates an elevated first surface with respect
to the second surface. The first surface can be defined by a
metallic material 2506 embedded in and protruding above the second
surface, which can be a low k dielectric material 2508. The
passivation layer 2504 is disposed over the first surface,
including protruding side walls, and thus at least partially
disposed over the second surface. The dielectric layer 2502 is
disposed over the second surface but is spaced from the first
surface by the thickness of the passivation material 2504 on the
side walls. Thus, after removal of the passivation layer 2504,
there is a gap between the dielectric layer 2502 and the first
surface (e.g., protruding metallic feature 2606)
[0232] FIG. 10D illustrates a recessed first surface of some
embodiments. In this case, after removal of the passivation layer
2504, a gap is left between the selectively deposited dielectric
layer 2502 on the second surface and the first surface. In this
case, the gap takes the form of a vertical sidewall of the second
surface, which is then exposed to subsequent processing.
[0233] Thus, FIGS. 7-10D illustrate variables that can be adjusted
to tune the position of a selectively deposited dielectric 2502
(e.g., on dielectric second surface) relative to an interface
between the first and second surfaces (e.g., between a metallic
feature 2506 and low k dielectric 2508). In particular, FIG. 7
shows how extent or time for passivation layer etch back can affect
the relative positions; FIG. 8 shows how thickness of the
selectively deposited passivation layer can affect the relative
positions; FIG. 9 shows how thickness of the selectively deposited
dielectric layer can affect the relative positions; and FIGS.
10A-10D show how topography of the first and second surfaces can
affect the relative positions. These variables can thus be adjusted
to affect whether the selectively deposited dielectric on the
second surface is aligned with, has a gap relative to, or overlaps
the first surface.
Example Applications
[0234] FIGS. 11A-11E illustrate a device and process of creating a
device, in some embodiments, with improved electrical isolation.
FIG. 11A illustrates a partially fabricated integrated circuit with
an embedded metallic feature 2606 that defines a first surface
which is flush with a second surface, defined by the surrounding
low k material 2608, similar to the planar structure shown in FIG.
10A. The metallic feature comprises a first material further
comprising Cu 2610 and TaN barrier material 2612 positioned within
a first low-k dielectric material 2608.
[0235] FIG. 11B illustrates the device of FIG. 11A subsequent to a
conductive barrier layer 2614 over the first material. In some
embodiments, the barrier layer 2614 may be W. While illustrated as
protruding, in some embodiments the barrier material 2614 over the
Cu 2610 line or via may be embedded in and flush with the
surrounding low k material 2608.
[0236] FIG. 11C illustrates the device of FIG. 11B subsequent to
the selective deposition of a passivation layer 2604 over the first
surface now defined by the metallic barrier layer 2614 (W), wherein
edges of the first surface are exposed. In some embodiments, the
passivation layer 2604 may be an organic material, such as a
polymer. In some embodiments, the selective deposition of the
passivation layer 2604 is followed by an etch back of the
passivation layer material sufficient to expose some of the
metallic first surface.
[0237] FIG. 11D illustrates the device of FIG. 11C subsequent to
the selective deposition of a dielectric layer 2602 over the second
surface, overlapping with the metallic first surface. In some
embodiments, the dielectric layer 2602 may be a high-k material. In
some embodiments, the high-k material may be ZrO.sub.2. In some
embodiments, the selective dielectric layer 2602 may be a low-k
material, such as SiOC, Al.sub.2O.sub.3, and SiN. In some
embodiments, the selectively deposited dielectric material 2602 may
serve as an etch stop with respect to subsequent etches through low
k material 2608 to open trenches or vias that expose the metallic
barrier material 2614.
[0238] FIG. 11E illustrates the device of FIG. 11D subsequent to
removal of the polymer passivation layer 2604, thereby exposing the
underlying metal layer surface (of barrier material 2614 in this
case). The selective dielectric 2602 overlaps the metallic first
surface defined by barrier layer 2614 and reduces the risk of
shorting when a subsequent metallic feature (e.g., overlying metal
line or via) is formed thereover. In particular, a low k material
is deposited over the structure of FIG. 11E, and openings are
created and filled with metal. The openings are created by masking
and selective low k etching, and the etch stops on the selectively
deposited dielectric (e.g., ZrO.sub.2). The overlap of the
selectively deposited dielectric 2602 with the metallic feature
defined by the barrier layer 2614, resulting from the selection of
conditions during the passivation, etch-back, dielectric deposition
and/or topography, protects against misalignment. Thus the overlap
prevents contact with adjacent metallic features or undesired
etching of the lower low k material 2608. Note that the selectively
deposited dielectric material 2602 can stay in the final integrated
circuit device, having served as an etch stop between ILD layers.
Although ordinarily high k materials are avoided in metallization
processes, parasitic capacitance is minimal. Minimal parasitic
capacitance is due to the predominant position of the high k
material over the low k material, the thinness of the high k
material due to its functions, and the advantage of high
selectivity for this dielectric capping layer over high k material
outweighs slight parasitic capacitance introduced by the material
selection. Of course, high etch selectivity may also be achieved
with lower k materials to be selectively deposited on the ILD.
[0239] FIGS. 12A-12B illustrate a device and process of creating a
device, in some embodiments, with air-gaps, which may be desirable
for a variety of reasons, such as reduction of parasitic
capacitance between closely spaced metallic features (e.g., metal
lines) in an integrated circuit. FIG. 12A illustrates planar
surface of a partially fabricated integrated circuit of some
embodiments, similar to the device previously shown in FIG. 10A.
The initial structure may be a first surface defined by a metallic
feature 2706 (e.g., Cu line with dielectric and barrier liners)
surrounded by a second surface defined by dielectric material 2608
(e.g., low k ILD). A passivation layer 2704 is selectively
deposited over the first surface, and an etch back performed to
expose the second surface in a manner that leaves the passivation
layer 2704 over the first surface and partially over the second
surface. A dielectric 2702 is selectively deposited over the second
surface, wherein the dielectric layer edge is spaced away from the
first-second surface boundary onto the second surface. FIG. 12B
illustrates the device of FIG. 12A subsequent to the removal of the
passivation layer 2704 to expose the first surface and partially
expose the second surface previously covered by the first material,
leaving a gap 2710 between the selectively deposited dielectric
material and the first surface (metallic feature 2706).
Subsequently selectively etching the exposed second material forms
cavities 2712 in those gaps 2710 next to the metallic features. In
some embodiments, the second material that is selectively etched is
SiO. In some embodiments, selective etching is an HBr dry etch. An
HBr dry etch can selectively etch silicon oxide at about 6-8
nm/min, whereas certain other materials are etched at lower rates
such as silicon nitride (<0.3 nm/min) and zirconium oxide
(<0.3 nm/min), and likely will not etch tungsten without
chlorine (e.g., C1.sub.2) or sulfur hexafluoride (e.g., SF.sub.6).
Deposition of a third material 2714, such as standard low k
material, with sufficiently low conformality leaves air-gaps 2716
within the low k material 2708 adjacent to a lateral sides of the
metallic features 2706. As is known in the art, the air cavities
lower the overall k value of the ILD and reduce parasitic
capacitance between metallic features.
[0240] Although certain embodiments and examples have been
discussed, it will be understood by those skilled in the art that
the scope of the claims extend beyond the specifically disclosed
embodiments to other alternative embodiments and/or uses and
obvious modifications and equivalents thereof.
* * * * *