U.S. patent application number 16/096441 was filed with the patent office on 2019-05-16 for methods for singulation and packaging.
The applicant listed for this patent is FLIR SYSTEMS, INC.. Invention is credited to Alexander FELDMAN, Hagit GERSHTENMAN-AVSIAN, Andrey GRINMAN, David OVRUTSKY.
Application Number | 20190148232 16/096441 |
Document ID | / |
Family ID | 60161133 |
Filed Date | 2019-05-16 |
![](/patent/app/20190148232/US20190148232A1-20190516-D00000.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00001.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00002.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00003.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00004.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00005.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00006.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00007.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00008.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00009.png)
![](/patent/app/20190148232/US20190148232A1-20190516-D00010.png)
View All Diagrams
United States Patent
Application |
20190148232 |
Kind Code |
A1 |
OVRUTSKY; David ; et
al. |
May 16, 2019 |
METHODS FOR SINGULATION AND PACKAGING
Abstract
A method of singulating includes scribing a first scribe line on
a first side of a substrate, scribing a second scribe line on a
second side of the substrate, the first and second sides facing
away from each other, the second scribe line being substantially
parallel to the first scribe line, and simultaneously separating
the substrate at the first scribe line and the second scribe
line.
Inventors: |
OVRUTSKY; David; (Charlotte,
NC) ; GERSHTENMAN-AVSIAN; Hagit; (Charlotte, NC)
; FELDMAN; Alexander; (Los Altos, CA) ; GRINMAN;
Andrey; (Charlotte, NC) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
FLIR SYSTEMS, INC. |
Wilsonville |
OR |
US |
|
|
Family ID: |
60161133 |
Appl. No.: |
16/096441 |
Filed: |
April 28, 2017 |
PCT Filed: |
April 28, 2017 |
PCT NO: |
PCT/US17/30215 |
371 Date: |
October 25, 2018 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
62329584 |
Apr 29, 2016 |
|
|
|
Current U.S.
Class: |
257/690 |
Current CPC
Class: |
H01L 21/6836 20130101;
H01L 24/94 20130101; B23K 26/364 20151001; H01L 21/50 20130101;
H01L 2924/16235 20130101; H01L 23/04 20130101; H01L 21/78 20130101;
H01L 24/09 20130101 |
International
Class: |
H01L 21/78 20060101
H01L021/78; H01L 23/00 20060101 H01L023/00; H01L 21/50 20060101
H01L021/50; H01L 21/683 20060101 H01L021/683; H01L 23/04 20060101
H01L023/04; B23K 26/364 20060101 B23K026/364 |
Claims
1. A method of singulating, comprising: scribing a first scribe
line on a first side of a substrate; scribing a second scribe line
on a second side of the substrate, the first and second sides
facing away from each other, the second scribe line being
substantially parallel to the first scribe line; and simultaneously
separating the substrate at the first scribe line and the second
scribe line.
2. The method as claimed in claim 1, wherein scribing uses a laser
irradiated on the substrate in a stealth dicing operation.
3. The method as claimed in claim 1, wherein the substrate includes
first and second substrates in a stacked arrangement, the first
scribe line being formed in the first substrate, and the second
scribe line being formed in the second substrate.
4. The method as claimed in claim 3, wherein the first and second
scribe lines are offset from one another.
5. The method as claimed in claim 3, wherein the first scribe line
does not separate the second substrate.
6. (canceled)
7. The method as claimed in claim 3, further comprising scribing a
third scribe line on the second side of the substrate, the third
scribe line being substantially parallel to the first scribe line,
the second and third scribe lines being spaced apart, wherein the
second and third scribe lines form edges of a portion of the second
substrate that is not attached to the first substrate.
8. The method as claimed in claim 3, wherein the first substrate
includes at least one circuit structure, and the second substrate
forms a lid for the at least one circuit structure.
9. The method as claimed in claim 3, further comprising attaching a
dicing tape to the first wafer, the dicing tape being expanded
after the second scribe line is formed.
10. The method as claimed in claim 1, wherein separating the
substrate at the first scribe line and the second scribe line
provides a singulated die having an angled sidewall in which an
edge of the singulated die forms an angle greater than 0 degrees
and less than 90 degrees with a face of the singulated die.
11. A device fabricated from a substrate having a plurality of
devices and singulated according to the method as claimed in claim
1.
12. The device as claimed in claim 11, wherein the device includes
a circuit die section and a lid die section, and at least one side
surface of the circuit die section and at least one side surface of
the lid die section have ridges extending in a longitudinal
direction.
13. A method of manufacturing a device, the method comprising:
providing a first wafer having a plurality of devices; providing a
second wafer having a lid pattern delineating a plurality of lids;
removing portions of a surface of the second wafer corresponding to
lid edges in the lid pattern using a beveled dicing blade such that
the lids have at least one sidewall that is at an angle relative to
the second substrate, the angle being greater than 0 and less than
90 degrees wherein, during removal of the portions of the surface
of the second wafer corresponding to the lid edges, the dicing
blade does not completely penetrate the second substrate; and
attaching the first and second wafers together such that the lids
cover the devices.
14. (canceled)
15. The method as claimed in claim 13, further comprising scribing
scribe lines along the removed portions of the surface of the
second wafer.
16. The method as claimed in claim 15, wherein the scribing uses a
laser irradiated on the second substrate in a stealth dicing
operation.
17. A device manufactured according to the method as claimed in
claim 13.
18. A device package, comprising: a device on a substrate, the
substrate having a bond pad area that includes at least one bond
pad; and a lid attached to the substrate, the lid covering the
device, the lid exposing the bond pad area, the lid having a
sidewall extending at an angle to the substrate, the angle being
greater than 0 and less than 90 degrees.
19. A method of manufacturing a device, the method comprising:
providing a first wafer having a plurality of devices; providing a
second wafer having a lid pattern delineating a plurality of lids;
attaching the first and second wafers together such that the lids
cover the devices; and singulating the second wafer such that the
lids have at least one angled sidewall that is at an angle relative
to a major surface of the second wafer, the angle being greater
than 0 and less than 90 degrees.
20. The method as claimed in claim 19, further comprising scribing
scribe lines along removed portions of the surface of the second
wafer to create the angled sidewall.
21. The method as claimed in claim 20, wherein the scribing uses a
laser irradiated on the second substrate in a stealth dicing
operation.
22. A device manufactured according to the method as claimed in
claim 19.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application claims priority to pending U.S. Provisional
Application No. 62/329,584, filed in the U.S. Patent and Trademark
Office on Apr. 29, 2016, and entitled "Methods for Singulation and
Packaging," which is incorporated by reference herein in its
entirety and for all purposes.
BACKGROUND
1. Field
[0002] Example embodiments relate to methods for singulation and
packaging.
2. Description of the Related Art
[0003] Device manufacturing processes, e.g., semiconductor device
manufacturing, MEMS (microelectromechanical systems) device
manufacturing, optical device manufacturing, etc., may fabricate a
plurality of devices on a wafer or mother substrate, after which
the wafer or mother substrate may be singulated into units and
packaged. Singulation and packaging may be performed in a number of
ways, and singulation and packaging may include overlapping or
interleaved operations, rather than being purely sequential.
SUMMARY
[0004] Embodiments are directed to a method of singulating,
including scribing a first scribe line on a first side of a
substrate, scribing a second scribe line on a second side of the
substrate, the first and second sides facing away from each other,
the second scribe line being substantially parallel to the first
scribe line, and simultaneously separating the substrate at the
first scribe line and the second scribe line.
[0005] Scribing may use a laser irradiated on the substrate in a
stealth dicing operation.
[0006] The substrate may include first and second substrates in a
stacked arrangement, the first scribe line being formed in the
first substrate, and the second scribe line being formed in the
second substrate.
[0007] The first and second scribe lines may be offset from one
another.
[0008] The first scribe line may not separate the second
substrate.
[0009] The second scribe line may not separate the first
substrate.
[0010] The method may further include scribing a third scribe line
on the second side of the substrate, the third scribe line being
substantially parallel to the first scribe line, the second and
third scribe lines being spaced apart. The second and third scribe
lines may form edges of a portion of the second substrate that is
not attached to the first substrate.
[0011] The first substrate may include at least one circuit
structure, and the second substrate may form a lid for the at least
one circuit structure.
[0012] The method may further include attaching a dicing tape to
the first wafer, the dicing tape being expanded after the second
scribe line is formed. Embodiments are also directed to a device
fabricated from a substrate having a plurality of devices and
singulated according to the method according to an embodiment. The
device may include a circuit die section and a lid die section, and
at least one side surface of the circuit die section and at least
one side surface of the lid die section may have ridges extending
in a longitudinal direction.
[0013] Embodiments are also directed to a method of manufacturing a
device, the method including providing a first wafer having a
plurality of devices, providing a second wafer having a lid pattern
delineating a plurality of lids, removing portions of a surface of
the second wafer corresponding to lid edges in the lid pattern
using a beveled dicing blade such that the lids have at least one
sidewall that is at an angle relative to the second substrate, the
angle being greater than 0 and less than 90 degrees, and attaching
the first and second wafers together such that the lids cover the
devices.
[0014] During removal of the portions of the surface of the second
wafer corresponding to the lid edges, the dicing blade may not
completely penetrate the second substrate.
[0015] The method may further include scribing scribe lines along
the removed portions of the surface of the second wafer.
[0016] The scribing may use a laser irradiated on the second
substrate in a stealth dicing operation.
[0017] Embodiments are also directed to a device package, including
a device on a substrate, the substrate having a bond pad area that
includes at least one bond pad, and a lid attached to the
substrate, the lid covering the device, the lid exposing the bond
pad area, the lid having a sidewall extending at an angle to the
substrate, the angle being greater than 0 and less than 90
degrees.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Features will become apparent to those of skill in the art
by describing in detail example embodiments with reference to the
attached drawings, in which:
[0019] FIG. 1A illustrates a cutaway view of a lid wafer with an
etched lids pattern.
[0020] FIG. 1B illustrates a magnified portion of FIG. 1A.
[0021] FIG. 2A illustrates cutaway view of a bonding of a lid wafer
and circuit wafer.
[0022] FIG. 2B illustrates a magnified portion of FIG. 2A.
[0023] FIG. 3A illustrates a cutaway view of a dicing tape mounted
on the circuit wafer and laser scribing of the lid wafer.
[0024] FIG. 3B illustrates a magnified portion of FIG. 3A.
[0025] FIG. 4 illustrates a cutaway view of remounting a dicing
tape on the scribed lid wafer and laser scribing of the circuit
wafer.
[0026] FIG. 5 illustrates a cutaway view of expansion of the dicing
tape to separate dies.
[0027] FIG. 6 illustrates a cutaway view of an example of an
expanded WLP following singulation.
[0028] FIG. 7A illustrates a cutaway view of an example of an
individual package following singulation, and FIG. 7B illustrates
ridges produced by a stealth dicing process.
[0029] FIG. 8 illustrates a singulated package having a lid with
straight edges.
[0030] FIG. 9 illustrates a singulated package having a lid with
relieved edges.
[0031] FIG. 10 illustrates an enlarged cutaway view of a lid wafer
with an etched lids pattern and beveled kerfs.
[0032] FIG. 11 illustrates a flowchart of a singulation process
according to an embodiment.
[0033] FIG. 12 illustrates stealth dicing to induce defects along
an angled plane.
DETAILED DESCRIPTION
[0034] Example embodiments will now be described more fully
hereinafter with reference to the accompanying drawings; however,
they may be embodied in different forms and should not be construed
as limited to the embodiments set forth herein. Rather, these
embodiments are provided so that this disclosure will be thorough
and complete, and will fully convey the scope of the example
embodiments to those skilled in the art. Like reference numerals
refer to like elements throughout.
[0035] According to an example embodiment, a singulation process
flow uses two aligned back-to-front laser scribes with a single
expansion that simultaneously singulates both lid and circuit
bonded substrates of wafer level package (WLP) wafer stack.
[0036] A manufacturing process may form a plurality of sensors on a
wafer. A general singulation process may include a saw dicing
process to singulate a lid wafer into individual caps or lids above
the sensor area. Such a process may result in significant yield
loss, e.g., .about.25%. For example, a dicing blade, while
traveling above bond pad areas of a chip (sensor or chip having a
sensor) may bombard the surface with wafer debris and lid chips,
e.g., silicon debris, which may then damage electronic
circuits.
[0037] A singulation process according to an embodiment will be
described in connection with FIGS. 1 through 7 and the flowchart
illustrated in FIG. 11.
[0038] FIG. 1A illustrates a cutaway view of a lid wafer with an
etched lids pattern. FIG. 1B illustrates a magnified portion of
FIG. 1A.
[0039] Referring to FIGS. 1A and 1B, a lid wafer may be prepared
for inclusion in a WLP wafer stack. The lid wafer may have a
plurality of lids (or caps) patterned therein, e.g., by etching.
The etching may form recesses that will enclose a region of the
circuit wafer, e.g., recesses that will cover respective sensors,
circuits, etc. For example, referring to FIG. 2A, the rectangular
regions on the upper surface in FIG. 2A may face inward, i.e., face
the respective sensors, circuits, etc., when the lid wafer is
combined with a circuit wafer in a WLP.
[0040] FIG. 2A illustrates cutaway view of bonding of a lid wafer
and circuit wafer. FIG. 2B illustrates a magnified portion of FIG.
2A.
[0041] Referring to FIGS. 2A and 2B, and operation o100 in FIG. 11,
the lid wafer may be bonded to a circuit wafer. The circuit wafer
may include a plurality of sensors. The circuit wafer may be, e.g.,
a microbolometer circuit wafer.
[0042] FIG. 3A illustrates a cutaway view of a dicing tape mounted
on the circuit wafer and laser scribing of the lid wafer. FIG. 3B
illustrates a magnified portion of FIG. 3A.
[0043] Referring to FIGS. 3A and 3B, and operation o200 in FIG. 11,
a dicing tape may be mounted on the circuit wafer of the stacked
wafers. A laser scribing operation may be performed to scribe the
lid wafer (operation o300 in FIG. 11). For example, the lid wafer
may be a silicon wafer, and a laser may be focused inside the
silicon wafer to scribe the wafer. The laser may be, e.g., a near
IR wavelength laser. The laser scribing operation may be stealth
laser scribing or stealth dicing. The stealth dicing may be
performed using a method as described in U.S. Pat. No. 8,268,704,
which is incorporated by reference herein. Scribe lines formed by
stealth dicing may be cracks, which may later be expanded in a
dicing tape expansion operation. In an implementation, laser
scribing of the lid wafer scribes the lid wafer without scribing
the circuit wafer.
[0044] FIG. 4 illustrates a cutaway view of remounting a dicing
tape on the scribed lid wafer and laser scribing of the circuit
wafer. FIG. 5 illustrates a cutaway view of expansion of the dicing
tape to separate dies.
[0045] Referring to FIGS. 4 and 5, the dicing tape may be removed
from the circuit wafer (operation o400 in FIG. 11) and dicing tape
may be attached to the lid wafer (operation o500 in FIG. 11). A
laser scribing operation may then be performed to scribe the
circuit wafer (operation o600 in FIG. 11). The laser scribing
operation on the circuit wafer. In the present example embodiment,
as illustrated in greater detail in FIG. 5, the laser scribing
operation on the circuit wafer is aligned with packages
corresponding to the laser scribing operation on the lid wafer. In
an implementation, laser scribing may consist of two aligned
back-to-front laser scribes. In an implementation, laser scribing
of the lid wafer scribes the lid wafer without scribing the circuit
wafer. In an implementation, scribed lines on the lid wafer may be
offset from scribed lines on the circuit wafer. For example, in the
singulated package, the lid section of the lid wafer may have
different length and/or width dimensions (in plan view) as compared
to the corresponding circuit section of the circuit wafer. In an
implementation, two passes of the laser scribe may be made on the
lid side of the stack such that residual pieces of the lid wafer
remain between the lid sections. In an implementation, the lid
section of the singulated package may have a shorter length and/or
width than the attached circuit section such that a surface of the
circuit section facing in the lid direction may be exposed. The
exposed surface of the circuit section may have bond pads
thereon.
[0046] Following the laser scribing operation on the circuit wafer,
the dicing tape on the lid wafer may be expanded (indicated by
arrows in FIG. 5) (operation o700 in FIG. 11). A single expansion
may be performed to simultaneously singulate both the lid and
circuit substrates of WLP wafer stack, separating the WLP into
individual packaged dies.
[0047] FIG. 6 illustrates a cutaway view of an example of an
expanded WLP following singulation. FIG. 7A illustrates a cutaway
view of an example of an individual package following
singulation.
[0048] Referring to FIG. 6, the lid section of the lid wafer is
formed with a different width dimension as compared to the
corresponding circuit section of the circuit wafer. Also, two
passes of the laser scribe on the lid side of the stack form lid
residual pieces between the lid sections. In the example shown in
FIG. 7A, the lid wafer is formed with different length and width
dimensions as compared to the corresponding circuit section of the
circuit wafer
[0049] As described above, a wafer stack of a WLP may be singulated
into individual packaged dies without the use of a saw (dicing
blade). The stealth dicing process may provide a die having an edge
that shows lines or ridges in unique structure, the lines or ridges
having a pitch related to the number of laser passes (see the
laterally extending ridges in FIGS. 7A and 7B). These lines or
ridges are detectable and easily distinguishable from, e.g., Bosch
etch scallops or ground surface finish created by saw dicing.
[0050] According to another example embodiment, an individual
packaged die may have a lid (or cap) having one or more relieved
walls. In an implementation, one or more walls of the lid may be
relieved by forming the wall at an angle or taper, such that the
wall slopes toward the center of the package, away from the exposed
bond pads.
[0051] In an example embodiment, a lid pattern in a lid wafer for a
WLP may be formed such that one or more sidewalls of each of the
respective lids in the lid pattern is angled relative to major
surfaces of the lid wafer.
[0052] In an implementation, a beveled dicing blade (or beveled
kerf saw) may be used to form a lid pattern in which one or more
sidewalls of each of the respective lids is angled.
[0053] FIG. 8 illustrates a singulated package having a lid with
straight edges. FIG. 9 illustrates a singulated package having a
lid with relieved edges.
[0054] The package illustrated in FIG. 8 has a lid with straight
edges, i.e., edges that are vertical to or normal to the major
surface of the circuit die. The size of the lid is smaller than the
corresponding circuit die such that the bond pads are exposed by
the lid. When capillary bonding is used to connect the bond pads,
the size of the lid is reduced in order to provide an exposed bond
pad area sufficient for the capillary bonding operation. Thus, this
structure may have a substantial space or margin between the bond
pads and the edge of the cap in order to provide free access of the
wire bonding capillary.
[0055] The package illustrated in FIG. 9 has a lid with relieved
edges, here, angled edges such that the lid has a pyramidal shape.
The angled edges may provide sufficient relief at the top of the
lid for the capillary bonding operation to take place, while at the
same time covering more of the circuit die. The angle (as
determined relative to the exposed surface of the circuit wafer)
may be greater than 0 and less than 90 degrees, e.g., about 15
degrees, about 30 degrees, about 45 degrees, or about 60 degrees.
In the package in which the lid edges are relieved, the area of the
circuit die enclosed by the lid may be larger, relative to the
straight-walled package (having 90 degree walls relative to the
exposed surface of the circuit wafer) illustrated in FIG. 8. The
circuit die exposed beyond the lid may form a planar area on at
least one side of the lid. For example, a planar area of the
circuit die may be exposed on four sides of a pyramidal lid.
[0056] In an embodiment, the package illustrated in FIG. 9 may be
formed using a beveled dicing blade on the lid wafer of a wafer
stack in a WLP, such that the bevel of the dicing blade forms the
angled edges of the lid.
[0057] As described above, a singulated package may have a lid with
tapered walls. The walls may have a taper angle that is larger than
the one of the wire bonding capillary. The tapered walls may allow
for reducing the spatial margin between the bond pads and the edge
of the cap provided for wirebonding.
[0058] FIG. 10 illustrates an enlarged cutaway view of a lid wafer
with an etched lids pattern and beveled kerfs.
[0059] In an implementation, stealth dicing as described above in
connection with FIGS. 1A-7 may be combined with the use of a
beveled dicing blade as described above in connection with FIG. 9.
For example, referring to FIG. 10, the beveled dicing blade may be
used to partially form the lid sidewalls, i.e., form an angled
region of the lid sidewalls. Subsequently, stealth dicing may be
used to singulate the packages from the WLP, the stealth dicing of
the lid wafer forming the remaining portion of the lid
sidewalls.
[0060] Further, to eliminate the requirement for a beveled dicing
blade, the lid sidewall can be angled by re-programming the stealth
dicing system to locate the laser-induced defects along an angled
plane within the silicon, as shown in FIG. 12. This manner of
stealth dicing angled planes within the silicon is may be used to
singulate the lid wafer in a single process step while providing
adequate space for wirebonding.
[0061] Example embodiments have been disclosed herein, and although
specific terms are employed, they are used and are to be
interpreted in a generic and descriptive sense only and not for
purpose of limitation. In some instances, as would be apparent to
one of ordinary skill in the art as of the filing of the present
application, features, characteristics, and/or elements described
in connection with a particular embodiment may be used singly or in
combination with features, characteristics, and/or elements
described in connection with other embodiments unless otherwise
specifically indicated. Accordingly, it will be understood by those
of skill in the art that various changes in form and details may be
made without departing from the spirit and scope of the present
invention as set forth in the following claims.
* * * * *