U.S. patent application number 13/750374 was filed with the patent office on 2014-07-31 for method for implementing deep trench enabled high current capable bipolar transistor for current switching and output driver applications.
This patent application is currently assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION. The applicant listed for this patent is INTERNATIONAL BUSINESS MACHINES CORPORATION. Invention is credited to David H. Allen, Douglas M. Dewanz, David P. Paulsen, John E. Sheets, II.
Application Number | 20140210051 13/750374 |
Document ID | / |
Family ID | 51222021 |
Filed Date | 2014-07-31 |
United States Patent
Application |
20140210051 |
Kind Code |
A1 |
Allen; David H. ; et
al. |
July 31, 2014 |
METHOD FOR IMPLEMENTING DEEP TRENCH ENABLED HIGH CURRENT CAPABLE
BIPOLAR TRANSISTOR FOR CURRENT SWITCHING AND OUTPUT DRIVER
APPLICATIONS
Abstract
A method and structures are provided for implementing deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications. A deep oxygen implant is
provided in a selected region of substrate. A first deep trench and
second deep trench are formed above the deep oxygen implant. The
first deep trench is a generally large rectangular box deep trench
of minimum width and the second deep trench is a second small area
deep trench centered within the first rectangular box deep trench.
Ion implantation at relatively high ion pressure and annealing is
utilized to form highly doped N+ regions or P+ regions both inside
and outside the outside the first deep trench and around the
outside the second deep trench region. These regions provide the
collector and emitter respectively, and the existing substrate
region provides the base region between the collector and emitter
regions.
Inventors: |
Allen; David H.; (Rochester,
MN) ; Dewanz; Douglas M.; (Rochester, MN) ;
Paulsen; David P.; (Dodge Center, MN) ; Sheets, II;
John E.; (Zumbrota, MN) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
Armonk |
NY |
US |
|
|
Assignee: |
INTERNATIONAL BUSINESS MACHINES
CORPORATION
Armonk
NY
|
Family ID: |
51222021 |
Appl. No.: |
13/750374 |
Filed: |
January 25, 2013 |
Current U.S.
Class: |
257/565 ;
438/369 |
Current CPC
Class: |
H01L 21/76243 20130101;
H01L 29/6625 20130101; H01L 29/735 20130101; H01L 29/73 20130101;
H01L 29/66234 20130101; H01L 29/0692 20130101; H01L 29/41708
20130101 |
Class at
Publication: |
257/565 ;
438/369 |
International
Class: |
H01L 29/66 20060101
H01L029/66; H01L 29/73 20060101 H01L029/73 |
Claims
1. A method for implementing a deep trench enabled high current
capable bipolar transistor comprising: providing a deep oxygen
implant in a selected region of a substrate; forming a first deep
trench and a second deep trench above the deep oxygen implant; said
first deep trench being a generally large rectangular box deep
trench of minimum width and said second deep trench being a second
small area deep trench centered within the first rectangular box
deep trench; providing highly doped regions both inside and outside
of the first deep trench and around an outside of the second deep
trench; providing a collector and an emitter respectively with said
highly doped regions, and provides a base region with a substrate
region between said collector and said emitter regions.
2. The method as recited in claim 1 wherein providing a deep oxygen
implant in a selected region of a substrate includes providing a
blocking photo-resist layer and providing said deep oxygen
implant.
3. The method as recited in claim 2 includes creating a SiO2 layer
at a depth in a range of approximately 2-5 micrometers (.mu.m).
4. The method as recited in claim 1 wherein providing a deep oxygen
implant includes creating an etch stop for said first deep trench
and said second deep trench.
5. The method as recited in claim 1 includes creating a current
density optimized bipolar transistor, and selectively providing
current sourcing capability for the deep trench enabled high
current capable bipolar transistor.
6. The method as recited in claim 1 includes providing a P-doped
substrate and providing highly doped N+ regions for creating an NPN
current density optimized bipolar transistor.
7. The method as recited in claim 6 includes selectively providing
a base region width providing a collector-base interface area and
selectively providing a deep trench depth providing a
collector-emitter depth for a predefined collector current sourcing
capability.
8. The method as recited in claim 1 includes providing a N-doped
substrate and providing highly doped P+ regions for creating an PNP
current density optimized bipolar transistor.
9. The method as recited in claim 8 includes selectively providing
a base region width providing a collector-base interface area and
selectively providing a deep trench depth providing a
collector-emitter depth for a predefined collector current sourcing
capability.
10. The method as recited in claim 1 wherein providing said highly
doped regions includes patterning a blocking photo-resist layer and
providing an ion implantation at relatively high ion pressure to
incorporate dopants on exposed surfaces of the first deep trench
and the second deep trench.
11. The method as recited in claim 10 includes annealing the
dopants to render highly doped regions both inside and outside the
outside the first deep trench and around the outside the second
deep trench.
12. The method as recited in claim 11 further includes filling the
first deep trench and the second deep trench with a selected
conductive fill.
13. The method as recited in claim 13 includes forming a base
contact, a collector contact, and an emitter contact.
14. The method as recited in claim 13 includes performing high
concentration implants for providing low resistance contacts.
15. A structure for implementing a deep trench enabled high current
capable bipolar transistor comprising: a deep oxygen implant in a
selected region of a substrate; a first deep trench and a second
deep trench above the deep oxygen implant; said first deep trench
being a generally large rectangular box deep trench of minimum
width and said second deep trench being a second small area deep
trench centered within the first rectangular box deep trench;
highly doped regions both inside and outside of said first deep
trench and around an outside of said second deep trench and said
first deep trench and said second deep trench including a selected
conductive fill respectively defining a collector region and an
emitter region, and a base region defined by a substrate region
between said collector and said emitter regions.
16. The structure as recited in claim 15 wherein said deep oxygen
implant includes a SiO2 layer at a depth in a range of
approximately 2-5 micrometers (.mu.m); and wherein said collector
region and said emitter region include a depth in a range of
approximately 2-5 micrometers (.mu.m).
17. The structure as recited in claim 15 includes a base contact, a
collector contact, and an emitter contact, each contact including a
respective high concentration implant for providing low resistance
contacts.
18. The structure as recited in claim 15 wherein the deep trench
enabled high current capable bipolar transistor includes a current
density optimized bipolar transistor, including a selected
collector-base interface area and a selected collector/emitter
depth to provide a predefined collector current sourcing
capability.
19. The structure as recited in claim 15 wherein said substrate
includes a P-doped substrate and said highly doped regions include
highly doped N+ regions for creating an NPN current density
optimized bipolar transistor.
20. The structure as recited in claim 15 wherein said substrate
includes a N-doped substrate and said highly doped regions include
highly doped P+ regions for creating a PNP current density
optimized bipolar transistor.
Description
FIELD OF THE INVENTION
[0001] The present invention relates generally to the data
processing field, and more particularly, relates to a method and
structures for implementing deep trench enabled high current
capable bipolar transistor for current switching and output driver
applications.
DESCRIPTION OF THE RELATED ART
[0002] As integrated circuit logic circuit geometries continue to
shrink, unfortunately a few structures continue to require a large
area. Specifically, this invention targets power gating
applications where extremely large area field effect transistors
(FETs) are generally used to enable/disable power delivery and
similarly extremely large area FETs are generally used in off chip
output driver applications.
[0003] Electrostatic discharge circuits are taking ever larger
subsets of the semiconductor die area. The power gating structures
are area intensive, generally occupying 2% of the total area of the
functional unit being power gated. The power gating FETs also have
significant IR drop implications on the power rail supporting the
function being power gated, typically on the order of 2% IR drop
when one spends 2% of the total area on power gating.
[0004] A need exists for an effective mechanism and method of
fabricating an enhanced transistor for current switching and output
driver applications.
SUMMARY OF THE INVENTION
[0005] Principal aspects of the present invention are to provide a
method and structures for implementing deep trench enabled high
current capable bipolar transistor for current switching and output
driver applications. Other important aspects of the present
invention are to provide such method and structures substantially
without negative effects and that overcome many of the
disadvantages of prior art arrangements.
[0006] In brief, a method and structures are provided for
implementing deep trench enabled high current capable bipolar
transistor for current switching and output driver applications. A
deep oxygen implant is provided in a selected region of substrate.
A first deep trench and second deep trench are formed above the
deep oxygen implant. The first deep trench is a generally large
rectangular box deep trench of minimum width and the second deep
trench is a second small area deep trench centered within the first
rectangular box deep trench. Ion implantation at relatively high
ion pressure is utilized to incorporate N+ dopants or P+ dopants on
the exposed surfaces of each of the first deep trench and second
deep trench. Subsequent annealing renders highly doped N+ regions
or P+ regions both inside and outside the outside the first deep
trench and around the outside the second deep trench region. These
N+ regions or P+ regions provide the collector and emitter
respectively, and the existing substrate region provides the base
region between the collector and emitter regions.
[0007] In accordance with features of the invention, the bipolar
transistor is current density optimized rather than being beta or
gain optimized.
[0008] In accordance with features of the invention, forming a base
contact, a collector contact, and an emitter contact includes high
concentration implants for providing low resistance contacts.
[0009] In accordance with features of the invention, the deep
oxygen implant forms an implanted silicon dioxide layer, which
provides an etch stop for the deep trench etches.
[0010] In accordance with features of the invention, the deep
oxygen implant includes a depth in a range of approximately 2-5
micrometers (.mu.m).
[0011] In accordance with features of the invention, the first deep
trench is a generally large rectangular box deep trench, for
example, on the order of 1.0 .mu.m on a side.
[0012] In accordance with features of the invention, collector
current density is provided by using a base region width optimized
for current density.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The present invention together with the above and other
objects and advantages may best be understood from the following
detailed description of the preferred embodiments of the invention
illustrated in the drawings, wherein:
[0014] FIG. 1 is a schematic side plan view not to scale
illustrating example processing steps for implementing a deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications in accordance with the
preferred embodiment;
[0015] FIG. 2 is a schematic top plan view not to scale
illustrating example processing steps for implementing the deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications in accordance with the
preferred embodiment;
[0016] FIG. 3 is a schematic side plan view not to scale
illustrating example processing steps for implementing a deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications in accordance with the
preferred embodiment;
[0017] FIG. 4 is a schematic top plan view not to scale
illustrating example processing steps for implementing the deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications in accordance with the
preferred embodiment;
[0018] FIG. 5 is a schematic side plan view not to scale
illustrating the deep trench enabled high current capable bipolar
transistor for current switching and output driver applications
with a final device schematic overlay in accordance with the
preferred embodiment; and
[0019] FIG. 6 is a flow chart illustrating exemplary processing
steps for fabricating a deep trench enabled high current capable
bipolar transistor for current switching and output driver
applications in accordance with the preferred embodiment.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0020] In the following detailed description of embodiments of the
invention, reference is made to the accompanying drawings, which
illustrate example embodiments by which the invention may be
practiced. It is to be understood that other embodiments may be
utilized and structural changes may be made without departing from
the scope of the invention.
[0021] The terminology used herein is for the purpose of describing
particular embodiments only and is not intended to be limiting of
the invention. As used herein, the singular forms "a", "an" and
"the" are intended to include the plural forms as well, unless the
context clearly indicates otherwise. It will be further understood
that the terms "comprises" and/or "comprising," when used in this
specification, specify the presence of stated features, integers,
steps, operations, elements, and/or components, but do not preclude
the presence or addition of one or more other features, integers,
steps, operations, elements, components, and/or groups thereof.
[0022] In accordance with features of the invention, a method and
structures are provided for implementing deep trench enabled high
current capable NPN or PNP bipolar transistor for current switching
and output driver applications.
[0023] Referring now to FIG. 1, there is schematically shown
example processing steps generally designated by the reference
character 100 for implementing a deep trench enabled high current
capable bipolar transistor for current switching and output driver
applications in accordance with the preferred embodiment. The deep
trench enabled high current capable bipolar transistor is current
density optimized rather than being beta or gain optimized.
[0024] In FIG. 1, in first processing steps 100, a semiconductor
substrate 102 formed of a suitable material such as a silicon
substrate 102 includes suitable doping, such as P-doped substrate
102 provided for fabricating a deep trench enabled high current
capable NPN bipolar transistor. Alternatively, a substrate that is
N-doped is provided for the substrate 102 for fabricating a deep
trench enabled high current capable PNP bipolar transistor.
[0025] As shown in FIG. 1, an oxygen implant or O2 implant 104
through an O2 blocking layer or photo-resist 106 providing a deep
oxygen implant 108 in a selected region of substrate 102 at a
desired depth. A high O2 implant dose is assumed thereby creating a
definitive SiO2 layer 108, for example, as deep as possible, such
as .about.2-5 .mu.m, with considerations including silicon damage,
implant dose, and the like.
[0026] FIG. 2 illustrates example processing steps generally
designated by the reference character 200 for implementing the deep
trench enabled high current capable bipolar transistor for current
switching and output driver applications in accordance with the
preferred embodiment. The processing steps 200 include patterning
and etching steps 202 providing a first deep trench 204 and a
second deep trench 206 formed above the deep oxygen implant 108 in
FIG. 1. The implanted silicon dioxide layer 108 provides an etch
stop for the deep trench etches 204, 206. The first deep trench 204
is a generally large, for example, on the order of 1.0 .mu.m on a
side, rectangular box deep trench of minimum width. The second deep
trench 206 is a second small area deep trench centered within the
first rectangular box deep trench 204. One can visualize this
structure of trenches 204, 206 as a large picture frame surrounding
a dot in the center of the framed image.
[0027] Referring now to FIG. 3, there are shown example next
processing steps generally designated by the reference character
300 for implementing a deep trench enabled high current capable
bipolar transistor for current switching and output driver
applications in accordance with the preferred embodiment. N+ ion
implant and anneal steps 302 for fabricating a deep trench enabled
high current capable NPN bipolar transistor include ion
implantation at relatively high ion pressure that is utilized to
incorporate N+ dopants on the exposed surfaces of each of the first
deep trench and second deep trench through a patterned implant
blocking layer or photo-resist 304. Subsequent annealing renders
highly doped N+ regions 306 both inside and outside the first deep
trench 204 and around the outside the second deep trench region
206. Alternatively for PNP bipolar transistor, P+ ion implant and
anneal steps 302 form highly doped P+ regions 306 both inside and
outside the first deep trench 204 and around the outside the second
deep trench region 206 for fabricating a deep trench enabled high
current capable PNP bipolar transistor.
[0028] These N+ regions 306 or P+ regions 306 provide the collector
and emitter respectively, and the existing substrate region
provides the base region between the collector and emitter regions,
as illustrated in FIGS. 4 and 5. For example, assuming a fairly
wide base region, with a beta of around 20, current densities
around 100 mA per .mu.m.sup.2 of collector are enabled. With 0.9
.mu.m on each of the 3 sides of the collector at the collector-base
interface and a collector/emitter depth of 3 .mu.m one has 2.7
.mu.m*3 .mu.m of collector surface or 8.1 .mu.m.sup.2, or
conservatively 800 mA of current sourcing capability.
[0029] In accordance with features of the invention, the deep
trench enabled high current capable bipolar transistor of the
invention provides improvements over conventional FETs for high
current applications. A FET on the order of 1 mm of device width is
required to source 800 mA of current. Drawing gates on a contacted
pitch the planar FET would requires hundreds of square microns of
surface to support that potential 800 mA power gated circuit
load.
[0030] Referring now to FIG. 4, there are shown example next
processing steps generally designated by the reference character
400 for implementing the deep trench enabled high current capable
bipolar transistor for current switching and output driver
applications in accordance with the preferred embodiment.
Processing steps 402 include filling trenches 204, 206 with
polysilicon or other suitable conductive fill 404, performing high
concentration implants for low-resistance (low-R) contacts, and
making a base contact 410, a collector contact 412, and an emitter
contact 414. For example, desired concentrations include
.about.1e21/cm.sup.3 for the emitter, 1e17.sup.3 base and
1e15/cm.sup.3 for the collector to base junction, 1e19/cm.sup.3 for
the collector contact region.
[0031] FIG. 5 illustrates a final device schematic overlay for the
example deep trench enabled high current capable bipolar transistor
generally designated by the reference character 500 for current
switching and output driver applications in accordance with the
preferred embodiment. The collector contact 412, and the emitter
contact 414 are shown with respective N+ regions 306 and conductive
fill 404 and the base contact 410 is provided by the substrate P
region between the collector and emitter N+ regions 306.
[0032] Referring now to FIG. 6, a flowchart illustrates exemplary
processing steps generally designated by the reference character
600 for fabricating a deep trench enabled high current capable
bipolar transistor for current switching and output driver
applications in accordance with the preferred embodiment.
[0033] As indicated in a block 602, a base substrate is provided
with p-doping for fabricating a deep trench NPN bipolar transistor
for current switching and output driver applications.
Alternatively, the base substrate is provided with n-doping for
fabricating a deep trench PNP bipolar transistor for current
switching and output driver applications at block 602. As indicated
in a block 604, a deep oxygen implant is performed in a selected
region of substrate, creating a definitive SiO2 layer 108.
Patterning and etching define a first deep trench 204 and a second
deep trench 206 that are formed above the deep oxygen implant 108
with the first deep trench being a generally large rectangular box
deep trench of minimum width and the second deep trench being a
second small area deep trench centered within the first rectangular
box deep trench as indicated in a block 606.
[0034] Next as indicated in a block 608, an ion implant at
relatively high ion pressure is utilized to incorporate N+ dopants
or P+ dopants on the exposed surfaces of each of the first deep
trench and second deep trench and subsequent annealing renders
highly doped N+ regions or highly doped P+ regions both inside and
outside the outside the first deep trench 204 and around the
outside the second deep trench region 206. The N+ regions or P+
regions formed at block 608, provide the collector and emitter
respectively, and the existing substrate region provides the base
region between the collector and emitter regions.
[0035] As indicated in a block 610, the trenches 204, 206 are
filled with polysilicon or other conductive fill, high
concentration implants are provided for low resistance contacts,
with a P+ implantation to allow a low resistance base contact for
the NPN bipolar transistor or an N+ implantation to allow a low
resistance base contact for the PNP bipolar transistor, and a base
contact 410, a collector contact 412, and an emitter contact 414
are formed.
[0036] While the present invention has been described with
reference to the details of the embodiments of the invention shown
in the drawing, these details are not intended to limit the scope
of the invention as claimed in the appended claims.
* * * * *