Dewanz; Douglas M

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dewanz; Douglas M.The latest application filed is for "signal transmission reducing coupling caused delay variation".

Company Profile

0.16.16

Dewanz; Douglas M - Rochester MN
Dewanz; Douglas M. - Rochester MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multiple-patterned semiconductor device channels Grant 9,252,100 - Allen , et al. February 2, 2	2016-02-02
Multiple-patterned semiconductor device channels Grant 9,111,935 - Allen , et al. August 18, 2	2015-08-18
Semiconductor device channels Grant 9,105,639 - Allen , et al. August 11, 2	2015-08-11
Signal path and method of manufacturing a multiple-patterned semiconductor device Grant 9,099,462 - Allen , et al. August 4, 2	2015-08-04
Semiconductor device with distinct multiple-patterned conductive tracks on a same level Grant 9,099,533 - Allen , et al. August 4, 2	2015-08-04
Semiconductor device channels Grant 9,099,471 - Allen , et al. August 4, 2	2015-08-04
Signal path and method of manufacturing a multiple-patterned semiconductor device Grant 9,093,451 - Allen , et al. July 28, 2	2015-07-28
Method of making semiconductor device with distinct multiple-patterned conductive tracks on a same level Grant 9,087,879 - Allen , et al. July 21, 2	2015-07-21
Signal path of a multiple-patterned semiconductor device Grant 9,082,624 - Allen , et al. July 14, 2	2015-07-14
Semiconductor device channels Grant 9,076,848 - Allen , et al. July 7, 2	2015-07-07
Semiconductor device channels Grant 9,070,751 - Allen , et al. June 30, 2	2015-06-30
Signal Transmission Reducing Coupling Caused Delay Variation App 20150127879 - Allen; David H. ; et al.	2015-05-07
Signal path of a multiple-patterned semiconductor device Grant 9,021,407 - Allen , et al. April 28, 2	2015-04-28
Multiple-patterned Semiconductor Device App 20150008585 - Allen; David H. ; et al.	2015-01-08
Multiple-patterned Semiconductor Device App 20150011023 - Allen; David H. ; et al.	2015-01-08
Signal path and method of manufacturing a multiple-patterned semiconductor device Grant 8,866,306 - Allen , et al. October 21, 2	2014-10-21
Multiple-patterned Semiconductor Device Channels App 20140273444 - Allen; David H. ; et al.	2014-09-18
Semiconductor Device Channels App 20140273440 - Allen; David H. ; et al.	2014-09-18
Semiconductor Device Channels App 20140273439 - Allen; David H. ; et al.	2014-09-18
Multiple-patterned Semiconductor Device Channels App 20140264943 - Allen; David H. ; et al.	2014-09-18
Semiconductor Device Channels App 20140264889 - Allen; David H. ; et al.	2014-09-18
Semiconductor Device Channels App 20140264942 - Allen; David H. ; et al.	2014-09-18
Method for implementing deep trench enabled high current capable bipolar transistor for current switching and output driver applications Grant 8,809,156 - Allen , et al. August 19, 2	2014-08-19
Method For Implementing Deep Trench Enabled High Current Capable Bipolar Transistor For Current Switching And Output Driver Applications App 20140210051 - Allen; David H. ; et al.	2014-07-31
Signal Path Of A Multiple-patterned Semiconductor Device App 20140184320 - Allen; David H. ; et al.	2014-07-03
Signal Path And Method Of Manufacturing A Multiple-patterned Semiconductor Device App 20140183659 - Allen; David H. ; et al.	2014-07-03
Signal Path Of A Multiple-patterned Semiconductor Device App 20140184321 - Allen; David H. ; et al.	2014-07-03
Signal Path And Method Of Manufacturing A Multiple-patterned Semiconductor Device App 20140183603 - Allen; David H. ; et al.	2014-07-03
Signal Path And Method Of Manufacturing A Multiple-patterned Semiconductor Device App 20140189615 - Allen; David H. ; et al.	2014-07-03
Bias temperature instability-influenced storage cell Grant 8,107,309 - Dewanz , et al. January 31, 2	2012-01-31
Bias Temperature Instability-Influenced Storage Cell App 20110013445 - Dewanz; Douglas M. ; et al.	2011-01-20
Macro structural arrangement and method for generating macros for VLSI semiconductor circuit devices Grant 4,849,904 - Aipperspach , et al. July 18, 1	1989-07-18

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