U.S. patent application number 13/014931 was filed with the patent office on 2011-07-28 for plating method and plating apparatus.
Invention is credited to Masanori Hayase, Fumio Kuriyama, Masashi SHIMOYAMA.
Application Number | 20110180412 13/014931 |
Document ID | / |
Family ID | 44308137 |
Filed Date | 2011-07-28 |
United States Patent
Application |
20110180412 |
Kind Code |
A1 |
SHIMOYAMA; Masashi ; et
al. |
July 28, 2011 |
PLATING METHOD AND PLATING APPARATUS
Abstract
A plating method can fill a plated metal into interconnect
recesses at a higher rate without forming voids in the plated metal
embedded in the interconnect recesses. The plating method includes:
preparing a substrate having interconnect recesses in a surface;
carrying out first pretreatment of the substrate by immersing the
substrate in a first pretreatment solution containing an
accelerator, a metal ion and an acid; carrying out second
pretreatment of the substrate by immersing the substrate in a
second pretreatment solution containing an additive which inhibits
the effect of the accelerator contained in the first pretreatment
solution, and not containing an accelerator; and then carrying out
electroplating of the substrate surface by using a plating solution
containing at least a metal ion, an acid and a suppressor, and not
containing an accelerator, thereby filling the plated metal into
the interconnect recesses.
Inventors: |
SHIMOYAMA; Masashi; (Tokyo,
JP) ; Kuriyama; Fumio; (Tokyo, JP) ; Hayase;
Masanori; (Tokyo, JP) |
Family ID: |
44308137 |
Appl. No.: |
13/014931 |
Filed: |
January 27, 2011 |
Current U.S.
Class: |
205/118 ;
204/242 |
Current CPC
Class: |
C25D 17/001 20130101;
H01L 21/76877 20130101; C25D 3/38 20130101; C25D 5/02 20130101;
C25D 5/08 20130101; C25D 21/10 20130101; C25D 5/022 20130101; C25D
5/10 20130101; C25D 5/00 20130101; H01L 21/2885 20130101 |
Class at
Publication: |
205/118 ;
204/242 |
International
Class: |
C25D 5/02 20060101
C25D005/02; C25B 9/00 20060101 C25B009/00 |
Foreign Application Data
Date |
Code |
Application Number |
Jan 27, 2010 |
JP |
2010-015139 |
Claims
1. A plating method comprising: preparing a substrate having
interconnect recesses in a surface; carrying out first pretreatment
of the substrate by immersing the substrate in a first pretreatment
solution containing an accelerator, a metal ion and an acid;
carrying out second pretreatment of the substrate by immersing the
substrate in a second pretreatment solution containing an additive
which inhibits the effect of the accelerator contained in the first
pretreatment solution, and not containing an accelerator; and then
carrying out electroplating of the surface of the substrate by
using a plating solution containing at least a metal ion, an acid
and a suppressor, and not containing an accelerator, thereby
filling the plated metal into the interconnect recesses.
2. The plating method according to claim 1, wherein the first
pretreatment is a preliminary electrolytic treatment carried out by
electrolytically treating the surface of the substrate while
immersing the substrate in the first pretreatment solution.
3. The plating method according to claim 2, wherein the preliminary
electrolytic treatment is carried out at a current density of 50 to
250 A/m.sup.2.
4. The plating method according to claim 1, wherein a sulfur
compound is used as the accelerator contained in the first
pretreatment solution.
5. The plating method according to claim 4, wherein the
concentration of the accelerator contained in the first
pretreatment solution is 5 to 500 .mu.M/L.
6. The plating method according to claim 1, wherein the additive
contained in the second pretreatment solution and which inhibits
the effect of the accelerator contained in the first pretreatment
solution is a leveler.
7. The plating method according to claim 6, wherein the leveler is
an ethyleneimine polymer or a derivative thereof.
8. The plating method according to claim 1, wherein at least one of
the first pretreatment, the second pretreatment and the
electroplating is carried out while stirring the treatment
solution.
9. The plating method according to claim 1, wherein the second
pretreatment is carried out while stirring the second pretreatment
solution, and the electroplating is carried out while stirring the
plating solution with a stirring intensity equal to or higher than
the stirring intensity in the second pretreatment.
10. The plating method according to claim 1, wherein the surface of
the substrate is cleaned with dilute sulfuric acid after the first
pretreatment, and the surface of the substrate is cleaned with
dilute sulfuric acid after the second pretreatment.
11. A plating apparatus for carrying out plating of a surface of a
substrate having interconnect recesses in the surface, the plating
apparatus comprising: a first pretreatment unit for carrying out
first pretreatment of the substrate by immersing the substrate in a
first pretreatment solution containing an accelerator, a metal ion
and an acid; a second pretreatment unit for carrying out second
pretreatment of the substrate by immersing the substrate in a
second pretreatment solution containing an additive which inhibits
the effect of the accelerator contained in the first pretreatment
solution, and not containing an accelerator; and a plating unit for
carrying out electroplating of the surface of the substrate after
the second pretreatment by using a plating solution containing at
least a metal ion, an acid and a suppressor, and not containing an
accelerator, thereby filling the plated metal into the interconnect
recesses.
12. The plating apparatus according to claim 11, wherein the first
pretreatment unit is configured to carry out an electrolytic
treatment of the surface of the substrate while immersing the
substrate in the first pretreatment solution.
13. The plating apparatus according to claim 11, further comprising
a first cleaning unit for cleaning with dilute sulfuric acid the
surface of the substrate which has undergone the first pretreatment
in the first pretreatment unit, and a second cleaning unit for
cleaning with dilute sulfuric acid the surface of the substrate
which has undergone the second pretreatment in the second
pretreatment unit.
14. The plating apparatus according to claim 11, wherein at least
one of the first pretreatment unit, the second pretreatment unit
and the plating unit is provided with a stirring device for
stirring the treatment solution, and wherein the plating apparatus
includes a control section for controlling the stirring speed of
the stirring device, the first pretreatment time in the first
pretreatment unit, the second pretreatment time in the second
pretreatment unit, and the electroplating time in the plating
unit.
15. The plating apparatus according to claim 14, wherein the second
pretreatment unit is provided with a stirring device for stirring
the second treatment solution; and the control section, based on
the width or diameter and the depth of the interconnect recesses,
determines the substrate immersion time in the second pretreatment
and the stirring intensity of the second pretreatment solution.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a technique for forming
interconnects in a semiconductor device, and more particularly to a
plating method and a plating apparatus which can fill a plated
metal for interconnects, such as copper, into interconnect recesses
such as trenches and via holes, formed in a surface of a substrate
such as a semiconductor wafer, at a high rate.
[0003] 2. Description of the Related Art
[0004] In order to fill a plated metal for interconnects into
interconnect recesses such as trenches and via holes, formed in a
surface of a substrate such as a semiconductor wafer, at a high
rate, the following points are of importance: suppression of the
deposition rate of the plated metal in a surface of a field area of
the substrate; and promotion of the deposition rate of the plated
metal in the bottoms of the interconnect recesses. It is therefore
common practice to use three types of additives, an accelerator for
accelerating the deposition of a plated metal, a suppressor for
suppressing the deposition of the plated metal, and a leveler
(leveling agent), in a plating solution for use in recess-filling
plating.
[0005] When plating of a substrate is carried out by using a
plating solution containing a leveler which, while being consumed,
suppresses the deposition of a plated metal, the plated metal
deposition-suppressing effect differs depending on a thickness of a
diffusion layer formed in the vicinity of a surface of the
substrate. In this case, when the plating is carried out while
stirring the plating solution, the deposition of the plated metal
is significantly suppressed in a surface of a field area of the
substrate where the plating solution flows at a fast speed, whereas
because of insufficient supply of the leveler, the deposition of
the plated metal is not suppressed in bottoms of interconnect
recesses where the plating solution flows at a slow speed. Thus, by
carrying out the plating while stirring the plating solution, it
becomes possible to fill the plated metal into the interconnect
recesses from the bottoms at a high rate while fully maintaining
the plated metal deposition-accelerating effect of an accelerator
in the interconnect recesses, and preventing blocking of the
openings of the interconnect recesses due to the deposition of the
plated metal in the vicinities of the openings.
[0006] When filling of a plated metal into interconnect recesses is
performed by utilizing the synergistic effect of the
above-described additives present in a plating solution, a
repetition of plating operations can cause an alteration of an
additive(s), leading to an unstable process. Especially when a long
plating time is necessary for one wafer as in plating to fill a
plated metal into through-silicon via holes, a large amount of an
additive(s) will be consumed during plating of one wafer. This can
cause a quality change of the plating solution after processing of
several wafers, resulting in poor filling of the plated metal.
[0007] A method is therefore conceivable in which an accelerator,
one of the above-described common additives, is allowed to adsorb
only onto surfaces of interconnect recesses in advance, and
thereafter plating is carried out by using a plating solution, such
as a copper sulfate plating solution, containing only a suppressor
as an additive. This method is expected to suppress the deposition
of a plated metal in a surface of a field area of a substrate by
the effect of the suppressor while accelerating the deposition of
the plated metal from the bottoms of the interconnect recesses by
the effect of the adsorbed accelerator. It is generally impossible
to allow an accelerator to adsorb only onto surfaces of
interconnect recesses by one treatment operation. The applicant has
proposed a method comprising: carrying out first plating of a
substrate surface in a plating solution containing a plating
accelerator; carrying out a plating accelerator removal treatment
by bringing an accelerator remover, capable of removing or reducing
the accelerator, into contact with the substrate surface; and then
carrying out second plating (recess-filling plating) of the
substrate surface (see Japanese Patent Laid-Open Publications No.
2007-262486, patent document 1, and No. 2006-131961, patent
document 2).
[0008] The applicant has also proposed a method which involves
applying a plating suppressing material (plating suppressor) to a
substrate surface except surfaces of interconnect recesses prior to
plating (see Japanese Patent Laid-Open Publications No.
2006-274369, patent document 3, No. 2006-307279, patent document 4,
and No. 2007-9247, patent document 5). Further, a method has been
proposed which comprises after filling a plated metal into
interconnect recesses formed in a substrate surface, removing an
accelerator in surfaces of the interconnect recesses in the
vicinities of their openings, and then forming a plated metal film
in the surface of the field area of the substrate (see Japanese
Patent Laid-Open Publication No. 2003-268590, patent document
6).
SUMMARY OF THE INVENTION
[0009] An accelerator is an additive essential for depositing a
plated metal on surfaces of interconnect recesses in a bottom-up
manner. In the case of interconnect recesses having a high aspect
ratio, it is likely that when an accelerator is adsorbed onto an
entire surface of a substrate, including the surfaces of the
interconnect recesses, the deposition of a plated metal will be
accelerated also in the surfaces of the interconnect recesses in
the vicinities of their openings and the openings will be blocked
with the plated metal before the interconnect recesses are
completely filled with the plated metal that grows in a bottom-up
manner. To solve the problem, the method disclosed in the patent
documents 1 and 2 performs the accelerator removal treatment using
an accelerator remover, e.g., containing a chloride ion, to reduce
or remove an accelerator from a substrate surface by utilizing
competitive adsorption of the chloride ion on the accelerator. This
treatment is preferably carried out while performing reverse
electrolysis. Recess-filling plating is carried out after the
accelerator removal treatment. However, it has been found that
despite the accelerator removal treatment, in some cases, voids are
formed in the plated metal embedded in interconnect recesses
because of insufficient removal (desorption) of accelerator. A
considerably longer plating time will be necessary to prevent the
formation of such voids. In addition, the use of reverse
electrolysis makes the power feeding system of the plating
apparatus complicated.
[0010] The present invention has been made in view of the above
situation. It is therefore an object of the present invention to
provide a plating method and a plating apparatus which can fill a
plated metal into interconnect recesses at a higher rate without
forming voids in the plated metal embedded in the interconnect
recesses.
[0011] In order to achieve the above object, the present invention
provides a plating method comprising: preparing a substrate having
interconnect recesses in a surface; carrying out first pretreatment
of the substrate by immersing the substrate in a first pretreatment
solution containing an accelerator, a metal ion and an acid;
carrying out second pretreatment of the substrate by immersing the
substrate in a second pretreatment solution containing an additive
which inhibits the effect of the accelerator contained in the first
pretreatment solution, and not containing an accelerator; and then
carrying out electroplating of the surface of the substrate by
using a plating solution containing at least a metal ion, an acid
and a suppressor, and not containing an accelerator, thereby
filling the plated metal into the interconnect recesses.
[0012] By thus carrying out the second pretreatment by immersing a
substrate in the second pretreatment solution containing an
additive which inhibits the effect of the accelerator contained in
the first pretreatment solution, and not containing an accelerator,
the accelerator existing in a surface of a field area of the
substrate can be more securely deactivated. It therefore becomes
possible to fill a plated metal into interconnect recesses at a
higher rate without forming voids in the embedded plated metal.
[0013] In a preferred aspect of the present invention, the first
pretreatment is a preliminary electrolytic treatment carried out by
electrolytically treating the surface of the substrate while
immersing the substrate in the first pretreatment solution.
[0014] In the first pretreatment, by immersing the substrate in the
first pretreatment solution containing an accelerator, a metal ion
and an acid, the accelerator is allowed to adsorb onto an entire
surface of the substrate, including surfaces of the interconnect
recesses. This accelerator adsorption process can be stabilized by
electrolytically treating the surface of the substrate.
[0015] The preliminary electrolytic treatment may be carried out at
a current density of 50 to 250 A/m.sup.2.
[0016] A sulfur compound, such as SPS
(bis(3-sulfopropyl)disulfide), may preferably be used as the
accelerator contained in the first pretreatment solution.
[0017] The concentration of the accelerator contained in the first
pretreatment solution may generally be 5 to 500 .mu.M/L, preferably
50 to 500 .mu.M/L.
[0018] The additive contained in the second pretreatment solution
and which inhibits the effect of the accelerator contained in the
first pretreatment solution may be a leveler.
[0019] An ethyleneimine polymer or a derivative thereof, such as
polyethyleneimine (PEI), may preferably be used as the leveler.
[0020] PEI has a high accelerator deactivating effect as a leveler.
Accordingly, by immersing a substrate, onto which an accelerator
has been adsorbed, e.g., in an aqueous sulfuric acid solution
containing PEI, the adsorbed accelerator existing in the surface of
the field area of the substrate can be selectively deactivated.
[0021] Preferably, at least one of the first pretreatment, the
second pretreatment and the electroplating is carried out while
stirring the treatment solution.
[0022] In a preferred aspect of the present invention, the second
pretreatment is carried out while stirring the second pretreatment
solution, and the electroplating is carried out while stirring the
plating solution with a stirring intensity equal to or higher than
the stirring intensity in the second pretreatment.
[0023] In a preferred aspect of the present invention, the surface
of the substrate is cleaned with dilute sulfuric acid after the
first pretreatment, and the surface of the substrate is cleaned
with dilute sulfuric acid after the second pretreatment.
[0024] Compared to the case where the substrate surface is cleaned
with pure water, the process stability and uniformity can be
enhanced by cleaning the substrate surface with dilute sulfuric
acid after the first pretreatment and after the second
pretreatment.
[0025] The present invention also provides a plating apparatus for
carrying out plating of a surface of a substrate having
interconnect recesses in the surface, the plating apparatus
comprising: a first pretreatment unit for carrying out first
pretreatment of the substrate by immersing the substrate in a first
pretreatment solution containing an accelerator, a metal ion and an
acid; a second pretreatment unit for carrying out second
pretreatment of the substrate by immersing the substrate in a
second pretreatment solution containing an additive which inhibits
the effect of the accelerator contained in the first pretreatment
solution, and not containing an accelerator; and a plating unit for
carrying out electroplating of the surface of the substrate after
the second pretreatment by using a plating solution containing at
least a metal ion, an acid and a suppressor, and not containing an
accelerator, thereby filling the plated metal into the interconnect
recesses.
[0026] In a preferred aspect of the present invention, the first
pretreatment unit is configured to carry out an electrolytic
treatment of the surface of the substrate while immersing the
substrate in the first pretreatment solution.
[0027] In a preferred aspect of the present invention, the plating
apparatus further comprises a first cleaning unit for cleaning with
dilute sulfuric acid the surface of the substrate which has
undergone the first pretreatment in the first pretreatment unit,
and a second cleaning unit for cleaning with dilute sulfuric acid
the surface of the substrate which has undergone the second
pretreatment in the second pretreatment unit.
[0028] In a preferred aspect of the present invention, at least one
of the first pretreatment unit, the second pretreatment unit and
the plating unit is provided with a stirring device for stirring
the treatment solution; and the plating apparatus includes a
control section for controlling the stirring speed of the stirring
device, the first pretreatment time in the first pretreatment unit,
the second pretreatment time in the second pretreatment unit, and
the electroplating time in the plating unit.
[0029] In a preferred aspect of the present invention, the second
pretreatment unit is provided with a stirring device for stirring
the second treatment solution; and the control section, based on
the width or diameter and the depth of the interconnect recesses,
determines the substrate immersion time in the second pretreatment
and the stirring intensity of the second pretreatment solution.
[0030] According to the present invention, plating of a surface of
a substrate can be carried out in the presence of an accelerator
which has been adsorbed onto the surface of the substrate and which
is active surfaces of interconnect recesses but has been fully
deactivated in a surface of a field area of the substrate. This
makes it possible to fill a plated metal into the interconnect
recesses at a higher rate without forming voids in the embedded
plated metal.
BRIEF DESCRIPTION OF THE DRAWINGS
[0031] FIG. 1 is an overall plan view of a plating apparatus
according to an embodiment of the present invention;
[0032] FIG. 2 is a schematic view of a first pretreatment unit
provided in the plating apparatus shown in FIG. 1;
[0033] FIG. 3 is a schematic view of a second pretreatment unit
provided in the plating apparatus shown in FIG. 1;
[0034] FIG. 4 is a schematic view of a plating unit provided in the
plating apparatus shown in FIG. 1;
[0035] FIGS. 5A through 5C are diagrams illustrating a sequence of
process steps for filling a plated metal into interconnect recesses
by the plating apparatus shown in FIG. 1;
[0036] FIG. 6 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on preliminary electrolysis conditions in
the first pretreatment;
[0037] FIG. 7 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on the concentration of an accelerator in a
first pretreatment solution in the first pretreatment;
[0038] FIG. 8 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on the concentration of an additive
(leveler) in a second pretreatment solution in the second
pretreatment;
[0039] FIG. 9 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on the chip immersion time in the second
pretreatment;
[0040] FIG. 10 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on plating overvoltage in
electroplating;
[0041] FIG. 11 is a series of cross-sectional photomicrographs of a
test chip after electroplating, showing the results of a
verification experiment on desorption of an accelerator by reverse
electrolysis in a high-concentration chloride ion-containing
solution, conducted as a reference experiment;
[0042] FIG. 12 is a graph showing the relationship between the
rotational speed of a rotational circular plate and a thickness of
a diffusion layer formed over a substrate surface in a copper
sulfate plating solution;
[0043] FIG. 13 is a graph showing the relationship between the
depth from an upper surface of a diffusion layer and the normalized
concentration of a chemical species; and
[0044] FIG. 14 is a graph showing the relationship between the
diameter of a via hole and the intrusion depth of the flow of a
treatment solution into the via hole.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0045] Preferred embodiments of the present invention will now be
described with reference to the drawings. The following description
illustrates an exemplary case in which a substrate W having
interconnect recesses 12, such as trenches and via holes, formed in
a surface and covered with a seed layer 10, as shown in FIG. 5A, is
prepared; and a metal plated film 14 of copper is filled into the
interconnect recesses 12 to form interconnects of copper, as shown
in FIG. 5C.
[0046] FIG. 1 shows an overall plan view of a plating apparatus
according to an embodiment of the present invention. As shown in
FIG. 1, the plating apparatus 20 includes three loading/unloading
sections 22 each for mounting therein a substrate cassette in which
a plurality of substrates W are housed, a first pretreatment unit
24 for carrying out first pretreatment of a substrate W by
immersing the substrate W in a first pretreatment solution
containing an accelerator, a metal ion and an acid, a second
pretreatment unit 26 for carrying out second pretreatment of the
substrate W by immersing the substrate W in a second pretreatment
solution containing an additive which inhibits the effect of the
accelerator contained in the first pretreatment solution, and not
containing an accelerator, and two plating units 28 for carrying
out electroplating of the surface of the substrate W by using a
plating solution containing at least a metal ion, an acid and a
suppressor, and not containing an accelerator.
[0047] The plating apparatus 20 also includes three cleaning units
30a, 30b, 30c each for cleaning (rinsing) the surface of the
substrate W with dilute sulfuric acid, a cleaning/drying unit 32
for cleaning and drying the substrate W after electroplating, and a
substrate stage 34 for temporarily placing thereon the substrate W
before or after processing. A first substrate transport device 36
is disposed movably between the loading/unloading sections 22 and
the substrate stage 34, and a second substrate transport device 38
is disposed movably between the substrate stage 34 and the units.
All the units, including the first pretreatment unit 24, the second
pretreatment unit 26 and the plating units 28, are controlled by a
control section 40 provided in an exterior panel of the plating
apparatus 20.
[0048] In this embodiment, an electrolytic treatment unit for
carrying out electrolytic treatment (plating) of a surface of a
substrate W is used as the first pretreatment unit 24. Thus, as
shown in FIG. 2, the first pretreatment unit 24 includes a
treatment tank 44 for holding therein a first pretreatment solution
42 containing an accelerator, e.g., a sulfur compound such as SPS
(bis (3-sulfopropyl)disulfide), a metal ion (copper ion) and an
acid. The concentration of the accelerator (SPS) in the first
pretreatment solution 42 is generally 5 to 500 .mu.M/L, preferably
50 to 500 .mu.M/L.
[0049] The first pretreatment unit 24 also includes a vertically
movable substrate holder 46 for detachably holding a substrate W
and immersing the substrate W in the first pretreatment solution 42
at a predetermined position in the treatment tank 44, an anode 50,
e.g., made of phosphorus-containing copper, held by an anode holder
48 and to be immersed in the first pretreatment solution 42 at a
predetermined position in the treatment tank 44, and stirring
paddles 54 as a stirring device, which reciprocate by actuation of
a stirring mechanism 52 to stir the first pretreatment solution 42
between the anode 50 and the substrate W.
[0050] In operation, the substrate W held by the substrate holder
46 is immersed in the first pretreatment solution 42 at a
predetermined position, facing the anode 50, in the treatment tank
44. The negative pole of a power source 58 is connected via a
conducting wire 56a to the substrate W, and the positive pole of
the power source 58 is connected via a conducting wire 56b to the
anode 50 to carry out preliminary electrolytic treatment (plating)
of the surface of the substrate Was the first pretreatment. During
this treatment, the stirring paddles 54 of the stirring mechanism
52 are reciprocated to stir the first pretreatment solution 42 as
necessary. The current density in the preliminary electrolytic
treatment is, for example, 50 to 250 A/m.sup.2. The time for
immersion of the substrate W in the first pretreatment solution 42,
the stirring speed of the stirring paddles 54, the current density,
etc. during this treatment are controlled by the control section
40.
[0051] As shown in FIG. 3, the second pretreatment unit 26 includes
a treatment tank 62 for holding therein a second pretreatment
solution 60 containing an additive, e.g., PEI (polyethyleneimine)
as a leveler, which inhibits the effect of the accelerator, e.g., a
sulfur compound such as SPS (bis(3-sulfopropyl)disulfide), and not
containing an accelerator. The second pretreatment unit 26 also
includes a vertically movable substrate holder 64 for detachably
holding a substrate W and immersing the substrate W in the second
pretreatment solution 60 at a predetermined position in the
treatment tank 62, and stirring paddles 68 as a stirring device,
which reciprocate by actuation of a stirring mechanism 66 to stir
the second pretreatment solution 60 in front of the substrate
W.
[0052] In operation, the substrate W held by the substrate holder
64 is immersed in the second pretreatment solution 60 at a
predetermined position in the treatment tank 62 to carry out second
pretreatment of the surface of the substrate W. During this
treatment, the stirring paddles 68 of the stirring mechanism 66 are
reciprocated to stir the second pretreatment solution 60 as
necessary. The time for immersion of the substrate W in the second
pretreatment solution 60, the stirring speed of the stirring
paddles 68, etc. during this treatment are controlled by the
control section 40.
[0053] As shown in FIG. 4, the plating unit 28 includes a plating
tank 72 for holding therein a plating solution 70 containing a
suppressor, e.g., PEG (polyethylene glycol), a metal ion (copper
ion) and an acid. The concentration of the suppressor (PEG) in the
plating solution 70 is, for example, 1 mM/L.
[0054] The plating unit 28 also includes a vertically movable
substrate holder 74 for detachably holding a substrate W and
immersing the substrate W in the plating solution 70 at a
predetermined position in the plating tank 72, an anode 78, e.g.,
made of phosphorus-containing copper, held by an anode holder 76
and to be immersed in the plating solution 70 at a predetermined
position in the plating tank 72, and stirring paddles 82 as a
stirring device, which reciprocate by actuation of a stirring
mechanism 80 to stir the plating solution 70 between the anode 78
and the substrate W.
[0055] In operation, the substrate W held by the substrate holder
74 is immersed in the plating solution 70 at a predetermined
position, facing the anode 78, in the plating tank 72. The negative
pole of a plating power source 86 is connected via a conducting
wire 84a to the substrate W, and the positive pole of the plating
power source 86 is connected via a conducting wire 84b to the anode
78 to carry out electroplating of the surface of the substrate W.
During this plating, the stirring paddles 82 of the stirring
mechanism 80 are reciprocated to stir the plating solution 70 as
necessary. The plating conditions, the stirring speed of the
stirring paddles 82, etc. during this plating are controlled by the
control section 40.
[0056] The operation of the plating apparatus shown in FIG. 1 will
now be described with reference also to FIGS. 5A to 5C.
[0057] First, an unprocessed substrate W is taken by the first
substrate transport device 36 out of a substrate cassette mounted
in one of the loading/unloading units 22, and the substrate W is
transported to the substrate stage 34. The substrate W on the
substrate stage 34 is then transported by the second substrate
transport device 38 to the cleaning unit 30a, where a surface of
the substrate W is cleaned (rinsed) with dilute sulfuric acid. The
substrate W after cleaning is then transferred to the substrate
holder 46 of the first pretreatment unit 24.
[0058] In the first pretreatment unit 24, as shown in FIG. 2, the
substrate W is immersed in the first pretreatment solution 42 at a
predetermined position in the treatment tank 44, and a voltage is
applied between the substrate W and the anode 50, disposed opposite
each other, to carry out preliminary electrolytic treatment
(plating) of the surface of the substrate W as the first
pretreatment. By the first pretreatment, the accelerator 90, such
as SPS, is adsorbed onto the entire surface of the substrate W,
including surfaces of the interconnect recesses 12, as shown in
FIG. 5A. During this treatment, the first pretreatment solution 42
in the treatment tank 44 is stirred with the stirring paddles 54 as
necessary. The first pretreatment conditions, the stirring speed of
the stirring paddles 54, etc. are controlled by the control section
40.
[0059] The substrate W after the first pretreatment is then
transported by the second substrate transport device 38 to the
cleaning unit 30b, where the surface of the substrate W is cleaned
(rinsed) with dilute sulfuric acid. The substrate W after cleaning
is transferred to the substrate holder 64 of the second
pretreatment unit 26.
[0060] In the second pretreatment unit 26, as shown in FIG. 3,
second pretreatment of the surface of the substrate W is carried
out by immersing the substrate W in the second pretreatment
solution 60 in the treatment tank 62. By the second pretreatment,
the additive (leveler) 92, such as PEI, is adsorbed onto the
surfaces of the interconnect recesses 12 in the vicinities of their
openings and onto the surface of the field area of the substrate,
as shown in FIG. 5B. During this treatment, the second pretreatment
solution 60 in the treatment tank 62 is stirred with the stirring
paddles 68 as necessary. The second pretreatment conditions, the
stirring speed of the stirring paddles 68, etc. are controlled by
the control section 40.
[0061] By thus allowing the additive (leveler) 92, such as PEI, to
adsorb onto the surfaces of the interconnect recesses 12 in the
vicinities of their openings and onto the surface of the field area
of the substrate, the accelerator 90 such as SPS, which has been
adsorbed onto the surfaces of the interconnect recesses 12 in the
vicinities of their openings and onto the surface of the field area
of the substrate, can be deactivated by the additive 92 while
maintaining the effect of the accelerator 90 existing in the
interconnect recesses 12. In particular, it has been confirmed that
PEI has a high SPS deactivating effect as a leveler, and SPS,
existing in a surface of a field area of a substrate, can be
selectively deactivated by immersing the substrate, onto which SPS
has been adsorbed in the entire surface area, in an aqueous
sulfuric acid solution containing PEI.
[0062] The substrate W after the second pretreatment is transported
by the second substrate transport device 38 to the cleaning unit
30c, where the surface of the substrate W is cleaned (rinsed) with
dilute sulfuric acid. The substrate W after cleaning is transferred
to the substrate holder 74 of the plating unit 28.
[0063] In the plating unit 28, as shown in FIG. 4, the substrate W
is immersed in the plating solution 70 at a predetermined position
in the plating tank 72, and a voltage is applied between the
substrate W and the anode 78, disposed opposite each other, to
carry out electroplating of the surface of the substrate W. During
this plating, the plating solution 70 in the plating tank 72 is
stirred with the stirring paddles 82 as necessary. The plating
conditions and the stirring speed of the stirring paddles 82 are
controlled by the control section 40.
[0064] By thus carrying out electroplating of the substrate W after
deactivating with the additive (leveler) 92 the accelerator 90 such
as SPS, which has been adsorbed onto the surfaces of the
interconnect recesses 12 in the vicinities of their openings and
onto the surface in the field area of the substrate, while
maintaining the effect of the accelerator 90 existing in the
interconnect recesses 12, the (bottom-up) deposition of the plated
metal (copper) 14 on the bottoms of the interconnect recesses 12
can be accelerated by the action of the accelerator 90 while
suppressing the deposition of the plated metal 14 on the surface of
the field area of the substrate W by the action of the suppressor
contained in the plating solution, as shown in FIG. 5C.
[0065] The substrate W after plating is transported by the second
substrate transport device 38 to the cleaning/drying unit 32, where
the surface of the substrate W is cleaned (rinsed), e.g., with pure
water and dried. The substrate W after drying is transported by the
second substrate transport device 38 to the substrate stage 34. The
first substrate transport device 36 takes up the substrate W from
the substrate stage 34 and returns it to the substrate cassette of
the loading/unloading section 22.
[0066] An accelerator, such as SPS, is an additive essential for
depositing a plated metal from bottoms of interconnect recesses
such as trenches and via holes, i.e., in a bottom-up manner. In the
case of interconnect recesses having a high aspect ratio, it is
likely that when an accelerator is adsorbed onto an entire surface
of a substrate, including surfaces of the interconnect recesses,
and the effect of the accelerator is exerted, the deposition of a
plated metal will be accelerated also the surfaces of the
interconnect recesses 12 in the vicinities of their openings and
the openings will be blocked with the plated metal before the
interconnect recesses are completely filled with the plated metal
that grows in a bottom-up manner.
[0067] To solve the problem, according to the present invention, a
substrate is first subjected to the first pretreatment in which the
substrate is immersed in a first pretreatment solution containing
an accelerator, a metal ion and an acid, e.g., an aqueous copper
sulfate solution containing an accelerator such as SPS, and a
chloride ion, while electrolytically treating a surface of the
substrate as necessary, thereby allowing the accelerator to adsorb
onto the entire surface of the substrate, including surfaces of
interconnect recesses. The substrate is then subjected to the
second pretreatment in which the substrate is immersed in a second
pretreatment solution containing an additive (leveler), such as
PEI, which inhibits the effect of the accelerator, to deactivate
the accelerator existing in the surface of the field area of the
substrate and the surfaces of the interconnect recesses in the
vicinities of their openings. The additive (leveler) can diffuse to
the surfaces of the interconnect recesses only in a small amount
and, therefore, the accelerator remains active in the surfaces of
the interconnect recesses. The substrate is then subjected to
electroplating in the presence of the accelerator in such a state,
using a plating solution containing a metal ion, an acid and a
suppressor. Thus, bottom-up deposition of a plated metal progresses
from the bottoms of the interconnect recesses where the effect of
the accelerator is maintained, whereas deposition of the plated
metal is suppressed by the effect of the suppressor in the surface
of the field area of the substrate where the accelerator has been
deactivated. It is not likely that the openings of the interconnect
recesses will be blocked with the plated metal before the
interconnect recesses are filled with the bottom-up grown plated
metal even when a high plating current is employed to achieve a
high plating rate. It therefore becomes possible to fill the plated
metal into the interconnect recesses at a higher rate.
[0068] In order to determine the optimum treatment conditions for
the first pretreatment, the second pretreatment and the
electroplating, the effects of various treatment conditions on the
filling of plated metal into interconnect recesses were examined by
chip testing. The results are described below. A patterned chip,
having a pattern of via holes (interconnect recesses) with varying
diameters of 20, 30, 40 and 50 .mu.m and a depth of 60 .mu.m, was
used as a test chip. Electroplating of the test chip after
pretreatment was carried out in a 6-mm diameter area centered on
the pattern, using a masking tape. A three electrode-type cell was
fabricated using the test chip, a reference electrode
(mercury/mercury sulfate electrode), a platinum anode and a 200-mL
beaker, and first pretreatment and electroplating were carried out
in the cell under control of the electric potential by a
potentiostat.
[0069] An aqueous sulfuric acid/copper sulfate solution (0.9 M
CuSO.sub.4.5H.sub.2O/0.56 M H.sub.2SO.sub.4) was used as a basic
plating bath, and an aqueous 1M H.sub.2SO.sub.4 solution was used
for cleaning (rinsing) between treatment steps. For cleaning
(rinsing) between treatment steps, the use of dilute sulfuric acid
is preferred to the use of pure water from the viewpoint of
ensuring process stability and uniformity.
[0070] A solution, obtained by adding to the basic bath PEG
(polyethylene glycol) as a suppressor at a concentration of 0.1 mM,
a chloride ion at a concentration of 1 mM, and SPS
(bis(3-sulfopropyl)disulfide) as an accelerator at a predetermined
concentration, was used as a first pretreatment solution. In the
first pretreatment, the test chip was immersed in the first
pretreatment solution, and electric current was applied to allow
the accelerator (SPS) to adsorb onto the entire surface of the
chip, including surfaces of the via holes. In the second
pretreatment, the test chip was immersed in a second pretreatment
solution obtained by adding PEI (polyethyleneimine) at a
predetermined concentration to an aqueous sulfuric acid solution.
In the electroplating, using a plating solution obtained by adding
only PEG (polyethylene glycol) as a suppressor at a concentration
of 0.1 mM and a chloride ion at a concentration of 1 mM to the
basic bath, the plated metal (copper) was deposited on the surface
of the test chip at a predetermined electric potential, thereby
filling the plated metal (copper) into the via holes.
[0071] In each treatment, the treatment solution was stirred by
means of a stirrer chip at a rotational speed of 200 rpm. Cleaning
(rinsing) of the test chip with the aqueous sulfuric acid solution
was carried out for 30 seconds before the first pretreatment, and
for 20 seconds between treatments. During the cleaning, the cell
was kept in its open circuit state. After the plating, a
cross-section of the test chip was polished to observe the state of
copper embedded in the via holes.
[0072] Evaluations were made of the effects of the following
treatment conditions: the preliminary electrolysis current during
immersion of the substrate (chip) in the first pretreatment
solution and the concentration of the accelerator in the first
pretreatment solution in the first pretreatment; the concentration
of the additive (leveler) in the second pretreatment solution and
the substrate immersion time in the second pretreatment; and the
overvoltage upon plating in the electroplating. The detailed
descriptions are described below.
A. Preliminary Electrolysis Conditions in the First
Pretreatment
[0073] An experiment was conducted to examine the effect of
preliminary electrolysis conditions (current conditions) in the
first pretreatment. 50 A/m.sup.2, 100 A/m.sup.2 and 250 A/m.sup.2
were selected as a current density for use during immersion of the
substrate (chip) in the first treatment solution in the first
pretreatment. In order to make electric charge, applied for
adsorption of the accelerator, constant in total (3000 Q/m.sup.2)
for all the selected current densities, the preliminary
electrolysis time was varied as follows: 600 sec, 300 sec and 120
sec. The concentration of the accelerator in the first pretreatment
solution was 50 .mu.M. The other process conditions are shown in
Table 1 below. The results of the experiment are shown in FIG. 6
which is a series of cross-sectional photomicrographs of the test
chip after the process. As can be seen from FIG. 6, the plating
growth rate is the highest in the case of 300 sec-100 A/m.sup.2.
FIG. 6 also indicates that the increase in the current causes no
increase in the plating growth rate. In this regard, it is
conceivable that diffusion of the accelerator may also affect
preliminary adsorption of the accelerator.
TABLE-US-00001 TABLE 1 Additives Potential/ Current density/
Process Basis PEG/mM Cl/mM SPS/.mu.M PEI/.mu.M Time/s mV. vs MSE
A/m.sup.2 Rinse H.sub.2SO.sub.4 -- -- -- -- 30 Open Circuit 1st
bath Plating Bath 0.1 1 50 -- 600, 300, 120 -- -50, -100, -250
Rinse H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit 2nd bath
H.sub.2SO.sub.4 -- -- -- 1 30 Open Circuit Rinse H.sub.2SO.sub.4 --
-- -- -- 25 Open Circuit 3rd bath Plating Bath 0.1 1 -- -- 1800
-575 --
[0074] Though adsorption of an accelerator onto a surface of a
substrate is possible merely by immersing the substrate in a first
pretreatment solution containing the accelerator, a metal ion and
an acid, it is preferred to use electrolysis in order to stabilize
the process.
B. The Concentration of the Accelerator in the First Pretreatment
Solution in the First Pretreatment
[0075] An experiment was conducted to examine the effect of the
concentration of the accelerator in the first pretreatment solution
in the first pretreatment. 5 .mu.M, 50 .mu.M and 500 .mu.M were
selected as the concentration of the accelerator in the first
pretreatment solution. The preliminary electrolysis was carried out
under the conditions of 300 sec-100 A/m.sup.2. The other process
conditions are shown in Table 2 below. The results of the
experiment are shown in FIG. 7 which is a series of cross-sectional
photomicrographs of the test chip after the process. As can be seen
from FIG. 7, with reference to the 20-.mu.m via hole, the plating
growth rate is the highest when the concentration of the
accelerator in the first pretreatment solution is 50 .mu.M. With
reference to the via holes having a diameter of 30-50 .mu.m, the
plating growth rate increases with the increase in the accelerator
concentration. The optimum concentration of the accelerator in the
first pretreatment is therefore considered to lie between 50 .mu.M
and 500 .mu.M.
TABLE-US-00002 TABLE 2 Additives Potential/ Current density/
Process Basis PEG/mM Cl/mM SPS/.mu.M PEI/.mu.M Time/s mV. vs MSE
A/m.sup.2 Rinse H.sub.2SO.sub.4 -- -- -- -- 30 Open Circuit 1st
bath Plating Bath 0.1 1 5, 50, 500 -- 300 -- -100 Rinse
H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit 2nd bath
H.sub.2SO.sub.4 -- -- -- 1 30 Open Circuit Rinse H.sub.2SO.sub.4 --
-- -- -- 25 Open Circuit 3rd bath Plating Bath 0.1 1 -- -- 1800
-575 --
C. The Concentration of the Additive (Leveler) in the Second
Pretreatment Solution in the Second Pretreatment
[0076] An experiment was conducted to examine the effect of the
concentration of the additive (leveler) in the second pretreatment
solution in the second pretreatment. 0.1 .mu.M, 1 .mu.M and 10
.mu.M were selected as the concentration of the additive in the
second pretreatment solution. The time for immersion of the chip in
the second pretreatment solution was 30 seconds. The other process
conditions are shown in Table 3 below. The results of the
experiment are shown in FIG. 8 which is a series of cross-sectional
photomicrographs of the test chip after the process. As can be seen
from FIG. 8, when the second pretreatment of the chip was carried
out by immersing the chip in the second pretreatment solution
having the additive concentration of 0.1 .mu.M for 30 seconds, the
openings of the via holes were blocked with the copper plated upon
the electroplating and voids were formed in the copper embedded in
the via holes. This indicates that the effect of the additive to
deactivate the accelerator, existing in the surface of the field
area of the chip and the surfaces of the via holes in the
vicinities of their openings, is insufficient. From the growth of
the plated metal in the via holes, 1 .mu.M is considered
appropriate as the concentration of the additive in the second
pretreatment solution. FIG. 8 also demonstrates that the
accelerator is fully deactivated in the entire surface of the chip
and plating progresses uniformly when the second pretreatment is
carried out by immersing the chip in the second pretreatment
solution having the additive concentration of 10 .mu.M for 30
seconds.
TABLE-US-00003 TABLE 3 Additives Potential/ Current density/
Process Basis PEG/mM Cl/mM SPS/.mu.M PEI/.mu.M Time/s mV. vs MSE
A/m.sup.2 Rinse H.sub.2SO.sub.4 -- -- -- -- 30 Open Circuit
1.sup.st bath Plating Bath 0.1 1 50 -- 300 -- -50, -100, -250 Rinse
H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit 2.sup.nd bath
H.sub.2SO.sub.4 -- -- -- 0.1, 1, 10 30 Open Circuit Rinse
H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit 3.sup.rd bath Plating
Bath 0.1 1 -- -- 1800 -575 --
D. The Substrate Immersion Time in the Second Pretreatment
[0077] An experiment was conducted to examine the effect of the
time for immersion of the substrate (chip) in the second
pretreatment solution in the second pretreatment. 1 .mu.M was
selected as the concentration of the additive in the second
pretreatment solution. The chip immersion time was varied as
follows: 5 sec, 30 sec and 60 sec. The other conditions are shown
in Table 4 below. The results of the experiment are shown in FIG. 9
which is a series of cross-sectional photomicrographs of the test
chip after the process. As can be seen from FIG. 9, the plated
metal can be filled into the via holes at the highest rate when the
second pretreatment is carried out by immersing the chip in the
second pretreatment solution for 5 seconds. This is considered to
be due to the fact that compared to the case where the chip is
immersed in the second pretreatment solution for 30 seconds, the
deactivated accelerator is more limited to that existing in a top
area of the via holes. As will be appreciated from the effect of
the additive concentration of the second pretreatment solution and
the effect of the chip immersion time, the consumption and the
diffusion of the additive (leveler) are important factors in the
second pretreatment.
TABLE-US-00004 TABLE 4 Additives Potential/ Current density/
Process Basis PEG/mM Cl/mM SPS/.mu.M PEI/.mu.M Time/s mV. vs MSE
A/m.sup.2 rinse H.sub.2SO.sub.4 -- -- -- -- 30 Open Circuit 1st
bath Plating Bath 0.1 1 50 -- 300 -- -100 rinse H.sub.2SO.sub.4 --
-- -- -- 25 Open Circuit 2nd bath H.sub.2SO.sub.4 -- -- -- 1 5, 30,
60 Open Circuit rinse H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit
3rd bath Plating Bath 0.1 1 -- -- 1800 -575 --
E. Plating Overvoltage in the Electroplating
[0078] An experiment was conducted to examine the effect of the
electric potential during the electroplating. Because the
accelerator, existing in the surface of the field area of the chip
and the surfaces of the via holes in the vicinities of their
openings, is deactivated by the second pretreatment, it is
considered possible to use a high plating current. In order to
verify this, electroplating was conducted at the following varying
electric potentials: -550 mV, -575 mV and -600 mV. The other
process conditions are shown in Table 5 below. The results of the
experiment are shown in FIG. 10 which is a series of
cross-sectional photomicrographs of the test chip after the
process. As can be seen from FIG. 10, when the electroplating was
carried out at the highly negative potential -600 mV, the plated
metal (copper) was completely filled into the 20-.mu.m via hole in
30 minutes without forming voids in the embedded plated metal.
Further, an adverse effect of the deposition of the plated metal in
the surface of the field area of the chip on the filling of the
plated metal into the via holes, which is a concern associated with
the change of electric potential, was not observed.
TABLE-US-00005 TABLE 5 Additives Potential/ Current density/
Process Basis PEG/mM Cl/mM SPS/.mu.M PEI/.mu.M Time/s mV. vs MSE
A/m.sup.2 Rinse H.sub.2SO.sub.4 -- -- -- -- 30 Open Circuit 1st
bath Plating Bath 0.1 1 50 -- 300 -- -100 Rinse H.sub.2SO.sub.4 --
-- -- -- 25 Open Circuit 2nd bath H.sub.2SO.sub.4 -- -- -- 1 30
Open Circuit Rinse H.sub.2SO.sub.4 -- -- -- -- 25 Open Circuit 3rd
bath Plating Bath 0.1 1 -- -- 1800 -550, -575, -600 --
[0079] A reference experiment was conducted to examine desorption
of the accelerator by reverse electrolysis in a high-concentration
chloride ion-containing solution.
F. Desorption of the Accelerator by Reverse Electrolysis in a
High-Concentration Chloride Ion-Containing Solution (Reference
Experiment)
[0080] The same basic bath as used in the above experiments was
used in this reference experiment. Preliminary electrolytic
treatment (first pretreatment) was first carried out at a current
density of 100 A/m.sup.2 for 300 seconds while immersing the
above-described test chip in the same first pretreatment solution
as described above, containing the accelerator at a concentration
of 100 .mu.M. Next, in order to desorb the accelerator from the
surface of the field area of the chip, the chip was immersed in a
treatment solution containing a chloride ion at a high
concentration, and the system was subjected to reverse
electrolysis. After this treatment, copper electroplating of the
surface of the chip was carried out. The details of the process
conditions are shown in Table 6 below. The results of the
experiment are shown in FIG. 11 which is a series of
cross-sectional photomicrographs of the test chip after the
process.
TABLE-US-00006 TABLE 6 Additives Current PEG/ Cl/ SPS/ Potential/
density/ Process Basis mM mM .mu.M Time/s mV A/m.sup.2 1st bath
Standard 0.1 1 100 300 -- -100 2nd Standard 0.1 1 -- 20 -- 100 bath
3rd bath Standard 0.1 1 -- 3000 -575 --
[0081] As can be seen from FIG. 11, when the electroplating was
carried out for 3000 seconds to fill the plated metal (copper) into
the via holes, a void was formed centrally in the plated metal
(copper) embedded in the 20-.mu.m via hole. This indicates that the
main copper plating must be carried out at least for 3000 seconds
if the chip is pretreated by the accelerator desorbing method in
which the chip is immersed in the treatment solution containing a
chloride ion at a high concentration while carrying out reverse
electrolysis in order to remove the accelerator from the surface of
the field area of the chip. Regarding this pretreatment method, the
reverse electrolysis promotes desorption of the accelerator. Thus,
if the accelerator desorbing pretreatment is carried out without
the reverse electrolysis, i.e., merely by immersing the chip in the
treatment solution, the accelerator desorbing effect will be
insufficient, whereby deposition of the plated metal will not be
sufficiently suppressed in the surface of the field area of the
chip and the surfaces of the via holes in the vicinities of their
openings.
[0082] The results of the above experiments thus demonstrate that a
plated metal can be filled into interconnect recesses of a
substrate at a high rate by carrying out the first pretreatment of
the substrate by immersing the substrate in a first pretreatment
solution containing an accelerator such as SPS, a metal ion and an
acid, carrying out the second pretreatment of the substrate by
immersing the substrate in a second pretreatment solution
containing an additive (leveler), such as PEI, which inhibits the
effect of the accelerator contained in the first pretreatment
solution, and then carrying out electroplating of the substrate by
using a plating solution containing at least a metal ion, an acid
and a suppressor, and not containing an accelerator. In particular,
PEI as an additive (leveler) has a high SPS deactivating effect.
SPS, which has been adsorbed onto a substrate surface, can be
deactivated by immersing the substrate in an aqueous sulfuric acid
solution containing PEI.
[0083] According to the present invention, by carrying out the
second pretreatment of a substrate by immersing the substrate in a
second pretreatment solution containing an additive (leveler), such
as PEI, an accelerator such as SPS, which has been adsorbed onto
the substrate surface, can be selectively deactivated in the
surface of the field area of the substrate, i.e., the surface area
other than surfaces of interconnect recesses. This enables
selective growth of plated metal from the bottoms of the
interconnect recesses. Therefore, for a via hole having a diameter
of 20 .mu.m and a depth of 60 .mu.m, for example, void-free
via-filling plating can be completed in 30 minutes, and in the
total treatment time, including the pretreatment time, of no more
than 40 minutes.
[0084] The above-described experimental results also indicate the
capability of controlling the depth in interconnect recesses, to
which the accelerator deactivating effect can be exerted
effectively, by controlling the amount of adsorption of an
accelerator, such as SPS, in the first pretreatment and the
accelerator deactivating effect in the second pretreatment. This in
turn indicates the capability of void-free high-rate filling of
plated metal into interconnect recesses, such as trenches and via
holes, of various depths through adjustment of the pre-plating
treatment conditions. In particular, the intended recess-filling
plating can be achieved by changing the concentration of an
additive (leveler) in a second pretreatment solution, the substrate
immersion time, etc. in the second pretreatment depending on the
aspect ratio of interconnect recesses. The solution stirring
conditions also affect the depth in interconnect recesses to which
an accelerator is deactivated.
[0085] When a flow of a treatment solution is produced over a
substrate surface, e.g., by stirring, a thickness of a diffusion
layer, formed in the vicinity of the substrate surface, generally
is inversely proportional to the velocity of the flow. A method to
control the flow velocity of a treatment solution, flowing over a
substrate surface, is to use a rotational circular plate. In this
method, the rotational speed of a rotational circular plate is
proportional to the flow velocity of a treatment solution flowing
over the surface of the rotational circular plate. With reference
to a thickness of a diffusion layer formed over a surface of a
rotating circular plate, the relationship between the rotational
speed .omega. of the circular plate and the thickness .delta. of
the diffusion layer can be analytically determined by the following
formula (V. G. Levich et al., "Physicochemical Hydrodynamics",
Prentice-Hall, Englewood Cliffs, N.J. (1962)):
.delta.=1.61D.sup.1/3.nu..sup.1/6.omega..sup.-1/2 (wherein D
represents diffusion coefficient, and .nu. represents kinetic
viscosity).
[0086] FIG. 12 is a graph showing the relationship, calculated
according to the above formula, between the rotational speed of a
rotational circular plate and a thickness of a diffusion layer
formed over a substrate surface in an aqueous copper
sulfate/sulfuric acid solution (copper sulfate plating solution) as
a copper plating solution.
[0087] In the case where because of small width or diameter of
interconnect recesses, such as trenches and via holes, no flow of a
treatment solution is produced in the interconnect recesses, a
thickness of a diffusion layer, formed over the substrate surface
depending on the flow velocity of the treatment solution flowing
over the substrate surface, determines the time it takes for a
substance to move from a point in the solution to the substrate
surface. In the diffusion layer, a substance moves mainly by
diffusion. Taking a one-dimensional model as an example for
simplicity, change with time in the concentration of a chemical
species, which diffuses from an upper surface of a diffusion layer,
can be determined as shown in FIG. 13 by solving the diffusion
equation. The diffusion coefficient of copper ions in a copper
sulfate plating solution is used as the diffusion coefficient in
the diffusion equation.
[0088] As can be seen from FIG. 13, the longer the distance of a
point from the upper surface of the diffusion layer, the more time
it takes for the chemical species to reach that point.
[0089] Further, it is apparent from FIG. 12 that the thickness of
the diffusion layer depends on the flow velocity of the treatment
solution. These data suggest that in the first pretreatment the
stirring intensity of a first pretreatment solution should be
strong so that a large amount of chemical species (accelerator)
will be supplied and adsorbed onto bottoms of interconnect
recesses, such as via holes and trenches, of a substrate, whereas
in the second pretreatment stirring of a second pretreatment
solution should be performed gently so that a chemical species
(additive (leveler)) will reach only to the surface in the field
area of the substrate and the surfaces of the interconnect recesses
in the vicinities of their openings.
[0090] On the other hand, in the case where because of large width
or diameter of interconnect recesses, such as trenches and via
holes, a flow of a treatment solution is produced also in the
interconnect recesses by stirring of the solution, the flow of the
treatment solution affects the movement distance of a substance
which moves in the depth direction of the interconnect
recesses.
[0091] For example, consider now three types of via holes having
diameters of 10 .mu.m, 30 .mu.m and 50 .mu.m, respectively, which
are expected to allow a treatment solution to intrude into the via
holes when the treatment solution is stirred. On the assumption
that all the via holes have a depth of 70 .mu.m, and the treatment
solution is stirred by means of paddles at a paddle movement speed
of 0.3 m/sec or 1.3 m/sec, a numerical analysis is made to
determine the flow state of the treatment solution in the via holes
and the surfaces of the via holes in the vicinities of their
openings. Based on the analytical results, evaluations can be made
of the intrusion of the flow of the pretreatment solution into a
via hole in relation to the stirring intensity and the diameter of
the via hole, as follows. FIG. 14 shows the relationship between
the diameter of a via hole and the intrusion depth of the flow of
the treatment solution into the via hole. In FIG. 14, the intrusion
depth is defined as the depth which is reached by the flow of the
treatment solution at a flow velocity of 1 mm/sec.
[0092] As can be seen from FIG. 14, the intrusion depth increases
with increase in the via hole diameter when the treatment solution
is stirred at the same paddle movement speed. In order to obtain in
the 50-.mu.m via hole the same intrusion depth of the flow of a
second pretreatment solution as that obtained in the 10-.mu.m via
hole when the solution is stirred at a paddle movement speed of 1.3
mm/sec, it is necessary to stir the solution at a paddle movement
speed of 0.3 m/sec. Thus, the flow velocity distribution in a
larger diameter via hole in the depth direction of the via hole can
be made similar to that in a smaller diameter via hole by using a
lower stirring intensity. Accordingly, by controlling the stirring
intensity (movement speed) of stirring paddles during the second
pretreatment, the effect of an additive (leveler) in the depth
direction of interconnect recesses can be equalized for
interconnect recesses of various diameters or widths.
[0093] As described above, in the second pretreatment, the depth
range in interconnect recesses in which the effect of an additive
(leveler) is exerted can be controlled by controlling the stirring
intensity of a second pretreatment solution whether the
interconnect recesses are narrow ones in which no flow of the
solution is produced upon stirring of the solution or wide ones in
which a flow of the solution is produced upon stirring of the
solution. Therefore, for a substrate having any size of
interconnect recesses, the effect of an accelerator can be
inhibited in the surface of the field area of the substrate and the
surfaces of the interconnect recesses in the vicinities of their
openings, whereas the effect of the accelerator can be maintained
in the interconnect recesses, especially in their bottoms. This
enables bottom-up growth of plating.
[0094] A depth of the surfaces of the interconnect recesses in the
vicinities of their openings, to which the effect of the
accelerator can be suppressed, is preferably ranging about from a
half to one-third of a depth from the surface of the field area of
the substrate to the bottoms of the interconnect recesses. An
additive (leveler) for suppressing the effect of the accelerator is
transported by diffusion from the upper surface of the diffusion
layer formed over the substrate surface to the bottoms of the
interconnect recesses. Therefore, the effect for suppressing the
accelerator is inversely proportional to the distance from the
closest upper surface of the diffusion layer.
[0095] In the electroplating, it is necessary to quickly supply
metal ions to bottoms of interconnect recesses, and therefore
strong stirring of a plating solution is required. Accordingly, a
plating solution should preferably be stirred in the electroplating
with a stirring intensity equal to or higher than that in the
second pretreatment.
[0096] Though SPS has been described as an accelerator, it is
possible to use other sulfur compounds as an accelerator. Examples
of other usable sulfur compounds include an isomer of SPS,
bis(3-sulfo-2-hydroxypropyl)disulfide and its sodium salt,
3-(benzothiazolyl-2-thio)propylsulfonic acid and its sodium salt,
3-sulfopropyl N,N-dimethyldithiocarbamate and its sodium salt,
O-ethyl-S-(3-sulfopropyl)-diethylcarbonate and its potassium salt,
thiourea and its derivatives, etc.
[0097] Though PEI has been described as an additive (leveler), it
is possible to use other compounds which inhibit the effect of the
accelerator used. Examples of such compounds include
nitrogen-containing polymers, e.g., cationic polymers such as
polyvinyl pyrrolidone or its derivatives, and Janus Green B which
has conventionally been used as a leveler; amide compounds;
thioamide compounds; compounds having an aniline or pyridine ring;
heterocyclic compounds; condensed heterocyclic compounds; and
aminocarboxylic acids.
[0098] Though polyethylene glycol has been described as a
suppressor for use in plating, it is possible to use other
suppressors. Examples of other usable suppressors include
polypropylene glycol, a copolymer of ethylene glycol and propylene
glycol, and its derivatives, polyvinyl alcohol, carboxymethyl
cellulose, etc.
[0099] A via hole having a diameter of 20 .mu.m and a depth of 60
.mu.m, for example, is used in the above-described experiments. For
a via hole of the same diameter, but having a larger depth,
void-free via-filling plating can be performed by increasing the
concentration of the additive (leveler) in the second pretreatment
solution in the second pretreatment, or prolonging the substrate
immersion time. In the experimental examples, the time for
immersion of a substrate in the second pretreatment solution is,
for example, 5 seconds. Such a short substrate immersion time may
be inappropriate in view of low reproducibility in a practical
apparatus. Thus, it is preferred to set a longer substrate
immersion time. The substrate immersion time can be prolonged
suitably by decreasing the concentration of the additive (leveler)
in the second pretreatment solution for a via hole having the same
diameter and the same depth.
[0100] For a substrate having via holes with various diameters and
depths or having trenches with various widths and depths, an
appropriate additive (leveler) concentration in a second
pretreatment solution and an appropriate substrate immersion time
in the second pretreatment can be determined by performing a
plating test of the same substrate in advance. An appropriate
additive (leveler) concentration in a second pretreatment solution
and an appropriate substrate immersion time in the second
pretreatment of a substrate, having via holes or trenches with
various widths or diameters and various depths, can also be
determined based on comparison of the results of such a test with
the results of a diffusion analysis. It is possible to provide a
plating apparatus which, by using a database that stores data on
such test results and analytical results, can automatically control
the substrate immersion time and the additive (leveler)
concentration of a second pretreatment solution in the second
pretreatment.
[0101] While the present invention has been described with
reference to preferred embodiments, it is understood that the
present invention is not limited to the embodiments described
above, but is capable of various changes and modifications within
the scope of the inventive concept as expressed herein.
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