U.S. patent application number 12/395523 was filed with the patent office on 2009-07-02 for semiconductor element and manufacturing method thereof.
This patent application is currently assigned to CANON ANELVA CORPORATION. Invention is credited to Naomu Kitano, Motomu Kosuda, Takashi Minami, Heiji Watanabe.
Application Number | 20090170300 12/395523 |
Document ID | / |
Family ID | 40096254 |
Filed Date | 2009-07-02 |
United States Patent
Application |
20090170300 |
Kind Code |
A1 |
Kitano; Naomu ; et
al. |
July 2, 2009 |
SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF
Abstract
The object of the present invention is to provide a method of
manufacturing high permittivity gate dielectrics for a device such
as an MOSFET. A HfSiO film 104 is formed by sputtering a Hf metal
film 103 on a SiO.sub.2 film (or a SiON film) 102 on a Si wafer
101. A TiO.sub.2 film 106 is formed by sputtering a Ti metal film
105 on the HfSiO film 104 and subjecting the Ti metal film 105 to a
thermal oxidation treatment. A TiN metal film 107 is deposited on
the TiO.sub.2 film 106. The series of treatments are performed
continuously, without exposing the films and the wafer to
atmospheric air. The resultant TiN/TiO.sub.2/HfSiO/SiO.sub.2/Si
structure satisfies the conditions: EOT<1.0 nm, low leakage
current, and hysteresis<20 mV.
Inventors: |
Kitano; Naomu;
(Ichikawa-shi, JP) ; Minami; Takashi; (Fuchu-shi,
JP) ; Kosuda; Motomu; (Machida-shi, JP) ;
Watanabe; Heiji; (Suita-shi, JP) |
Correspondence
Address: |
FITZPATRICK CELLA HARPER & SCINTO
30 ROCKEFELLER PLAZA
NEW YORK
NY
10112
US
|
Assignee: |
CANON ANELVA CORPORATION
Kawasaki-shi
JP
|
Family ID: |
40096254 |
Appl. No.: |
12/395523 |
Filed: |
February 27, 2009 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
11933935 |
Nov 1, 2007 |
|
|
|
12395523 |
|
|
|
|
Current U.S.
Class: |
438/585 ;
257/E21.497 |
Current CPC
Class: |
H01L 29/78 20130101;
H01L 29/517 20130101; H01L 29/513 20130101; H01L 29/4966 20130101;
H01L 21/28229 20130101 |
Class at
Publication: |
438/585 ;
257/E21.497 |
International
Class: |
H01L 21/4763 20060101
H01L021/4763 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 7, 2007 |
JP |
2007-178723 |
Claims
1-14. (canceled)
15. A method of manufacturing a semiconductor device, comprising: a
first step for depositing metal composite films on a silicon
dioxide (SiO.sub.2) film or a silicon oxynitrided (SiON) film by
means of a co-sputtering method using different metal targets in an
atmosphere where oxidation reaction of metal atoms hardly occurs; a
second step for subjecting the metal composite films to a thermal
oxidation treatment; and a third step for forming a metal electrode
material on high permittivity gate dielectrics formed by being
subjected to the thermal oxidation treatment; wherein the steps are
performed continuously.
16. The method of manufacturing a semiconductor device according to
claim 15, wherein the deposited metal composite films in the first
step include at least either hafnium or titanium.
17. The method of manufacturing a semiconductor device according to
claim 15, wherein the second step is performed at a heating
temperature of 500.degree. C. to 900.degree. C.
18. The method of manufacturing a semiconductor device according to
claim 15, wherein the second step is performed at a heating
temperature of 500.degree. C. to 900.degree. C., and at an
oxidation treatment pressure of 1.times.10.sup.-3 [Pa] to 10
[Pa].
19. The method of manufacturing a semiconductor device according to
claim 15, wherein the metal electrode film in the third step is
formed by means of a reactive sputtering method using deposition
equipment enabling oxygen and nitrogen or nitrogen monoxide, or
oxygen and nitrogen to be introduced simultaneously.
20. The method of manufacturing a semiconductor device according to
claim 15, wherein the metal electrode film in the third step is
metal composite films of binary or more system formed by
discharging at least two or more cathodes simultaneously.
21. The method of manufacturing a semiconductor device according to
claim 15, wherein the metal electrode film includes one kind, or
two kinds or more metal elements selected from the group consisted
of Zr, C, Hf, Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La, Dy, Y,
Gd, Co, and W.
22. A method of manufacturing a semiconductor device, comprising: a
first step for depositing metal stacked films on a silicon dioxide
(SiO.sub.2) film or a silicon oxynitrided (SiON) film by means of a
co-sputtering method using different metal targets in an atmosphere
where oxidation reaction of metal atoms hardly occurs; a second
step for subjecting the metal stacked films to a thermal oxidation
treatment; and a third step for forming a metal electrode material
on high permittivity gate dielectrics formed by being subjected to
the thermal oxidation treatment; wherein the steps are performed
continuously.
23. The method of manufacturing a semiconductor device according to
claim 22, wherein the deposited metal stacked films in the first
step include at least either hafnium or titanium.
24. The method of manufacturing a semiconductor device according to
claim 22, wherein the second step is performed at a heating
temperature of 500.degree. C. to 900.degree. C.
25. The method of manufacturing a semiconductor device according to
claim 22, wherein the second step is performed at a heating
temperature of 500.degree. C. to 900.degree. C., and at an
oxidation treatment pressure of 1.times.10.sup.-3 [Pa] to 10
[Pa].
26. The method of manufacturing a semiconductor device according to
claim 22, wherein the metal electrode film in the third step is
formed by means of a reactive sputtering method using deposition
equipment enabling oxygen and nitrogen or nitrogen monoxide, or
oxygen and nitrogen to be introduced simultaneously.
27. The method of manufacturing a semiconductor device according to
claim 22, wherein the metal electrode film in the third step is
metal composite films of binary or more system formed by
discharging at least two or more cathodes simultaneously.
28. The method of manufacturing a semiconductor device according to
claim 22, wherein the metal electrode film in the third step
includes one kind, or two kinds or more metal elements selected
from the group consisted of Zr, C, Hf, Ta, Ti, Al, Ru, Si, Ni, Pt,
Ir, Er, Yb, La, Dy, Y, Gd, Co, and W.
29-32. (canceled)
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a method for forming
stacked films by stacking high permittivity gate dielectrics each
having different relative permittivity constants, and for
depositing a metal electrode material film on the stacked films, in
manufacture of a metal oxide semiconductor field effect transistor
(MOSFET). In particular, the present invention relates to a method
for causing the Equivalent Oxide Thickness (EOT) of the MOSFET to
be equal to or smaller than 1.0 nm.
[0003] 2. Related Background Art
[0004] In manufacture of the MOSFET, today, the MOSFET is
manufactured in combination where a silicon dioxide (SiO.sub.2)
film is used as the gate dielectrics thereof, and polysilicon is
used as the gate electrode thereof. In order to improve the
performance of an integrated circuit, the design rule thereof has
been reduced gradually. Being accompanied with this, thinning of
the gate dielectrics is required. However, there is limitation in
thinning of the gate dielectrics using the silicon dioxide
(SiO.sub.2) film. In other words, thinning beyond the limit results
in increase of leakage current beyond the tolerance level.
[0005] Therefore, today, application of gate dielectrics having a
relative permittivity constant larger than that of the silicon
dioxide (SiO.sub.2) film is considered. The gate dielectrics is
referred to as high permittivity gate dielectrics. When the high
permittivity gate dielectrics is used as the gate dielectrics, the
gate electrode also have to be changed into a metal electrode. It
is because of the two reasons described below. A first reason is in
that polysilicon does not match with almost all of high
permittivity gate dielectrics. A second reason is in that if
polysilicon is used, a depletion region is formed in the interface
between the polysilicon and the high permittivity gate dielectrics,
thereby, the EOT of the MOSFET becomes larger, resulting in
reduction of the capacitance thereof.
[0006] Here, the Equivalent Oxide thickness (EOT) will be
described. The electric film thickness obtained by means of back
calculation by assuming the gate dielectrics material is the
silicon dioxide (SiO.sub.2) film, without depending on the types of
the gate dielectrics, is referred to as the EOT (Equivalent Oxide
thickness) of the silicon dioxide (SiO.sub.2) film. In other words,
when the relative permittivity constant of the dielectrics is
denoted as .epsilon.h, the relative permittivity constant of the
silicon dioxide (SiO.sub.2) film is denoted as .epsilon.o, and the
thickness of the dielectrics is denoted as dh, the EOT of the
silicon dioxide (SiO.sub.2) film, de, is represented by the
following formula 1.
de=dh.times.(.epsilon.o/.epsilon.h) (1)
When a material having a relative permittivity constant .epsilon.h
being larger than the relative permittivity constant .epsilon.o of
the silicon dioxide (SiO.sub.2) film is used as the gate
dielectrics, the above-mentioned formula 1 indicates that the EOT
of the silicon dioxide (SiO.sub.2) film becomes equivalent to the
thickness of the silicon dioxide (SiO.sub.2) film being thinner
than the thickness of the gate dielectrics. In addition, the
relative permittivity constant .epsilon.o of the silicon dioxide
(SiO.sub.2) film is an order of 3.9. Therefore, for example, for a
film composed of a high permittivity gate dielectrics material
having a relative permittivity constant .epsilon.h of 39, even if
the physical film thickness of the high permittivity gate
dielectrics material is 15 nm, the EOT (electric film thickness) of
the silicon dioxide (SiO.sub.2) film becomes 1.5 nm, thereby, the
tunnel current thereof can be largely reduced, while the
capacitance value of the gate dielectrics being caused to be
equivalent to that of a silicon dioxide (SiO.sub.2) film having a
thickness of 1.5 nm.
[0007] Today, HfO.sub.2, HfSiO or HfSiON has a high degree of
expectation as the high permittivity gate dielectrics. Since the
relative permittivity constants of them are an order of 10 to 20,
being calculated by using the above-mentioned formula 1, the
thickness of the dielectrics becomes an order of 6 to 7. However,
since in a practical structure a silicon dioxide (SiO.sub.2) film
having a thickness of an order of 1 nm, is required between the
silicon wafer and the high permittivity gate dielectrics, the film
thickness of the Hf-based high permittivity gate dielectrics
becomes as thin as an order of 1 to 2 nm, it is difficult to reduce
the gate leakage current while satisfying the condition: EOT<1
nm.
[0008] Therefore, Honda et al. (JJAP Vol. 43 (2004) p. 1571),
formed HfO.sub.2 film on a Si wafer, stacked SiO.sub.2 having a
relative permittivity constant being different from that of the
HfO.sub.2 film, on the HfO.sub.2 film, by means of a pulsed laser
deposition method, exposed them to atmospheric air, subsequently,
formed a metal electrode film, and then evaluated electric
properties of the resultant stacked films. As the result, the
hysteresis thereof was 50 to 300 mV, and the EOT thereof was
greater than 1 nm (H, Watanabe et al., Jpn. J. Appl. Phys. 45
(2006) 2933).
[0009] In this manner research of Metal/High-k gate stack has been
energetically advanced as the technology of reducing power
consumption and improving the performance of the MOSFET. Although
it has been reported that a Hf silicate film has excellent
properties as a High-k gate dielectrics material, further reduction
of the EOT is required. Since Ti-based oxides have a high relative
permittivity constant, improving performance of various kinds of
High-k film materials by means of adding Ti has been attempted.
Moreover, a phenomenon that forming a TiO.sub.2 layer by means of a
TiN/HfSiON interfacial reaction reduces the leakage current with
little increase of the EOT, has been reported (H, Watanabe et al.,
Jpn. J. Appl. Phys. 45 (2006) 2933).
[0010] In the present invention, the object is to provide an
optimum structure of a HfTiSiO film for achieving ultra-thin High-k
gate dielectrics satisfying the condition: EOT<1 nm. It is a
subject to satisfy the conditions: EOT<1.0 nm, low leakage
current, and hysteresis<20 mV, by using a stack structure of
Hf-based high permittivity gate dielectrics/Ti-based high
permittivity gate dielectrics having a relative permittivity
constant being different from that of the Hf-based high
permittivity gate dielectrics.
SUMMARY OF THE INVENTION
[0011] A first aspect of the present invention is a method for
forming first high permittivity gate dielectrics on a silicon
dioxide (SiO.sub.2) film (for example, an SiO.sub.2 film) or a
silicon oxynitrided (SiON) film (for example, an SiON film),
forming second high permittivity gate dielectrics having a relative
permittivity constant being different from that of the first high
permittivity gate dielectrics, and forming a metal electrode
material on the resultant second high permittivity gate
dielectrics, and the above-mentioned formation steps are performed
continuously.
[0012] As an embodiment example of the first aspect of the present
invention, the formation of the first high permittivity gate
dielectrics includes a first step for depositing a first metal film
on a silicon dioxide (SiO.sub.2) film, or a silicon oxynitrided
(SiON) film by means of a sputtering method using a metal target in
an atmosphere where oxidation reaction of metal atoms hardly
occurs, and a second step for forming the first high permittivity
gate dielectrics by subjecting the metal film and the silicon
dioxide (SiO.sub.2) film or the silicon oxynitrided (SiON) film to
a thermal oxidation treatment (annealing).
[0013] The first and the second steps of the formation of the first
high permittivity gate dielectrics, are performed continuously,
without exposing the first high permittivity gate dielectrics to
atmospheric air.
[0014] The metal deposited in the first step includes at least
hafnium.
[0015] The second step is performed at a heating temperature of
500.degree. C. to 900.degree. C.
[0016] The second step is performed at a heating temperature of
500.degree. C. to 900.degree. C., and at an oxidation treatment
pressure of 1.times.10.sup.-3 [Pa] to 10 [Pa].
[0017] As another embodiment example of the first aspect of the
present invention, the formation of the second high permittivity
gate dielectrics includes a third step for depositing a second
metal film on the resultant first high permittivity gate
dielectrics formed in the second step, by means of a sputtering
method using a metal target, in an atmosphere where oxidation
reaction of metal atoms hardly occurs, and a fourth step for
forming the second high permittivity gate dielectrics by subjecting
the second metal film to a thermal oxidation treatment
(annealing).
[0018] The third and the fourth steps are performed continuously
without exposing to the second high permittivity gate dielectrics
to atmospheric air.
[0019] The metal deposited in the third step includes at least
titanium.
[0020] The fourth step is performed at a heating temperature of
200.degree. C. to 400.degree. C.
[0021] The fourth step is performed at a heating temperature of
200.degree. C. to 400.degree. C., and at an oxidation treatment
pressure of 1.times.10.sup.-3 [Pa] to 10 [Pa].
[0022] As another embodiment example of the first aspect of the
present invention, the metal electrode film is formed by means of a
reactive sputtering method using deposition equipment enabling
oxygen and nitrogen or nitrogen monoxide, or oxygen and nitrogen to
be introduced simultaneously.
[0023] The metal electrode film is metal composite of binary or
more system formed by discharging at least two or more cathodes
simultaneously.
[0024] The metal electrode film includes one kind, or two kinds or
more metal elements selected from the group consisted of Zr, C, Hf,
Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La, Dy, Y, Gd, Co, and
W.
[0025] A second aspect of the present invention is that in a method
including: depositing metal composite films on a silicon dioxide
(SiO.sub.2) film or a silicon oxynitrided (SiON) film by means of a
co-sputtering method using different metal targets in an atmosphere
where oxidation reaction of metal atoms hardly occurs; subjecting
the metal composite films to a thermal oxidation treatment
(annealing); and forming a metal electrode material on the high
permittivity gate dielectrics formed by being subjected to the
thermal oxidation treatment; the above-mentioned formation steps
are performed continuously.
[0026] The deposited metal composite films include at least either
hafnium or titanium.
[0027] The thermal oxidation of the metal composite films is
performed at a heating temperature of 500.degree. C. to 900.degree.
C.
[0028] The thermal oxidation of the metal composite films is
performed at a heating temperature of 500.degree. C. to 900.degree.
C., and at an oxidation treatment pressure of 1.times.10.sup.-3
[Pa] to 10 [Pa].
[0029] As an embodiment example of the second aspect of the present
invention, the metal electrode film is formed by means of a
reactive sputtering method using deposition equipment enabling
oxygen and nitrogen or nitrogen monoxide, or oxygen and nitrogen to
be introduced simultaneously.
[0030] As another embodiment example of the second aspect of the
present invention, the metal electrode film is metal composite
films of binary or more system formed by discharging at least two
or more cathodes simultaneously.
[0031] As the other embodiment example of the second aspect of the
present invention, the metal electrode film includes one kind, or
two kinds or more metal elements selected from the group consisted
of Zr, C, Hf, Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La, Dy, Y,
Gd, Co, and W.
[0032] A third aspect of the present invention is in that in the
method of manufacturing a semiconductor device including:
depositing metal stacked films on a silicon dioxide (SiO.sub.2)
film or a silicon oxynitrided (SiON) film by means of a
co-sputtering method using different metal targets in an atmosphere
where oxidation reaction of metal atoms hardly occurs; subjecting
the metal stacked films to a thermal oxidation treatment; and
forming a metal electrode material on the high permittivity gate
dielectrics formed by being subjected to the thermal oxidation
treatment; the above-mentioned formation steps are performed
continuously.
[0033] As an embodiment example of the third aspect of the present
invention, the deposited metal stacked films include at least
either hafnium or titanium.
[0034] As another embodiment example of the third aspect of the
present invention, the thermal oxidation treatment is performed at
a heating temperature of 500.degree. C. to 900.degree. C.
[0035] As another embodiment example of the third aspect of the
present invention, the thermal oxidation treatment is performed at
a heating temperature of 500.degree. C. to 900.degree. C., and at
an oxidation treatment pressure of 1.times.10.sup.-3 [Pa] to 10
[Pa].
[0036] As another embodiment example of the third aspect of the
present invention, the metal electrode film is formed by means of a
reactive sputtering method using deposition equipment enabling
oxygen and nitrogen or nitrogen monoxide, or oxygen and nitrogen to
be introduced simultaneously.
[0037] As another embodiment example of the third aspect of the
present invention, the metal electrode film is metal composite
films of binary or more system formed by discharging at least two
or more cathodes simultaneously.
[0038] As another embodiment example of the third aspect of the
present invention, the metal electrode film includes one kind, or
two kinds or more metal elements selected from the group consisted
of Zr, C, Hf, Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La, Dy, Y,
Gd, Co, and W.
[0039] The method of manufacturing an MOS field effect transistor
using the technique for forming high permittivity gate dielectrics
of the present invention includes forming first high permittivity
gate dielectrics on a silicon dioxide (SiO.sub.2) film or a silicon
oxynitrided (SiON) film, forming second high permittivity gate
dielectrics having a relative permittivity constant different from
that of the first high permittivity gate dielectrics; and forming a
metal electrode material on the second high permittivity gate
dielectrics, and where the above-mentioned forming steps of at
least the first and the second high permittivity gate dielectrics
are performed continuously, without exposing the first and the
second high permittivity gate dielectrics to atmospheric air.
[0040] The first and the second high permittivity gate dielectrics
are the gate dielectrics of the MOSFET, and the metal electrode
material is the gate electrode thereof.
[0041] In an embodiment example of the present invention, the first
high permittivity gate dielectrics is an oxide film including Hf,
the second high permittivity gate dielectrics is an oxide film
including Ti, and the metal electrode material includes one kind,
or two kinds or more metal elements selected from the group
consisted of Zr, C, Hf, Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La,
Dy, Y, Gd, Co, and W.
[0042] In another embodiment example, the first high permittivity
gate dielectrics is HfSiO, and the second high permittivity gate
dielectrics is TiO.sub.2.
BRIEF DESCRIPTION OF THE DRAWINGS
[0043] FIG. 1A is a schematic view of a stack structure of high
permittivity gate dielectrics and a metal electrode film, formed by
using the method of the present invention;
[0044] FIG. 1B is a schematic view of another stack structure of
high permittivity gate dielectrics and a metal electrode film,
formed by using the method of the present invention;
[0045] FIG. 1C is a schematic view of another stack structure of
high permittivity gate dielectrics and a metal electrode film,
formed by using the method of the present invention;
[0046] FIG. 1D is a schematic view of another stack structure of
high permittivity gate dielectrics and a metal electrode film,
formed by using the method of the present invention;
[0047] FIG. 1E is a schematic view of another stack structure of
high permittivity gate dielectrics and a metal electrode film,
formed by using the method of the present invention;
[0048] FIG. 1F is a schematic view of another stack structure of
high permittivity gate dielectrics and a metal electrode film,
formed by using the method of the present invention;
[0049] FIG. 2 is a configuration view of equipment for embodying
the method of the present invention;
[0050] FIG. 3A is a view illustrating results of electric
properties obtained by the present invention;
[0051] FIG. 3B is a view illustrating other results of electric
properties obtained by the present invention;
[0052] FIG. 4A is a view illustrating analyzed results for
comparing stack structures of high permittivity dielectrics formed
in another embodiment example of the present invention;
[0053] FIG. 4B is a view illustrating other analyzed results for
comparing stack structures of high permittivity dielectrics formed
in another embodiment example of the present invention;
[0054] FIG. 5A is a view illustrating analyzed results of stack
structures of high permittivity dielectrics formed by the present
invention, for comparing TiOx film forming temperature
dependence;
[0055] FIG. 5B is a view illustrating other analyzed results of
stack structures of high permittivity dielectrics formed by the
present invention, for comparing TiOx film forming temperature
dependence;
[0056] FIG. 6A is a view illustrating results of electronic
properties of stack structures of high permittivity dielectrics
formed by the present invention, for comparing TiOx film forming
temperature dependence;
[0057] FIG. 6B is a view illustrating other results of electronic
properties of stack structures of high permittivity dielectrics
formed by the present invention, for comparing TiOx film forming
temperature dependence; and
[0058] FIG. 7 is a view illustrating of MOSFET including the high
permittivity dielectrics formed by the present invention as gate
dielectrics.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0059] According to the outline of one embodiment example of the
present invention, as a method for forming high permittivity gate
dielectrics, a Hf metal film having a thickness of 0.1 nm to 0.7 nm
is formed on a silicon dioxide (SiO.sub.2) film (SiO.sub.2 (or a
silicon oxynitrided (SiON) film/SiON)) having a thickness of 1 nm
to 2 nm by means of a sputtering method. The resultant Hf metal
film is transferred into a heat treatment chamber having an oxygen
partial pressure being equal to or smaller than 1.0.times.10.sup.-8
[Pa], without being exposed to atmospheric air, is subjected to a
thermal oxidation treatment at a wafer temperature of 500.degree.
C. 900.degree. C., and an oxygen partial pressure of
1.times.10.sup.-3 [Pa] to 10 [Pa], and a Hf silicate film is
formed. The resultant Hf silicate film is transferred into a
sputtering chamber having an ultimate pressure equal to or smaller
than 1.0.times.10.sup.-6 [Pa], without being exposed to atmospheric
air, and a Ti metal film of 0.1 nm to 1.0 nm is formed on the Hf
silicate by means of a sputtering method. The resultant Ti/Hf
silicate stacked high permittivity gate dielectrics is transferred
into a heat treatment chamber having an oxygen partial pressure
being equal to or smaller than 1.0.times.10.sup.-8 [Pa], without
being exposed to atmospheric air, and a TiO.sub.2 film is formed on
the Hf silicate at a wafer temperature of 200.degree. C.
400.degree. C., and an oxygen partial pressure of 1.times.10.sup.-3
[Pa] to 10 [Pa], without occurrence of the reaction of the Ti film
and the Hf silicate film. After being formed, TiO.sub.2/Hf silicate
stacked high permittivity gate dielectrics is transferred into a
metal film deposition chamber, without being exposed to atmospheric
air, and a metal electrode film is formed.
[0060] As an example, a procedure when
TiN/TiO.sub.2/HfSiO/SiO.sub.2/Si structure is formed, will be
described. First, the wafer made of a material such as, for
example, single crystal silicon having a (100) plane orientation,
which is further doped with phosphorus, and has a resistant value
being controlled to be within a range of 2 to 10 .OMEGA.cm, is
used. A silicon dioxide (SiO.sub.2) film is formed on the surface
of the wafer by removing metals, organic materials, native oxide
film etc. from the surface by means of a known RCA cleaning method
etc., exposing clean silicon atoms on the surface, and oxidizing
them. The method of the oxidation may be any kinds of technique as
long as the method is a technique such as a thermal oxidation
method and a radical oxidation method, that can obtain a good
silicon interface. However, since if the thickness of the silicon
dioxide (SiO.sub.2) film is too thick, a low EOT cannot be
obtained, it is desirable that the thickness of the silicon dioxide
(SiO.sub.2) film is 1 nm to 2 nm.
[0061] The resultant silicon dioxide (SiO.sub.2) film is
transferred from a load lock chamber into a metal film deposition
chamber through a transfer chamber, without being exposed to
atmospheric air. A Hf film is formed on the transferred silicon
dioxide (SiO.sub.2) film by means of a sputtering method. It is
desirable that the atmosphere in the metal film deposition chamber
is such an atmosphere where an oxidation reaction of the metal film
hardly occurs therein. For example, before sputtering, oxygen and
moisture etc. should be removed as much as possible by pumping
inside the treatment chamber of the sputtering equipment to be in
ultrahigh vacuum, so as not to oxidize the metal film. In addition,
other than the RCA sputtering method, the method of the equipment
for performing sputtering may be any treatment method such as a DC
magnetron sputtering method and a RF magnetron sputtering
method.
[0062] Next, the wafer having a Hf film formed thereon is
transferred into the heat treatment chamber reached to a desired
heating temperature, without being exposed to atmospheric air, and
subjected to a thermal oxidation treatment for a predetermined time
by introducing oxygen immediately after being installed to the
wafer holder, and a HfSiO film is formed on the wafer. However, the
metal film deposit thickness, the heating temperature, the oxygen
partial pressure for treatment, and the time for the thermal
oxidation treatment, have to be determined so that a as thin as
possible silicon dioxide (SiO.sub.2) film is present between the
silicon and the resultant HfSiO film.
[0063] Next, the wafer having the HfSiO film formed thereon is
transferred from the heat treatment chamber into the metal film
deposition chamber through the transfer chamber, without being
exposed to atmospheric air. A Ti film is formed on the transferred
Hf silicate film by means of a sputtering method. It is desirable
that the atmosphere in the metal film deposition chamber is such an
atmosphere where an oxidation reaction of the metal film hardly
occurs therein. For example, before sputtering, oxygen and moisture
etc. should be removed as much as possible by pumping inside the
treatment chamber of the sputtering equipment to be in ultrahigh
vacuum, so as not to oxidize the metal film. In addition, other
than the RCA sputtering method, the method of the equipment for
performing sputtering may be any treatment method such as a DC
magnetron sputtering method and a RF magnetron sputtering
method.
[0064] Further, the wafer where a Ti film is formed on a HfSiO
film, is transferred into the heat treatment chamber reached to a
desired heating temperature through the transfer chamber, without
being exposed to atmospheric air, and subjected to a thermal
oxidation treatment by introducing oxygen for a predetermined time
immediately after being installed to the wafer holder, and a
TiO.sub.2 film is formed on the HfSiO film.
[0065] Finally, the TiO.sub.2/HfSiO stacked high permittivity gate
dielectrics formed by the above-mentioned manner is transferred
into the metal film deposition chamber through the transfer chamber
without being exposed to atmospheric air, and a TiN film is formed
by using Ti as a target and introducing a reactive gas N.sub.2 in
the chamber.
Embodiment Examples
[0066] An embodiment example applying the present invention will be
described with reference to FIGS. 1A to 1F and 2. In FIGS. 1A to
1F, a structure in a process for forming high permittivity gate
dielectrics is illustrated. In FIGS. 1A to 1F, a Si wafer 101, a
silicon dioxide (SiO.sub.2) film 102, a Hf metal film 103, Hf
silicate film 104, a Ti film 105, a TiO.sub.2 film 106, and a metal
electrode film (a TiN film) 107, are illustrated.
[0067] FIG. 2 is a view illustrating the structure of the
semiconductor manufacturing equipment 200 for forming high
permittivity gate dielectrics according to the present invention. A
load lock chamber 201 is divided with respect to the transfer
chamber 202 through a gate valve which is not illustrated in the
figure, and, thereby, the transfer chamber 202 is shut off from
atmospheric air. The load lock chamber 201 is provided with an
automatic wafer transfer mechanism, and thereby a wafer before
treatment or after treatment can be loaded or unloaded while the
vacuum state of the transfer chamber 202 being maintained. The
transfer chamber 202 has not only a function of
charging/discharging the wafer through the load lock chamber 201,
but also functions of maintaining a high vacuum state and
automatically transferring the wafer between sputtering equipment
203 and a heat treatment chamber 204 without oxidizing the wafer
and polluting the wafer with impurities. The sputtering equipment
203 is connected to the transfer chamber 202 through the gate
valve. Similarly, the heat treatment chamber 204 is also connected
to the transfer chamber 202 through the gate valve.
[0068] As the wafer 10, a p-typed single crystal silicon wafer
having a diameter of 200 mm, was used. First, the surface of the
wafer 101 is cleaned by means of RCA cleaning, and the impurities
and the native oxide film of the surface were removed. Next, being
transferred into rapid thermal oxidation treatment equipment (not
illustrated in figures), the wafer 101 was subjected to thermal
oxidation at a temperature of 1000.degree. C. in an oxygen
atmosphere. As illustrated in FIG. 1A, this caused a 1.6 nm thick
silicon dioxide (SiO.sub.2) film 102 to be formed on the surface of
the wafer 101.
[0069] Followed by, the wafer 101 is set to the load lock chamber
201 of cluster-type equipment illustrated in FIG. 2, and, after
reducing the pressure inside the load lock chamber 201 to
3.0.times.10.sup.-5 [Pa], the wafer 101 was transferred into DC
magnetron sputtering equipment 203 through the transfer chamber
202. As the target of the sputtering equipment 203, Hf was used. It
is desirable that the pressure inside the sputtering equipment 203
is reduced to a value equal to or smaller than 3.0.times.10.sup.-6
[Pa] before the wafer 101 is transferred. Since in the sputtering
equipment 203, the target is installed aslant to the wafer 101, the
sputtering equipment 203 can mount a plurality of targets
simultaneously. Further, a wafer holder for installing the wafer
101 thereon has a mechanism rotating at arbitrary number of
rotations.
[0070] Followed by, by introducing an Ar gas having a flow of 20
sccm, the pressure inside the chamber of the sputtering equipment
203 was kept to 0.02 Pa.
[0071] Followed by, plasma was generated by applying DC of 100 W to
the target, and the wafer was subjected to sputtering of Hf atoms
constituting the target. The sputtered Hf atoms flied to the
direction of the wafer 101 supported at a position facing to the
target, and was deposited on the silicon dioxide (SiO.sub.2) film
102, and thereby a metal film 103 was formed on the silicon dioxide
(SiO.sub.2) film 102. According to the treatment, as illustrated in
FIG. 1B, a 0.5 nm thick Hf film 103 was formed on the silicon
dioxide (SiO.sub.2) film 102.
[0072] After that, the wafer 101 was transferred into the heat
treatment chamber 204. The atmosphere inside the transfer chamber
202 was controlled to be in ultrahigh vacuum where residual oxygen
was very few, so that the Hf film deposited by means of the
sputtering treatment is not oxidized when the wafer was
transferred. The oxygen partial pressure inside the heat treatment
chamber 204 before the wafer 101 was transferred therein, was set
to a value equal to or smaller than 1.0.times.10.sup.-8 [Pa] so
that the wafer was not oxidized even if the Hf film having a strong
absorptive property of oxygen was transferred therein. Moreover,
the wafer heating mechanism was required to be a desired preset
temperature. In the present embodiment example, the wafer 101 was
transferred into the heat treatment chamber 204 in a state when the
wafer heating mechanism was set to 850.degree. C.
[0073] Immediately after the wafer was transferred into the heat
treatment chamber, and installed to the wafer holder, oxygen was
introduced into the chamber to a desired pressure. In the present
embodiment example, the wafer was subjected to a thermal oxidation
treatment by introducing 10 sccm of oxygen gas into the heat
treatment chamber 204, and keeping the pressure inside the heat
treatment chamber 204 to 0.1 [pa], and as illustrated in FIG. 1C,
as a metal silicate film 104, a Hf silicate film was formed.
[0074] After that, again, the wafer 101 was transferred into the DC
magnetron sputtering equipment 203 through the transfer chamber
202. The atmosphere inside the transfer chamber 202 during
transferring the wafer was controlled to be in ultrahigh vacuum
where the residual oxygen was very few, so that pollution of
impurities due do carbon was prevented from occurring on the Hf
silicate film formed by the above-mentioned manner, and the surface
of the Hf silicate film was not oxidized. As the target of the
sputtering equipment 203, Ti was used.
[0075] Followed by, the pressure inside the sputtering equipment
203 was kept to 0.02 Pa by introducing 20 sccm Ar gas into the
sputtering equipment 203. The sputtered Ti atoms flied to the
direction of the wafer 101 supported at a position facing to the
target, and was deposited on the Hf silicate film 104, and thereby
a Ti film 105 was formed on the Hf silicate film 104. According to
the treatment, as illustrated in FIG. 1D, a 0.5 nm thick Ti film
105 was formed on the Hf silicate film 104.
[0076] After that, again, the wafer 101 was transferred into the
heat treatment chamber 204 through the transfer chamber 202. At
that time, the atmosphere inside the transfer chamber 202 was
desirable to be in ultrahigh vacuum where the residual oxygen was
very few, so that the Ti film deposited by means of the sputtering
treatment was not oxidized. The oxygen partial pressure inside the
heat treatment chamber 204 before the wafer 101 was transferred
therein, was equal to or smaller than 1.0.times.10.sup.-8 [Pa],
thereby, the wafer was not oxidized even if the Ti film having a
strong absorptive property of oxygen was transferred therein.
Moreover, the wafer heating mechanism was required to be a desired
preset temperature. In the present embodiment example, the wafer
101 was transferred into the heat treatment chamber 204 in a state
when the wafer heating mechanism was set to 400.degree. C.
[0077] Immediately after the wafer was transferred into the heat
treatment chamber, and installed to the wafer holder, oxygen was
introduced into the chamber to a desired pressure. In the present
embodiment example, the wafer was subjected to a thermal oxidation
treatment by introducing 10 sccm of oxygen gas into the heat
treatment chamber 204, and keeping the pressure inside the heat
treatment chamber 204 to 0.1 [pa], and as illustrated in FIG. 1E,
as a metal oxide film 106, a Ti oxide film (TiO.sub.2 or TiO.sub.x)
was formed.
[0078] After that, again, the wafer 101 was transferred into the DC
magnetron sputtering equipment 203 through the transfer chamber
202. The atmosphere inside the transfer chamber 202 during
transferring the wafer was controlled to be in ultrahigh vacuum
where the residual oxygen was very few, so that the surface of the
TiO.sub.2 (or TiO.sub.x) film formed by the above-mentioned manner,
was not oxidized. As the target of the sputtering equipment 203, Ti
was used.
[0079] Followed by, by introducing an Ar gas having a flow of 20
scam, and nitrogen gas having a flow of 15 sccm as a nitrogen
source, were introduced simultaneously, and the pressure inside the
chamber of the sputtering equipment 203 was kept to 0.03 Pa.
[0080] Followed by, plasma was generated by applying DC of 1000 W
to the target, and the wafer was subjected to sputtering of Ti
atoms constituting the target. Since a reactive gas was used, as
illustrated in FIG. 1F, a TiN film was formed on the metal oxide
film (TiO.sub.2 or TiO.sub.x) 106 as a metal electrode film
107.
[0081] In FIG. 3A, the C-V characteristics of the stacked structure
of high permittivity gate dielectrics and a metal electrode
material, formed using this technique is illustrated. From the
figure, it is understood that excellent electric properties that
are BOT of 0.95 nm and hysteresis value of 20 mV, are obtained.
FIG. 3B illustrates the EOT-Ig characteristics (EOT of silicon
dioxide v.s. leak current) of the stack structure of the high
permittivity gate dielectrics and the metal electrode material
formed using this technique. From FIG. 3B, it is understood that
the leakage current Ig of the polysilicon electrode can be caused
to be lower than that of the silicon dioxide (SiO.sub.2) film with
a known structure by six order.
[0082] In FIG. 4A, using a stack structure (1) formed by using this
sputtering technique, a stack structure (2) of high permittivity
gate dielectrics (HfSiO, TiO.sub.x) and a metal electrode material,
which is formed by forming a HfTi film on a silicon dioxide
(SiO.sub.2) film by means of simultaneous deposition
(co-sputtering) of a Hf target and a Ti target, and subsequently
subjecting the stacked structure to a thermal oxidation treatment,
a stack structure (3) of high permittivity gate dielectrics (HfSiO,
TiO.sub.x) and a metal electrode material, which is formed by
sequentially depositing Hf/Ti on a silicon dioxide (SiO.sub.2) film
in a stacked structure by means of sputtering, and subsequently
subjecting the stacked structure to a thermal oxidation treatment,
comparison results of EOT-Ig (EOT of silicon dioxide v.s. leakage
current) characteristics between these structures, are illustrated.
It is clearly understood that the stacked structure formed by means
of the technique (1) indicated by a triangle enables thinning of
the EOT and improvement if the EOT-Ig characteristics. In addition,
in the case indicated by (2) where Hf and Ti are simultaneously
deposited, the ratios of the Hf target and the Ti target can have
at least the following four types of Hf:Ti=1:1, 3:2, 7:3, and
85:15. Since, in the manufacturing method (2) indicated by a square
and the manufacturing method (3) indicated by a round, deposition
is performed by means of sputtering of a metal target in an
atmosphere where oxidation reactions of metal atoms hardly occur,
as illustrated in FIG. 4A, resultant Ig and EOT are more excellent
that those of a known technique.
[0083] Moreover, in FIG. 4B, the EOT-Ig characteristics comparing
the temperature dependences of TiO.sub.x film formation are
illustrated in the structure formed using this technique. If the
TiO.sub.x film formation temperature is equal to or smaller than
500.degree. C., the conditions: EOT<1 nm and a low leakage
current, are obtained.
[0084] In FIG. 5, the results of XPS analysis from the rear surface
of the wafer using the samples in cases where the formation
temperatures of the TiO.sub.x film are 400.degree. C. and
850.degree. C., are illustrated, in the stack structure formed
using this technique. FIG. 5A illustrates the result of a case
where the formation temperature of the TiO.sub.x film is
400.degree. C., and FIG. 5B illustrates the result of a case where
the formation temperature of the TiO.sub.x film is 850.degree. C.
In the sample of 850.degree. C., the peak of TiO.sub.x is clearly
seen in the Hf silicate film. When the formation temperature of
TiO.sub.x dielectrics is equal to or smaller than 400.degree. C., a
TiO.sub.x/Hf silicate film where Ti does not diffuse into the Hf
silicate film, can be formed. Formation of TiO.sub.x dielectrics at
a low temperature equal to or smaller than 400.degree. C., enables
formation of leak paths and increase of the interface-state density
to be prevented, enabling degradation of electric properties to be
prevented.
[0085] Further, in FIGS. 6A and 6B, the frequency dependency of the
C-V characteristics in the samples of cases where the formation
temperatures of the TiO.sub.x film are 400.degree. C. and
600.degree. C., are illustrated. FIG. 6A illustrates the result of
a case where the formation temperature of the TiO.sub.x film is
400.degree. C., and FIG. 6B illustrates the result of a case where
the formation temperature of the TiO.sub.x film is 600.degree. C.
In the sample of 600.degree. C., it is seen that the frequency
dispersion is large. In other words, when the formation temperature
of dielectrics is equal to or smaller than 600.degree. C., a curve
where the frequency dispersion is small, can be obtained.
[0086] In the present invention, it is possible to achieve good
electric properties having smaller frequency dispersion, that are,
EOT<1 nm, low leakage current, and hysteresis<20 mV.
[0087] Although, in the above-mentioned description, a
TiN/TiO.sub.x/HfSiO/SiO.sub.2/Si structure has been described,
within the scope of the present invention, the kinds of the metal
electrode film to be formed are not limited.
[0088] The material of the metal electrode may be a metal such as
Ta, Ru, and Hf, a metal nitride such as TiN and HfN, and TaN, a
metal alloy such as RuTa and HfTa, a metal-semiconductor alloy such
as HfSi and TaSi, a metal-semiconductor alloy nitride such as
TaSiN, or a stacked body composed of the above-mentioned films, for
example, Hf/TaN/TiN and Ru/Ta/TaN.
[0089] A MOS-FET 70 including the high permittivity gate
dielectrics manufactured according to the present invention is
illustrated in FIG. 7. An n.sup.+ drain electrode 72, an n.sup.+
source electrode 73, and an inversion layer (channel) region 75 are
formed on a p-typed silicon wafer 71, high permittivity gate
dielectrics layer of TiO.sub.x/HfSiO/SiO.sub.2 layer 74 formed
according to the present invention is disposed on the inversion
layer region 75, and a metal electrode TiN (or another metal) 76 is
formed on the high permittivity gate dielectrics layer 74,
resulting in construction of a gate electrode. In the
TiO.sub.x/HfSiO/SiO.sub.2 layer, formation of a Hf film on a
SiO.sub.2 film, formation of a HfSiO.sub.2 film by means of a
thermal oxidation treatment, formation of a Ti film on the
HfSiO.sub.2 film, and formation of a TiO.sub.2 film by means of a
thermal oxidation treatment are adopted as preferable embodiment
examples. However, except for the above-mentioned methods,
according to specifications, it is also possible to sputter and
deposit a metal in an atmosphere where oxidation reaction of metal
atoms hardly occurs by means of a thermal oxidation treatment after
co-sputtering and depositing Ti and Hf, and a thermal oxidation
treatment after sequentially sputtering and depositing Ti and Hf.
Moreover, as mentioned-above, it is also possible to use a SiON
layer in place of the SiO.sub.2 layer.
[0090] The method of manufacturing the MOS field effect transistor
according to the present invention, includes: forming first high
permittivity gate dielectrics on the silicon dioxide (SiO.sub.2)
film or the silicon oxide nitride film; forming second high
permittivity gate dielectrics on the first high permittivity gate
dielectrics, having a relative permittivity constant differing from
that of the first high permittivity gate dielectrics; and forming a
metal electrode material on the second high permittivity gate
dielectrics, where, at least the formation of the first and the
second high permittivity gate dielectrics are performed
continuously without exposing the first and the second high
permittivity gate dielectrics to atmospheric air.
[0091] The first and second high permittivity gate dielectrics are
gate dielectrics, and the metal electrode material is the gate
electrode.
[0092] In the embodiment example, the first high permittivity gate
dielectrics is an oxide film including Hf, and the second high
permittivity gate dielectrics is an oxide film including Ti, and
the metal electrode material includes one kind, or two or more
kinds of metal elements selected from the group consisted of Zr, C,
Hf, Ta, Ti, Al, Ru, Si, Ni, Pt, Ir, Er, Yb, La, Dy, Y, Gd, Co, and
W.
[0093] In the embodiment example, the first high permittivity gate
dielectrics is HfSiO, and the second high dielectric film is
TiO.sub.2.
[0094] As described above, the above-mentioned specific embodiment
examples are not intended to limit the scope of the present
invention, and may be enlarged in order to correspond to the
content of the subject of the claims of the present invention
within the gist disclosed herein.
[0095] This application claims priority from Japanese Patent
Application No. 2007-178723 filed Jul. 6, 2007, which are hereby
incorporated by reference herein.
* * * * *