U.S. patent application number 11/562335 was filed with the patent office on 2008-05-22 for reducing twisting in ultra-high aspect ratio dielectric etch.
This patent application is currently assigned to Lam Research Corporation. Invention is credited to Erik A. Edelberg, Bing Ji, Takumi Yanagawa.
Application Number | 20080119055 11/562335 |
Document ID | / |
Family ID | 39417448 |
Filed Date | 2008-05-22 |
United States Patent
Application |
20080119055 |
Kind Code |
A1 |
Ji; Bing ; et al. |
May 22, 2008 |
REDUCING TWISTING IN ULTRA-HIGH ASPECT RATIO DIELECTRIC ETCH
Abstract
An apparatus for etching a dielectric layer contained by a
substrate is provided. An etch reactor comprises a top electrode
and a bottom electrode. An etch gas source supplies an etch gas
into the etch reactor. A first Radio Frequency (RF) source
generates a first RF power with a first frequency and supplies the
first RF power into the etch reactor, whereas the first frequency
is between 100 kilo Hertz (kHz) and 600 kHz. A second RF source
generates a second RF power with a second frequency and supplies
the second RF power into the etch reactor, whereas the second
frequency is at least 10 mega Hertz (MHz).
Inventors: |
Ji; Bing; (Pleasanton,
CA) ; Edelberg; Erik A.; (Castro Valley, CA) ;
Yanagawa; Takumi; (Fremont, CA) |
Correspondence
Address: |
BEYER WEAVER LLP
P.O. BOX 70250
OAKLAND
CA
94612-0250
US
|
Assignee: |
Lam Research Corporation
|
Family ID: |
39417448 |
Appl. No.: |
11/562335 |
Filed: |
November 21, 2006 |
Current U.S.
Class: |
438/710 ;
156/345.26; 156/345.48; 257/E21.215 |
Current CPC
Class: |
H01J 37/32165 20130101;
H01L 21/31116 20130101; H01J 37/32091 20130101 |
Class at
Publication: |
438/710 ;
156/345.48; 156/345.26; 257/E21.215 |
International
Class: |
H01L 21/306 20060101
H01L021/306 |
Claims
1. An apparatus for etching a dielectric layer over a substrate,
comprising: an etch reactor comprising a top electrode and a bottom
electrode; an etch gas source for supplying an etch gas into the
etch reactor; a first Radio Frequency (RF) source for generating a
first RF power with a first frequency and supplying the first RF
power into the etch reactor, whereas the first frequency is between
100 kilo Hertz (kHz) and 600 kHz; and a second RF source for
generating a second RF power with a second frequency and supplying
the second RF power into the etch reactor, whereas the second
frequency is at least 10 mega Hertz (MHz).
2. The apparatus of claim 1, whereas the first frequency is between
200 kHz and 600 kHz.
3. The apparatus of claim 1, whereas the first frequency is between
350 kHz and 450 kHz.
4. The apparatus of claim 1, whereas the first RF power is between
100 Watts (W) to 10000 W.
5. The apparatus of claim 1, whereas the first RF power is between
500 W to 5000 W.
6. The apparatus of claim 1, whereas the first RF source and the
second RF source are connected to the bottom electrode.
7. The apparatus of claim 1, further comprising: a third RF source
for generating a third RF power with a third frequency and
supplying the third RF power into the etch reactor, whereas the
third frequency is at least 40 MHz.
8. The apparatus of claim 7, whereas the third RF source is
connected to the bottom electrode.
9. The apparatus of claim 1, further comprising: a controller,
whereas the controller is connected to the etch gas source, the
first RF source, the second RF source, and the bottom electrode,
comprising: a processor; and computer readable media, comprising:
computer readable code for delivering the etch gas into the etch
reactor; computer readable code for delivering the first RF power
with the first frequency between 100 kHz and 600 kHz into the etch
reactor; computer readable code for delivering the second RF power
with the second frequency being at least 10 MHz into the etch
reactor; and computer readable code for stopping etch gas, the
first RF power, and the second RF power from being delivered into
the etch reactor after at least one feature with a depth-to-width
aspect ratio of at least 15-to-1 is etched into the dielectric
layer.
10. A method for etching features in a dielectric layer over a
substrate, comprising: placing the substrate with the dielectric
layer on a bottom electrode inside an etch reactor; delivering an
etch gas into the etch reactor; delivering a first RF power with a
first frequency into the etch reactor, whereas the first frequency
is between 100 kHz and 600 kHz; delivering a second RF power with a
second frequency into the etch reactor, whereas the second
frequency is at least 10 MHz; and etching the dielectric layer to
form at least one ultra-high aspect ratio (UHAR) feature.
11. The method of claim 10, whereas the ultra-high aspect ratio is
at least 15-to-1.
12. The method of claim 10, whereas the at least one ultra-high
aspect ratio feature has a width no greater than 300 nanometers
(nm) and the ultra-high aspect ratio is at least 15-to-1.
13. The method of claim 10, whereas the first frequency is between
200 kHz and 600 kHz.
14. The method of claim 10, whereas the first frequency is between
350 kHz and 450 kHz.
15. The method of claim 10, whereas the first RF power is between
100 W to 10000 W.
16. The method of claim 10, whereas the first RF power is between
500 W to 5000 W.
17. The method of claim 10, whereas the first RF power is delivered
into the etch reactor by capacitive coupling.
18. The method of claim 10, further comprising: delivering a third
RF power with a third frequency into the etch reactor, whereas the
third frequency is at least 40 MHz.
19. The method of claim 10, whereas the dielectric layer is of a
silicon oxide based material.
Description
BACKGROUND OF THE INVENTION
[0001] The present invention relates to the fabrication of
semiconductor devices.
[0002] Plasma-etching processes are commonly used in the
fabrication of semiconductor devices. Generally, photoresist
material forms feature patterns on the surface of the wafer to be
etched, and features are then etched into the wafer by exposing the
wafer to a particular type of etching gas. One of the challenges
faced in plasma etching is the ever-increasing aspect ratio needed
to meet design requirements, especially for ultra-high density
structures. When etching features on semiconductor wafers, the
aspect ratio of an etched feature is defined as the ratio between
the feature's depth (d) and the feature's width (w) or diameter. As
more features are packed on a single piece of wafer to create
higher density structures, the width (w) or diameter of each
individual feature necessarily decreases, while the depth of the
features remains unchanged. Thus, the aspect ratio of each
individual feature increases as the device feature shrinks.
[0003] A new difficulty emerged recently during ultra-high aspect
ratio (UHAR) etch is twisting, which is generally defined as
deviations of location, orientation, shape, and size near the
bottom of a feature from the pattern defined by the mask on the top
of the feature. When the aspect ratio of a feature reaches a
certain threshold while the feature's width is very small, twisting
occurs, particularly near the bottom of the feature.
[0004] FIG. 1A shows the side view of a wafer with four etched
features, where twisting occurred near the bottom of each feature.
In FIG. 1A, a mask 100 deposited on the surface of the wafer 110
masked four features 120, 122, 124, 126. The four features 120,
122, 124, 126 are etched into the wafer 110 all the way to the stop
layer 130. The four features 120, 122, 124, 126 each has a width,
W, and a depth, D. The aspect ratio of each of the four features
120, 122, 124, 126 is D/W. As shown in FIG. 1A, the sidewalls of
the features 120, 122, 124, 126 are not straight but are curved
near the bottom of the features. Such deviations near the bottom of
the features 120, 122, 124, 126 from the pattern defined by the
mask 100 are twisting.
[0005] Generally, twisting may manifest in one or more of the
following forms. Lateral twisting is defined as deviation of the
etch profile center from the vertical straight line near the bottom
of a feature. Angular twisting is defined as deviation of the
angular orientation of the etch profile from a predefined angle
near the bottom of a feature. Shape twisting is defined as
deviation of the etch profile from a predefined uniform shape near
the bottom of a feature. All three forms of twisting may occur
simultaneously within a single feature.
[0006] FIG. 1B shows the top view of samples of various forms of
twisting near the bottom of the etched features. When twisting
occurs, the oval-shaped cross-section is not perfect in size,
position, orientation, shape, or a combination thereof. In FIG. 1B,
for lateral twisting, the cross-sections 140, 142, 144, 146, 148
shift so that the center of the ovals are no longer at the center
of the original pattern. For angular twisting, the cross-sections
150, 152, 154, 156, 158 rotate so that the ovals are no longer
aligned with the original pattern. For shape twisting, the
cross-sections 160, 162, 164, 166, 168 are no longer in the
original oval shape. Finally, in case of combination twisting, the
cross-sections 170, 172, 174, 176, 178 simultaneously shift,
rotate, and change shape. All forms of twisting result in defects
and device failures. Therefore, it is desirable to reduce or
eliminate twisting during UHAR etch.
SUMMARY OF THE INVENTION
[0007] To achieve the foregoing and in accordance with the purpose
of the present invention, an apparatus for etching a dielectric
layer over a substrate is provided. An etch reactor comprises a top
electrode and a bottom electrode. An etch gas source supplies etch
gas into the etch reactor. A first Radio Frequency (RF) source
generates a first RF power with a first frequency and supplies the
first RF power into the etch reactor, whereas the first frequency
is between 100 kilo Hertz (kHz) and 600 kHz. A second RF source
generates a second RF power with a second frequency and supplies
the second RF power into the etch reactor, whereas the second
frequency is at least 10 mega Hertz (MHz).
[0008] In another embodiment of the invention, an apparatus for
etching a dielectric layer over a substrate is provided. An etch
reactor comprises a top electrode and a bottom electrode. An etch
gas source supplies etch gas into the etch reactor. A first RF
source generates a first RF power with a first frequency and
supplies the first RF power into the etch reactor, whereas the
first frequency is between 100 kilo Hertz (kHz) and 600 kHz. A
second RF source generates a second RF power with a second
frequency and supplies the second RF power into the etch reactor,
whereas the second frequency is at least 10 mega Hertz (MHz). A
third RF source generates a third RF power with a third frequency
and supplies the third RF power into the etch reactor, whereas the
third frequency is at least 40 MHz.
[0009] In another embodiment of the invention, a method for etching
features in a dielectric layer over a substrate is provided. The
substrate with the dielectric layer is placed on a bottom electrode
inside an etch reactor, whereas the dielectric layer is over the
substrate. An etch gas is delivered into the etch reactor. A first
RF power with a first frequency is delivered into the etch reactor,
whereas the first frequency is between 100 kHz and 600 kHz. A
second RF power with a second frequency is delivered into the etch
reactor, whereas the second frequency is at least 10 MHz. The
dielectric layer is etched to form at least one ultra-high aspect
ratio feature.
[0010] These and other features of the present invention will be
described in more detail below in the detailed description of the
invention and in conjunction with the following figures.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The present invention is illustrated by way of example, and
not by way of limitation, in the figures of the accompanying
drawings and in which like reference numerals refer to similar
elements and in which:
[0012] FIG. 1A (prior art) shows the side view of a wafer with four
etched features, where twisting occurred near the bottom of each
feature.
[0013] FIG. 1B (prior art) shows the top view of samples of various
forms of twisting near the bottom of the etched features.
[0014] FIG. 2 is a schematic view of an etch reactor that may be
used in practicing the invention.
[0015] FIGS. 3A and 3B illustrate a computer system, which is
suitable for implementing the controller used in one or more
embodiments of the present invention.
[0016] FIG. 4 is a high level flow chart of a process that may be
used in an embodiment of the invention.
[0017] FIG. 5A shows an illustrative side view of a stack to be
etched using the invention.
[0018] FIG. 5B shows an illustrative side view of the stack in FIG.
5A etched using the invention.
[0019] FIG. 5C shows an illustrative top view of a cross-section
taken near the bottom of the four features etched in FIG. 5B.
[0020] FIG. 6 shows a comparison of twisting from using 400 kHz
bias RF power and 2 MHz bias RF power during UHAR dielectric etch
processes.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0021] The present invention will now be described in detail with
reference to a few preferred embodiments thereof as illustrated in
the accompanying drawings. In the following description, numerous
specific details are set forth in order to provide a thorough
understanding of the present invention. It will be apparent,
however, to one skilled in the art, that the present invention may
be practiced without some or all of these specific details. In
other instances, well known process steps and/or structures have
not been described in detail in order to not unnecessarily obscure
the present invention.
[0022] Without wishing to be bound by the following, it is
tentatively theorized that twisting is a result of asymmetric
etching in ultra-high aspect ratio (UHAR) features. There are
several mechanisms contributing to asymmetric etching as the
feature aspect ratio increases. The main mechanism is asymmetric
deflection of incident ion trajectories near the bottom of the UHAR
features. Anisotropic reactive ion etch (RIE) is a result of
complex reactions between the exposed dielectric surfaces and the
reactive neutral radicals and ions from the plasma. The flux of the
neutral species to the bottom of a feature is dominated by Knudsen
diffusion and the sticking coefficient of the species to the
feature sidewalls. The fluorocarbon radicals commonly used in
dielectric etch typically have high sticking coefficient, and hence
their flux to the bottom of a feature strongly depend on the aspect
ratio (AR) of the feature.
[0023] As a feature's AR increases (typically greater than
10-to-1), neutral fluxes reaching the bottom of the feature become
greatly diminishes and can no longer drive the etch reactions. At
high and especially ultra-high aspect ratio (typically greater than
10-to-1 and especially greater than 15-to-1), etch reactions are
driven by ion fluxes to the bottom of the feature. Ion fluxes to
the bottom of the feature is dominated by plasma ion density, ion
energy distribution, and the feature's bottom potential due to
differential charging. Ions are first accelerated by the electrical
field across the plasma sheath. The sheath electrical field is
determined by the bulk plasma potential and the wafer surface
potential, which is driven by the applied Radio Frequency (RF)
fields.
[0024] In advanced plasma etchers, multiple radio frequencies are
used to drive the plasma. For example, 27 mega Hertz (MHz) and/or
60 MHz RF power, also known as "source RF power," is used to
maintain plasma density, while 2 MHz RF power, also known as "bias
RF power," is used to drive the plasma sheath potential. At the
wafer's top surface, charge balance is achieved by the momentary
electron flux when the plasma sheath collapses during an RF cycle.
However, electron flows are not directional, and thus cannot reach
the bottom of the UHAR features efficiently. As a result, the
bottom of the UHAR features accumulates residual positive charges
over an RF cycle. This is called differential charging. In other
words, more ions reach the bottom of the UHAR features than
electrons, resulting in positive differential charging at the
bottom of the UHAR features, which gives higher differential
potential at the bottom of the UHAR features.
[0025] Differential charging causes the increase of the potential
at the bottom of the UHAR features, which retards or deflects the
incident ions towards the bottom of the UHAR features. Differential
charging also causes the slowing down of etch rate as AR increases,
a phenomenon well known as aspect ratio dependent etching (ARDE).
In other words, when incident energy is below the differential
charging potential, ions are deflected. On the other hand, when
incident energy is above the differential charging potential, ions
are slowed down, but not deflected, causing lower etch rate at
ultra-high aspect ratio. If differential charging is asymmetrical
due to some random preferential build up of polymer residues or
charges at ultra-high aspect ratio, ion deflection becomes
asymmetrical. Asymmetrical ion deflection causes asymmetrical
etching in some random direction, so the etch front becomes
asymmetrical. This is a feed forward mechanism: asymmetrical etch
front enhances asymmetrical differential charging, which further
propagates the asymmetrical etch front, and so on. As a result,
twisting occurs at UHAR etch.
[0026] The invention provides an apparatus and a method for
reducing twisting in UHAR dielectric etch. During the fabrication
of semiconductor devices, often, features are etched through a mask
into a layer to be etched over a substrate. The aspect ratio of a
feature is the depth-to-width ratio of the feature opening.
Previously, a depth-to-width ratio of 5-to-1 was considered high.
More recently, the term "high aspect ratio" referred to
depth-to-width ratio around 10-to-1. Now, the aspect ratio of
etched features is higher still. Preferably, an ultra-high aspect
ratio (UHAR) for a feature for this invention is defined as a
depth-to-width ratio greater than 15-to-1. More preferably, an UHAR
for a feature for this invention is defined as at least 20-to-1. In
addition, preferably, the present invention applies to etching
features in the dielectric layer with a width of no more than 300
nanometers (nm). More preferably, the present invention applies to
etching features in the dielectric layer with a width of no more
than 200 nm. Most preferably, the present invention applies to
etching features in the dielectric layer with a width of no more
than 150 nm.
[0027] Preferably, the present invention applies to any dielectric
etch. More preferably, the present invention applies to dielectric
etch where the dielectric layer is silicon oxide based. In other
words, the dielectric layer is formed mainly of silicon oxide with
smaller amounts of other types of material mixed in.
[0028] An apparatus and a method for reducing twisting in UHAR
dielectric etch have been discovered unexpectedly. Specifically, by
replacing the 2 MHz bias RF power with a lower frequency bias
power, the twisting can be effectively reduced without the
drawbacks of the methods described above. In one or more
embodiments of the invention, preferably, the bias RF power has a
frequency between 100 kilo Hertz (kHz) and 600 kHz. More
preferably, the bias RF power has a frequency between 200 kHz and
600 kHz. Even more preferably, the bias RF power has a frequency
between 350 kHz and 450 kHz. Most preferably, the bias RF power has
a frequency of 400 kHz.
[0029] FIG. 2 is a schematic view of an etch reactor that may be
used in practicing the invention. In one or more embodiments of the
invention, an etch reactor 200 comprises a top electrode 202 and a
bottom electrode 204. Also within the etch reactor 200, a substrate
210 is positioned on top of the bottom electrode 204. Over the
substrate 210 is a dielectric layer 212, and this is the layer to
be etched. A mask 214 is deposited over the dielectric layer 212,
which masks the patterns for the features to be etched. Optionally,
the bottom electrode 204 incorporates a suitable substrate chucking
mechanism (e.g., electrostatic, mechanical clamping, or the like)
for holding the substrate 210.
[0030] Preferably, the dielectric layer 212 is silicon oxide
based--that is, the dielectric layer is mainly formed of silicon
oxide, with smaller amounts of other types of substance mixed in.
Features are to be etched into this dielectric layer.
[0031] An etch gas source 220 is connected to the etch reactor 200
and supplies the etch gas into the etch reactor 200 during the etch
processes.
[0032] A first RF source 230 is electrically connected to the etch
reactor 200. More specifically, the first RF source 230 is
electrically connected to the bottom electrode 204. This first RF
source 230 is also known as the "bias RF source." It generates bias
RF power and supplies the bias RF power to the etch reactor 200.
Preferably, the bias RF power has a frequency between 100 kilo
Hertz (kHz) and 600 kHz. More preferably, the bias RF power has a
frequency between 200 kHz and 600 kHz. Even more preferably, the
bias RF power has a frequency between 350 kHz and 450 kHz. Most
preferably, the bias RF power has a frequency of 400 kHz.
[0033] The bias RF power level varies according to the process
needs and generator capacity. Preferably, the bias RF power level
is in the range of 100 Watts (W) to 10000 W. More preferably, the
bias RF power level is in the range of 500 W to 5000 W. Most
preferably, the bias RF power level is in the range of 1000 W to
4000 W for a 300-milimeter (mm) plasma etch reactor.
[0034] A second RF source 232 is electrically connected to the etch
reactor 200. More specifically, the second RF source 232 is
electrically connected to the bottom electrode 204. This second RF
source 232 is also known as the "source RF source." It generates
source RF power and supplies the source RF power to the etch
reactor 200. Preferably, this source RF power has a frequency that
is greater than the bias RF power. More preferably, this source RF
power has a frequency that is greater than or equal to 10 MHz. Most
preferably, this source RF power has a frequency of 27 MHz.
[0035] Optionally, a third RF source 234 is electrically connected
to the etch reactor 200. More specifically, the third RF source 234
is electrically connected to the bottom electrode 204. Similar to
the second RF source 232, this third RF source 234 is also known as
the "source RF source." It generates another source RF power and
supplies the source RF power to the etch reactor 200, in addition
to the RF power generated by the second RF source 232. Preferably,
this source RF power has a frequency that is greater than the bias
RF power. More preferably, this source RF power has a frequency
that is greater than or equal to 40 MHz. Most preferably, this
source RF power has a frequency of 60 MHz.
[0036] The low frequency bias RF power 230 may be scaled with the
wafer size to achieve comparable power density and sheath
potential. The 400 kHz bias RF power may be used in combination
with one or more higher frequency RF power, such as 27 MHz and/or
60 MHz, to sustain the plasma. Other RF powers may be applied
either at the same bottom wafer electrode 2-4, and/or at the
opposite top electrode 202 of the etch reactor 200. The low
frequency bias power 230 may be delivered into the etch reactor 200
by capacitive coupling. The higher frequency RF power 232, 234 may
be delivered into the etch reactor 200 by either capacitive
coupling or inductive coupling.
[0037] A controller 240 is connected to the etch gas source 220,
the first RF source 230, the second RF source 232, and the third RF
source 244 if it is present. The controller 240 controls the flow
of the etch gas into the etch reactor 200, as well as the
generation of the RF power from the three RF sources 230, 232,
234.
[0038] FIGS. 3A and 3B illustrate a computer system, which is
suitable for implementing the controller used in one or more
embodiments of the present invention. The controller 340 is shown
in FIG. 3. FIG. 3A shows one possible physical form of the computer
system 300. Of course, the computer system may have many physical
forms ranging from an integrated circuit, a printed circuit board,
and a small handheld device up to a huge super computer. Computer
system 300 includes a monitor 302, a display 304, a housing 306, a
disk drive 308, a keyboard 310, and a mouse 312. Disk 314 is a
computer-readable medium used to transfer data to and from computer
system 300.
[0039] FIG. 3B is an example of a block diagram for computer system
300. Attached to system bus 320 is a wide variety of subsystems.
Processor(s) 322 (also referred to as central processing units, or
CPUs) are coupled to storage devices, including memory 324. Memory
324 includes random access memory (RAM) and read-only memory (ROM).
As is well known in the art, ROM acts to transfer data and
instructions uni-directionally to the CPU and RAM is used typically
to transfer data and instructions in a bi-directional manner. Both
of these types of memories may include any suitable of the
computer-readable media described below. A fixed disk 326 is also
coupled bi-directionally to CPU 322; it provides additional data
storage capacity and may also include any of the computer-readable
media described below. Fixed disk 326 may be used to store
programs, data, and the like and is typically a secondary storage
medium (such as a hard disk) that is slower than primary storage.
It will be appreciated that the information retained within fixed
disk 326 may, in appropriate cases, be incorporated in standard
fashion as virtual memory in memory 324. Removable disk 314 may
take the form of any of the computer-readable media described
below.
[0040] CPU 322 is also coupled to a variety of input/output
devices, such as display 304, keyboard 310, mouse 312 and speakers
330. In general, an input/output device may be any of: video
displays, track balls, mice, keyboards, microphones,
touch-sensitive displays, transducer card readers, magnetic or
paper tape readers, tablets, styluses, voice or handwriting
recognizers, biometrics readers, or other computers. CPU 322
optionally may be coupled to another computer or telecommunications
network using network interface 340. With such a network interface,
it is contemplated that the CPU might receive information from the
network, or might output information to the network in the course
of performing the above-described method steps. Furthermore, method
embodiments of the present invention may execute solely upon CPU
322 or may execute over a network such as the Internet in
conjunction with a remote CPU that shares a portion of the
processing.
[0041] In addition, embodiments of the present invention further
relate to computer storage products with a computer-readable medium
that have computer code thereon for performing various
computer-implemented operations. The media and computer code may be
those specially designed and constructed for the purposes of the
present invention, or they may be of the kind well known and
available to those having skill in the computer software arts.
Examples of computer-readable media include, but are not limited
to: magnetic media such as hard disks, floppy disks, and magnetic
tape; optical media such as CD-ROMs and holographic devices;
magneto-optical media such as floptical disks; and hardware devices
that are specially configured to store and execute program code,
such as application-specific integrated circuits (ASICs),
programmable logic devices (PLDs) and ROM and RAM devices. Examples
of computer code include machine code, such as produced by a
compiler, and files containing higher level of code that are
executed by a computer using an interpreter. Computer readable
media may also be computer code transmitted by a computer data
signal embodied in a carrier wave and representing a sequence of
instructions that are executable by a processor.
[0042] FIG. 4 is a high level flow chart of a process that may be
used in an embodiment of the invention. In one or more embodiment
of the invention, a substrate with a dielectric layer and a mask is
placed on the bottom electrode inside an etch reactor STEP 400. The
dielectric layer is over the substrate, and the mask is over the
dielectric layer. The dielectric layer is to be etched. The etch
feature patterns have already been masked over the dielectric
layer, perhaps by deposition using photoresist material. The
dielectric layer may be silicon oxide based.
[0043] Etch gas is delivered into the etch reactor STEP 410.
Preferably, the etch gas comprises a combination of fluorocarbon
(C.sub.xF.sub.y), oxygen, and a type of inert gas, such as argon
(Ar) or xenon (Xe). More preferably, the etch gas is free of
nitrogen trifluoride (NF.sub.3) and sulfur hexafluoride (SF.sub.6).
Even more preferably, the etch gas is free of hydrofluorocarbon
(C.sub.xH.sub.yF.sub.z).
[0044] At the same time, a first RF power with a frequency between
100 kHz and 600 kHz is delivered into the etch reactor STEP 420.
And a second RF power with a frequency that is at least 10 MHz is
also delivered into the etch reactor STEP 430. The etch gas is
transformed to plasma. The first, lower frequency RF power may be
delivered into the etch reactor by capacitive coupling. The second,
higher frequency RF power may be delivered into the etch reactor by
either capacitive coupling or inductive coupling. Optionally, a
third RF power with a frequency that is at least 40 MHz is
delivered into the etch reactor in addition to the second RF power.
Finally, the dielectric layer of the substrate is etched to form at
least one UHAR feature according to the masked patterns STEP
440.
[0045] By using two RF powers (one bias RF power and one source RF
power) or three RF powers (one bias RF power and two source RF
powers) and keeping the bias RF power at a low frequency, such as
near 400 kHz while maintaining the source RF powers at a high
frequency, such as near 27 MHz and 60 MHz, the twisting may be
reduced during UHAR dielectric etch processes, resulting in more
perfectly etched features.
[0046] FIG. 5A shows an illustrative side view of a stack to be
etched using the invention. A patterned mask 500 is over the
dielectric layer 510, which is in turn over a stop layer 530, which
is in turn over a substrate. The mask 500 indicates that four
features are to be etched into the dielectric layer 510.
[0047] FIG. 5B shows an illustrative side view of the stack in FIG.
5A etched using the invention. Four features 520, 522, 524, 526 are
etched into the dielectric layer 510 all the way to the stop layer
530 according to the patterned mask 500. The four features 520,
522, 524, 526 each have a width, W, and a depth, D. The aspect
ratio of each of the four features 520, 522, 524, 526 is D/W. As
shown in FIG. 5B, the four features 520, 522, 524, 526 have minimal
twisting from the top all the way to the bottom. The sidewalls of
each feature are vertical. A vertical sidewall is defined as being
sides that form an angle between 88.degree. and 92.degree. from the
top to the bottom of the sides with respect to the bottom of the
feature.
[0048] FIG. 5C shows an illustrative top view of a cross-section
taken near the bottom of the four features etched in FIG. 5B. There
are four features 520, 522, 524, 526 etched in the dielectric layer
510. Each feature is an oval with its origin at the center of the
feature. There is no lateral, angular, or shape twisting.
[0049] FIG. 6 shows a comparison of twisting from using 400 kHz
bias RF power and 2 MHz bias RF power during UHAR dielectric etch
processes. The two etch processes have exactly the same formula
except the frequency for the bias power. Specifically, the etch
chamber pressure is 30 milli-Torr (mTorr). The etch gas comprises
150 standard cubic centimeters per minute (sccm) of argon (Ar), 4
sccm of C.sub.4F.sub.6, 18 sccm of C.sub.4F.sub.8, and 17 to 25
sccm of oxygen (O.sub.2). The source RF power is at 2000 watts (W)
with a frequency of 27 MHz. The solid line 600 represents the
amount of twisting from using the bias RF power at 2000 W with a
frequency of 400 kHz, and the dash line 610 represents the amount
of twisting from using the bias RF power at 2000 W with a frequency
of 2 MHz. As the oxygen (O.sub.2) increases from baseline, the
amount of twisting from using 400 kHz bias RF power is
significantly less than the amount of twisting from using 2 MHz
bias RF power.
[0050] The data indicate that twisting is reduced from about 4 nm
with 1-sigma standard deviation using 2 MHz bias RF power to about
2 nm with 1-sigma standard deviation suing 400 kHz bias RF power.
In fact, the 2 nm with 1-sigma standard deviation of the bottom
ellipse gap distances is mainly due to the scanning electron
microscopy (SEM) resolution limit at about 2 nm per pixel.
Therefore, by using 400 kHz bias RF power, twisting is essentially
eliminated over a range of O.sub.2 flows in UHAR etch with aspect
ratio over 20-to-1.
[0051] As described above, twisting is the result of asymmetric
etching in UHAR features, and it is desirable to eliminate, or at
least reduce twisting as much as possible. Efforts have been made
toward this goal. For example, one method is to suppress plasma
polymer formation by adjusting the etch chemistry. However, this
method has significant disadvantages because less polymerizing
chemistry severely degrades mask and/or substrate selectivity,
resulting in loss of critical dimension (CD) and top profile
distortion (striation). Another method is to increase the ion
acceleration across the plasma sheath. However, this method also
has disadvantages since it tends to worsen top profile striation.
The present invention is able to overcome these problems.
[0052] The present invention has several advantages over the
methods previously used. First, it almost eliminates twisting
completely for UHAR etch over a range of O.sub.2 flows with AR
greater than 15-to-1 and especially with AR greater than 20-to-1.
Second, it does not have any of the drawbacks that other methods
have. Specifically, the present invention does not result in the
loss of critical dimension and top profile distortion, and it does
worsen the top profile striation.
[0053] While this invention has been described in terms of several
preferred embodiments, there are alterations, permutations, and
various substitute equivalents, which fall within the scope of this
invention. It should also be noted that there are many alternative
ways of implementing the methods and apparatuses of the present
invention. It is therefore intended that the following appended
claims be interpreted as including all such alterations,
permutations, and various substitute equivalents as fall within the
true spirit and scope of the present invention.
* * * * *