U.S. patent application number 10/837266 was filed with the patent office on 2005-11-03 for semiconductor device with a protected active die region and method therefor.
Invention is credited to Fay, Owen R., Leal, George R., Wenzel, Robert J..
Application Number | 20050242425 10/837266 |
Document ID | / |
Family ID | 35186217 |
Filed Date | 2005-11-03 |
United States Patent
Application |
20050242425 |
Kind Code |
A1 |
Leal, George R. ; et
al. |
November 3, 2005 |
Semiconductor device with a protected active die region and method
therefor
Abstract
A semiconductor device includes a semiconductor die having a
plurality of contact pad sites, a plurality of contact pads, an
encapsulant barrier, and an encapsulant. A plurality of contact
pads is in electrical contact with a predetermined corresponding
different one of the contact pad sites. An encapsulant barrier is
positioned at an outer perimeter of the semiconductor die. The
encapsulant barrier has a height that is as high as or greater than
a highest of the plurality of contact pads. The encapsulant barrier
is in physical contact with a same surface of the semiconductor die
as the contact pad sites. An encapsulant surrounds the
semiconductor die and one side of the encapsulant barrier. The
encapsulant is blocked from making physical contact with any of the
plurality of contact pads by the encapsulant barrier when the
device is encapsulated while being supported by a temporary base
support layer.
Inventors: |
Leal, George R.; (Cedar
Park, TX) ; Fay, Owen R.; (Gilbert, AZ) ;
Wenzel, Robert J.; (Austin, TX) |
Correspondence
Address: |
FREESCALE SEMICONDUCTOR, INC.
LAW DEPARTMENT
7700 WEST PARMER LANE MD:TX32/PL02
AUSTIN
TX
78729
US
|
Family ID: |
35186217 |
Appl. No.: |
10/837266 |
Filed: |
April 30, 2004 |
Current U.S.
Class: |
257/690 ;
257/E21.511; 257/E23.125 |
Current CPC
Class: |
H01L 2924/01033
20130101; H01L 2924/01082 20130101; H01L 2924/181 20130101; H01L
2924/19042 20130101; H01L 2924/3025 20130101; H01L 21/566 20130101;
H01L 2924/00 20130101; H01L 2924/01047 20130101; H01L 24/81
20130101; H01L 23/3121 20130101; H01L 2924/181 20130101; H01L
2924/01029 20130101; H01L 2224/81801 20130101; H01L 2924/01013
20130101 |
Class at
Publication: |
257/690 |
International
Class: |
H01L 023/48 |
Claims
1. A semiconductor device, comprising: a semiconductor die having a
first surface and a second surface that are opposite each other,
the first surface having a plurality of contact pad sites; a
plurality of contact pads, each of the plurality of contact pads
having a substantially same predetermined height and having a first
end and a second end, the first end of each of the plurality of
contact pads being in electrical contact with a predetermined
corresponding different one of the plurality of contact pad sites;
an encapsulant barrier positioned at a periphery of the plurality
of contact pads, the encapsulant barrier having substantially the
same predetermined height of the plurality of contact pads, the
encapsulant barrier having a first surface and an opposing second
surface, the first surface being in physical contact with the first
surface of the semiconductor die; a first layer having a first
surface and a second surface, the first surface of the first layer
being in direct physical contact with the second surface of the
encapsulant barrier and the second end of each of the plurality of
contact pads; a second layer in direct physical contact with the
first layer; and an encapsulant surrounding the second surface of
the semiconductor die and being blocked from making physical
contact with any of the plurality of contact pads by the
encapsulant barrier, wherein the first layer and the second layer
are releasable from the semiconductor die after curing of the
encapsulant.
2. The semiconductor device of claim 1 wherein the encapsulant
barrier further comprises at least one vent for release of any
expanding gases within air space separating the plurality of
contact pads.
3. The semiconductor device of claim 1 wherein the encapsulant
barrier is comprised of a same material as the plurality of contact
pads.
4. The semiconductor device of claim 1 wherein the encapsulant
barrier is comprised of a different material than the plurality of
contact pads.
5. The semiconductor device of claim 1 further comprising: a
circuit implemented on the semiconductor die, the circuit using the
encapsulant barrier as one of an electrical shield to isolate
electromagnetic interference, an antenna or an inductor.
6. The semiconductor device of claim 5 wherein the circuit is
electrically coupled to the encapsulant barrier.
7. The semiconductor device of claim 1 further comprising: a
circuit implemented on the semiconductor die, the circuit being
electrically coupled to the encapsulant barrier for using the
encapsulant barrier to implement an electrical function in the
circuit.
8. The semiconductor device of claim 1 further comprising: a
passivation layer interposed between the plurality of contact pads
and the first surface of the semiconductor die, wherein a portion
of the encapsulant barrier is in physical contact with the
passivation layer.
9. A semiconductor device, comprising: a semiconductor die having a
plurality of contact pad sites; a plurality of contact pads in
electrical contact with a predetermined corresponding different one
of the plurality of contact pad sites; an encapsulant barrier
positioned at an outer perimeter of the semiconductor die, the
encapsulant barrier having a height that is substantially as large
as a highest of the plurality of contact pads, the encapsulant
barrier having a first surface and a second surface, the first
surface being in physical contact with a same surface of the
semiconductor die as the plurality of contact pad sites; a
removable first layer having a first surface and a second surface,
the first surface of the removable first layer being in direct
physical contact with the second surface of the encapsulant
barrier; a second removable layer in direct physical contact with
the removable first layer; and an encapsulant surrounding the
semiconductor die but being blocked from making physical contact
with any of the plurality of contact pads by the encapsulant
barrier, wherein the removable first layer and the removable second
layer are removed from the semiconductor die after curing of the
encapsulant.
10. The semiconductor device of claim 9 wherein the encapsulant
barrier further comprises at least one vent for release of any
expanding gases within an air space separating the plurality of con
tact pads.
11. The semiconductor device of claim 9 further comprising: a
circuit implemented on the semiconductor die, the circuit using the
encapsulant barrier as one of an electrical shield to isolate
electromagnetic interference, an antenna or an inductor.
12. The semiconductor device of claim 9 further comprising: a
circuit implemented on the semiconductor die, the circuit being
electrically coupled to the encapsulant barrier for using the
encapsulant barrier to implement an electrical function in the
circuit.
13. A semiconductor device, comprising: a semiconductor die having
a plurality of contact pad sites; a plurality of contact pads in
electrical contact with a predetermined corresponding different one
of the plurality of contact pad sites; an encapsulant barrier
positioned at an outer perimeter of the semiconductor die, the
encapsulant barrier having a height that is as high as or greater
than a highest of the plurality of contact pads, the encapsulant
barrier being in physical contact with a same surface of the
semiconductor die as the contact pad sites; and an encapsulant
surrounding the semiconductor die and one side of the encapsulant
barrier, the encapsulant being blocked from making physical contact
with any of the plurality of contact pads by the encapsulant
barrier when the semiconductor device is encapsulated while being
supported by a temporary base support layer.
14. The semiconductor device of claim 13 wherein the encapsulant
barrier further comprises at least one vent for release of any
expanding gases within air spaces separating the plurality of
contact pads.
15. The semiconductor device of claim 13 further comprising: a
circuit implemented on the semiconductor die, the circuit using the
encapsulant barrier as one of an electrical shield to isolate
electromagnetic interference, an antenna or an inductor.
16. The semiconductor device of claim 13 further comprising: a
circuit implemented on the semiconductor die, the circuit being
electrically coupled to the encapsulant barrier for using the
encapsulant barrier to implement an electrical function in the
circuit.
17-20. (canceled)
Description
FIELD OF THE INVENTION
[0001] The present invention relates to semiconductor devices, and
more specifically to protecting specific regions of semiconductor
devices.
RELATED ART
[0002] During the semiconductor manufacturing process, it is often
desirable to prevent molding material from bleeding over to active
regions of the semiconductor. That is, during the encapsulation
process of manufacturing semiconductor devices, the molding
material used to encapsulate the semiconductor die (e.g., resin)
can bleed over to active regions of the semiconductor where such
molding material is undesired.
[0003] Current bleed prevention techniques utilize trenches or dams
to prevent the molding material from bleeding onto the substrate or
lead frame leads. However, if, for example, the trench or damn
depth is not sufficient enough to hold the molding material, these
techniques will not necessarily prevent the molding material from
bleeding onto the die face itself. Other bleed prevention
techniques rely on high clamping force to prevent resin from
bleeding onto the exposed pad of an exposed pad package. Although
the high clamping force may prove useful in some situations, using
such a method is sometimes unpredictable in terms of reliability
and yield. Another way to deal with molding material that has bleed
over into active regions of the semiconductor die is to apply
surface treatments to prevent wetting on the active region or to
remove the unwanted molding material. Although using surface
treatments may prevent or facilitate removal of the unwanted
molding material, the excess chemicals utilized often have
undesirable effects on the active regions of the semiconductor
die.
BRIEF DESCRIPTION OF THE DRAWINGS
[0004] The present invention is illustrated by way of example and
not limitation in the accompanying figures, in which like
references indicate similar elements, and in which:
[0005] FIG. 1 illustrates a cross-sectional view of a semiconductor
device in accordance with one embodiment of the present
invention;
[0006] FIG. 2 illustrates the semiconductor device of FIG. 1 taken
along line 2-2;
[0007] FIG. 3 illustrates a bottom view of a semiconductor device,
in accordance with one embodiment of the present invention;
[0008] FIG. 4 illustrates a bottom view of a semiconductor device,
in accordance with another embodiment of the present invention;
and
[0009] FIG. 5 illustrates a cross-sectional view of a semiconductor
device, in accordance with one embodiment of the present
invention;
[0010] FIG. 6 illustrates a cross-sectional view of a semiconductor
device, in accordance with another embodiment of the present
invention; and
[0011] FIG. 7 illustrates a bottom plan view of a semiconductor
device, in accordance with another embodiment of the present
invention.
[0012] Skilled artisans appreciate that elements in the figures are
illustrated for simplicity and clarity and have not necessarily
been drawn to scale. For example, the dimensions of some of the
elements in the figures may be exaggerated relative to other
elements to help improve the understanding of the embodiments of
the present invention.
DETAILED DESCRIPTION OF THE DRAWINGS
[0013] There is disclosed herein an improved encapsulant bleed
prevention technique that prevents molding material from permeating
an active region of a semiconductor die. In one embodiment, a
semiconductor device includes a semiconductor die, a plurality of
contact pads, an encapsulant barrier, a first layer, a second
layer, and an encapsulant. The semiconductor die has a first
surface and a second surface that are opposite each other. The
first surface of the semiconductor die has a plurality of contact
pad sites. Each of the plurality of contact pads have substantially
the same predetermined height and have a first end and a second
end. The first end of each of the plurality of contact pads is in
electrical contact with a predetermined corresponding different one
of the plurality of contact pad sites. The encapsulant barrier is
positioned at a periphery of the plurality of contact pads and has
substantially the same predetermined height of the plurality of
contact pads. The encapsulant barrier is in physical contact with
the first surface of the semiconductor die. The first layer has a
first surface and a second surface, the first surface of the first
layer being in direct physical contact with the second end of each
of the plurality of contact pads. The second layer is in direct
physical contact with the first layer. The encapsulant surrounds
the second surface of the semiconductor die and is blocked from
making physical contact with any of the plurality of contact pads
by the encapsulant barrier. The first layer and the second layer
are releasable from the semiconductor die after curing of the
encapsulant. In one form the encapsulant barrier is a same material
as the plurality of contact pads. In another form the encapsulant
barrier is a different material than the plurality of contact
pads.
[0014] In one embodiment, a semiconductor device includes a
semiconductor die, a plurality of contact pads, an encapsulant
barrier, a removable first layer, a second removable layer, and an
encapsulant. The semiconductor die has a plurality of contact pad
sites. The plurality of contact pads are in electrical contact with
a predetermined corresponding different one of the plurality of
contact pad sites. The encapsulant barrier is positioned at an
outer perimeter of the semiconductor die. The encapsulant barrier
has a height that is substantially as large as a highest of the
plurality of contact pads. The encapsulant barrier is in physical
contact with a same surface of the semiconductor die as the contact
pad sites. The removable first layer has a first surface and a
second surface. The first surface of the first layer is in direct
physical contact with each of the plurality of contact pads. The
second removable layer is in direct physical contact with the first
removable layer. The encapsulant surrounds the semiconductor die
but is blocked from making physical contact with any of the
plurality of contact pads by the encapsulant barrier. The first
layer and the second layer are removed from the semiconductor die
after curing of the encapsulant.
[0015] In one embodiment, a semiconductor device includes a
semiconductor die, a plurality of contact pads, an encapsulant
barrier, and an encapsulant. The semiconductor die has a plurality
of contact pad sites. The plurality of contact pads are in
electrical contact with a predetermined corresponding different one
of the plurality of contact pad sites. The encapsulant barrier is
positioned at an outer perimeter of the semiconductor die. The
encapsulant barrier has a height that is as high as or greater than
a highest of the plurality of contact pads. The encapsulant barrier
is in physical contact with a same surface of the semiconductor die
as the contact pad sites. The encapsulant surrounds the
semiconductor die and one side of the encapsulant barrier. The
encapsulant is blocked from making physical contact with any of the
plurality of contact pads by the encapsulant barrier when the
device is encapsulated while being supported by a temporary base
support layer.
[0016] Another embodiment of the present invention relates to a
method of protecting a semiconductor die during encapsulation. A
plurality of contact pad sites is provided on a side of the
semiconductor die. A plurality of contact pads are formed within
the plurality of contact pad sites. Each of the plurality of
contact pads have substantially the same predetermined height and
have a first end and a second end. The first end of each of the
plurality of contact pads are in electrical contact with a
predetermined corresponding different one of the plurality of
contact pad sites. An encapsulant barrier is provided at a
periphery of the plurality of contact pads. The encapsulant barrier
has substantially the same predetermined height of the plurality of
contact pads. The encapsulant barrier is in physical contact with
the first surface of the semiconductor die. A first layer is
provided having a first surface and a second surface. The first
surface of the first layer is in direct physical contact with the
second end of each of the plurality of contact pads. A second layer
is provided that is in direct physical contact with the first
layer. The second surface of the semiconductor die is encapsulated
and the encapsulant is blocked from making physical contact with
any of the plurality of contact pads by the encapsulant barrier.
The first layer and the second layer are removed from the
semiconductor die after the encapsulant has cured.
[0017] FIG. 1 illustrates a semiconductor device 10 according to
one embodiment of the present invention. Semiconductor device 10
includes a base layer 12, an adhesive layer 14, a semiconductor die
16, an encapsulant barrier 18, a contact pad 20, a contact pad 21,
a contact pad 22, a contact pad 23, a contact pad 24, a contact pad
25, a contact pad 26, an active surface 28, and an encapsulant
30.
[0018] In one embodiment of the present invention, adhesive layer
14 may be formed of any material that is adhesive. In one form,
adhesive layer 14 is a tape having an adhesive surface in contact
with contact pads 20-26. In another form, adhesive layer 14 is a
silicone or acrylic-based material. For some embodiments, adhesive
layer 14 may be removed, for example, if the adhesive layer 14 is
an adhesive tape.
[0019] In one embodiment of the present invention, encapsulant 30
may be any type of non-electrically conductive material that can be
molded, such as, for example, thermoset mold compounds or filled
thermoplastic resins which act as insulating materials. In
alternate embodiments of the present invention, encapsulant 30 may
be any type of electrically conductive material that can be molded,
such as, for example, thermoset epoxy with metallic filler or
thermoplastic with metallic filler. The metallic filler may be any
suitable electrically conductive material, such as, for example,
silver, copper, electrically conductive coated polymer spheres, and
conductive nano-particles. The metallic filler may be in particle
form. In one embodiment, encapsulant barrier 18 may be formed of
metal, such as aluminum, copper, aluminum alloys, copper alloys,
etc. In another embodiment, encapsulant barrier 18 may be
polyimide, or other organic base passivation materials.
[0020] During the semiconductor manufacturing process, contact pads
20-26 and encapsulant barrier 18 are formed on active region 28 of
semiconductor die 16 using standard metallization techniques, such
as, for example, an additive plating technique or a subtractive
etching technique. In the embodiment, active region 28 includes a
plurality of contact pads 20-26 and the corresponding air gaps
(spaces) located between contact pads 20-26. Alternate embodiments
of the present invention may include a greater or lesser number of
contact pads then those shown in FIG. 1. In the illustrated
embodiment, active region 28 excludes the portion of the
semiconductor die 16 outside of encapsulation barrier 18. In
alternate embodiments, active region 28 may include other portions
of semiconductor die 16 within other encapsulation barriers. In one
embodiment, active region 28 of semiconductor die 16 is adhesively
coupled to adhesive layer 14. In addition, adhesive layer 14 is
adhesively coupled to base layer 12 in such a fashion that both the
adhesive layer 14 and base layer 12 may be removed.
[0021] For ease of explanation, semiconductor 16 has been separated
into several portions: a top portion 17, a side portion 13, a side
portion 15, a partial-bottom portion 11, a partial-bottom portion
9, and a bottom surface 29. Top portion 17, side portion 13, side
portion 15, partial-bottom portion 11, and partial-bottom portion 9
of semiconductor die 16 are encapsulated up to encapsulant barrier
18 using encapsulant 30. Encapsulant 30 may be provided using any
appropriate encapsulating method, such as, for example, dispense,
injection or transfer molding, screen printing or extrusion
coating. Encapsulant barrier 18 when in contact with adhesive layer
14 acts as a barrier to prevent encapsulant 30 from bleeding onto
active region 28. In one embodiment, after encapsulation occurs,
adhesive layer 14 and base layer 12 are removed allowing contact
pads 20-26 to be available conductors free of encapsulant 30.
[0022] As stated previously, the use of encapsulation barrier 18
prevents encapsulant 30 from bleeding onto or permeating active
region 28 of semiconductor die 16. In one embodiment, encapsulation
barrier 18 may be located at several locations on semiconductor die
16, such that encapsulation barrier 18 surrounds a region or
regions of semiconductor die 16 (active or non-active), that are to
remain free of encapsulant 30. For example, in one embodiment
encapsulation barrier 18 may be located around the perimeter of
semiconductor device 16 such that encapsulation barrier 18 is in
the form of a ring. Alternatively, encapsulation barrier 18 may
take the form of shapes other than a ring. For example, in one
embodiment encapsulation barrier 18 may be in the form of a spiral,
spiraling around contact pads that are to remain free of
encapsulant 30.
[0023] The height of encapsulation barrier 18 may vary depending on
the height of contact pads 20-26 being used by semiconductor device
10. In one embodiment, the height of the encapsulant barrier 18
must be at least the height of the contact pad of contact pads
20-26 that has the maximum height. That is, the height of contact
pads 20-26 may vary, but as long as the height of encapsulation
barrier 18 is at least the height of the contact pad with the
maximum height, encapsulation barrier 18 will prevent encapsulant
30 from permeating beyond encapsulant barrier 18.
[0024] Encapsulation barrier 18 may be formed at different times
within the semiconductor manufacturing process. The exact time when
encapsulation barrier 18 is formed varies depending on the
metallization process, panelization process, etc., being used to
manufacture semiconductor device 10. For example, encapsulant
barrier 18 may be formed using redistribution metal added to
semiconductor die 16.
[0025] FIG. 2 illustrates a bottom view of semiconductor device 10
depicted in FIG. 1. In the embodiment shown, encapsulant barrier 18
is positioned along the outer edges of semiconductor die 16
surrounding the contact pads, such as contact pads 20-26.
Encapsulant barrier 18 prevents encapsulant 30 of FIG. 1 from
bleeding into active region 28 of FIG. 1.
[0026] FIG. 3 illustrates a semiconductor device 32 according to
one embodiment of the present invention. Semiconductor device 32
may be manufactured according to the manufacturing processes
described earlier in the description of FIG. 1. An encapsulation
barrier 36 is located on semiconductor die 34. Encapsulation
barrier 36 surrounds the contact pads such as contact pad 38. In
one embodiment, encapsulation barrier 36 is in the form of a spiral
having a height substantially equivalent to the tallest of the
contact pads, such as contact pad 38, as measured from the die
surface. Encapsulation barrier 36 has a vent opening 33 which
allows for expanding gases to be released out of active region 35
while preventing encapsulant 30 of FIGS. 1 and 2 from entering
active region 35.
[0027] FIG. 4 illustrates a semiconductor device 40 according to
one embodiment of the present invention. Semiconductor device 40
includes semiconductor die 42, a plurality of contact pads such as
contact pad 55, encapsulation barrier 44, active region 57, vent
49, vent 51, vent 56, and vent 59. In one embodiment, semiconductor
device 40 includes several variations of ventilation, such as, for
example, venting portion 48, venting portion 54, venting portion
58, and venting portion 50. Each venting portion 48, 54 and 58 is
illustrated in FIG. 4 by a dashed line solely for purposes of
illustration and does not indicate a hidden underlying structure.
Each venting portion allows for expanding gases to be circulated
out of active region 57 while preventing encapsulant 30 of FIGS. 1
and 2 from entering active region 57. In one embodiment,
encapsulation barrier 45 is placed parallel to the portion of
encapsulation barrier 44 having vent 56. In another embodiment,
encapsulation barrier 47 is placed inside active region 57 and
parallel to the portion of encapsulation barrier 44 having vent 51.
In one embodiment, venting portion 48 takes the shape of an
elongated staple having a portion of encapsulation barrier 44 fit
into its opening. Other embodiments of ventilating portions may
exist that take the form of the ventilating portions shown or not
shown.
[0028] FIG. 5 illustrates a semiconductor device 60 according to
one embodiment of the present invention. In one embodiment,
semiconductor device 60 includes a base layer 62, an adhesive layer
64, a semiconductor die 66, an encapsulant barrier 80, a contact
pad 71, a contact pad 72, a contact pad 73, a contact pad 74, a
contact pad 75, a contact pad 76, and a contact pad 77.
Semiconductor device 60 further includes an active region 67, and a
passivation layer having a passivation layer portion 101, a
passivation layer portion 102, a passivation layer portion 103, a
passivation layer portion 104, a passivation layer portion 105, a
passivation layer portion 106, a passivation layer portion 107, a
passivation layer portion 108 and a passivation layer portion 109.
Semiconductor device 60 also includes an encapsulant 86 and an air
gap 84.
[0029] In one embodiment of semiconductor device 60 illustrated in
FIG. 5, adhesive layer 64 may be formed of any material that is
adhesive. In one embodiment, adhesive layer 64 is a tape having an
adhesive surface in contact with contact pads 71-77. In an
alternate embodiment, adhesive layer 64 may be an epoxy based
material. For some embodiments of the present invention, adhesive
layer 64 may be removed, for example, if the adhesive layer 64 is
an adhesive tape.
[0030] In some embodiments of the present invention, encapsulant 86
may be any type of non-electrically conductive material that can be
molded, such as, for example, thermoset mold compounds or filled
thermoplastic resins which act as insulating materials. In
alternate embodiments of the present invention, encapsulant 30 may
be any type of electrically conductive material that can be molded,
such as, for example, thermoset epoxy with metallic filler or
thermoplastic with metallic filler. The metallic filler may be any
suitable electrically conductive material, such as, for example,
silver, copper, electrically conductive coated polymer spheres, and
conductive nano-particles. The metallic filler may be in particle
form. In one embodiment, encapsulant barrier 80 may be formed of
metal, such as aluminum, copper, aluminum alloys, copper alloys,
etc. In another embodiment, encapsulant barrier 80 may be
polyimide, or other organic base passivation materials.
[0031] Referring to semiconductor device 60, during the
manufacturing process, the passivation layer formed of portions
101-109 is formed on semiconductor die 66. In one embodiment,
contact pads 71-77 and encapsulant barrier 80 are formed on active
region 67 of semiconductor die 66 using any one of various
metallization techniques known in the art. In one embodiment, the
passivation layer formed of portions 101-109 is interposed between
contact pads 71-77 and the bottom surface 68 of semiconductor die
66. An air gap 84 surrounds contact pads 71-77. The air gap 84 is
enclosed within encapsulant barrier 80 and between adhesive layer
64 and the passivation layer formed of portions 101-109. Alternate
embodiments of the present invention may include a greater or
lesser number of contact pads in active region 67. In the
illustrated embodiment, active region 67 may be considered the
bottom of semiconductor die 66, excluding the portions of the
semiconductor die 66 outside of encapsulant barrier 80. In
alternate embodiments, active region 67 may include other portions
of semiconductor die 66 within encapsulant barrier 80. In one
embodiment, active region 67 of semiconductor die 66 is adhesively
coupled to adhesive layer 64. In addition, adhesive layer 64 is
adhesively coupled to base layer 62 which allows adhesive layer 64
and base layer 62 to be removed.
[0032] For ease of explanation, semiconductor 60 has been separated
into several portions: a top portion 87, a side portion 88, a side
portion 89, a partial-bottom portion 83, and a partial-bottom 85.
Top portion 87, side portion 88, side portion 89, partial-bottom
portion 83, and partial-bottom portion 85 of semiconductor die 66
are encapsulated up to encapsulant barrier 80 using encapsulant 86.
Encapsulant 86 is provided using any appropriate encapsulating
method, such as, for example, injection molding or transfer
molding. Other methods of encapsulation may alternately be used,
such as, for example, dispense molding, screen printing or
extrusion coating. In one embodiment, encapsulant barrier 80 acts
as a barrier to prevent encapsulant 86 from bleeding onto active
region 67. It should be noted that in the embodiment of FIG. 5 that
encapsulant barrier 80 laps over the edge of the passivation layer
having portions 101-109 so that a portion of the encapsulant
barrier 80 is in direct contact with die surface 68 while the other
portion of encapsulant barrier 80 is located entirely between the
passivation layer formed of portions 101-109 and the adhesive layer
64. Adhesive layer 64 and base layer 62 may then be removed
allowing contact pads 71-77 to be available as contact pads free of
encapsulant 86.
[0033] FIG. 6 illustrates semiconductor device 60 according to one
embodiment of the present invention. In one embodiment shown in
FIG. 6, encapsulant barrier 80 of FIG. 5 has been replaced with
encapsulant barrier 82, the entire portion of which is located
entirely between the passivation layer having portions 101-109 and
the adhesive layer 64, thereby forming a seal. The description of
the semiconductor device 60 of FIG. 5 applies to the description of
semiconductor device 60 of FIG. 6 and will not be discussed further
in detail.
[0034] FIG. 7 illustrates a bottom plan view of a semiconductor
device 90 according to one embodiment of the present invention.
Semiconductor device 90 includes a semiconductor die 95, a circuit
94, an active region 98, an encapsulation barrier 92, and a
conductor 96. Circuit 94 may be positioned in any area of the
semiconductor die 95 and may be of any size. It should be
understood that as illustrated FIG. 7 is not necessarily drawn to
scale. In one embodiment, conductor 96 provides conductive
connection between circuit 94 and encapsulation barrier 92. In
addition, encapsulation barrier 92 serves not only to prevent
encapsulant material 30 of FIGS. 1 and 2 from bleeding onto active
region 98, but may also serve as a conductor to propagate or shield
electrical signals. In one embodiment, encapsulant barrier 92 may
be used as an electrical shield for circuit 94 to isolate
electromagnetic interference. In another embodiment, encapsulant
barrier 92 may be electrically coupled to circuit 94 and used to
implement an electrical function in the circuit. For example, in
one embodiment encapsulant barrier 92 may be used as an antenna. In
another embodiment, encapsulant barrier 92 may implement the
electrical function of an inductor.
[0035] In the foregoing specification, the invention has been
described with reference to specific embodiments. However, one of
ordinary skill in the art appreciates that various modifications
and changes can be made without departing from the scope of the
present invention as set forth in the claims below. Accordingly,
the specification and figures are to be regarded in an illustrative
rather than a restrictive sense, and all such modifications are
intended to be included within the scope of present invention.
[0036] Benefits, other advantages, and solutions to problems have
been described above with regard to specific embodiments. However,
the benefits, advantages, solutions to problems, and any element(s)
that may cause any benefit, advantage, or solution to occur or
become more pronounced are not to be construed as a critical,
required, or essential feature or element of any or all the claims.
As used herein, the terms "comprises," "comprising," or any other
variation thereof, are intended to cover a non-exclusive inclusion,
such that a process, method, article, or apparatus that comprises a
list of elements does not include only those elements but may
include other elements not expressly listed or inherent to such
process, method, article, or apparatus. The terms a or an, as used
herein, are defined as one or more than one. The term plurality, as
used herein, is defined as two or more than two. The term another,
as used herein, is defined as at least a second or more. The terms
including and/or having, as used herein, are defined as comprising
(i.e., open language). The term coupled, as used herein, is defined
as connected, although not necessarily directly, and not
necessarily mechanically. The term substantially, as used herein,
is defined as at least approaching a given state or value (e.g.,
preferably within 10% of).
* * * * *