| Patent | Date |
|---|
Programmable stitch chaining of die-level interconnects for reliability testing
Grant 10,424,521 - Leal Sept | 2019-09-24 |
Matrix Lid Heatspreader for Flip Chip Package
App 20160005682 - Leal; George R. ; et al. | 2016-01-07 |
Programmable Stitch Chaining Of Die-level Interconnects For Reliability Testing
App 20150332980 - Leal; George R. | 2015-11-19 |
Matrix lid heatspreader for flip chip package
Grant 9,159,643 - Leal , et al. October 13, 2 | 2015-10-13 |
Method for singulating electronic components from a substrate
Grant 9,142,434 - Gao , et al. September 22, 2 | 2015-09-22 |
Warp compensated electronic assemblies
Grant 9,107,303 - Lytle , et al. August 11, 2 | 2015-08-11 |
Methods and structures for reducing stress on die assembly
Grant 8,970,026 - Leal , et al. March 3, 2 | 2015-03-03 |
Warp Compensated Electronic Assemblies
App 20140369015 - LYTLE; WILLIAM H. ; et al. | 2014-12-18 |
Recovery method for poor yield at integrated circuit die panelization
Grant 8,877,523 - Leal November 4, 2 | 2014-11-04 |
Warp compensated package and method
Grant 8,829,661 - Lytle , et al. September 9, 2 | 2014-09-09 |
Methods And Structures For Reducing Stress On Die Assembly
App 20140225268 - LEAL; GEORGE R. ; et al. | 2014-08-14 |
Matrix Lid Heatspreader for Flip Chip Package
App 20140077352 - Leal; George R. ; et al. | 2014-03-20 |
Fused buss for plating features on a semiconductor die
Grant 8,368,172 - Leal , et al. February 5, 2 | 2013-02-05 |
Fused Buss For Plating Features On A Semiconductor Die
App 20130023091 - Leal; George R. ; et al. | 2013-01-24 |
Fused Buss For Plating Features On A Semiconductor Die
App 20130020674 - LEAL; GEORGE R. ; et al. | 2013-01-24 |
Fused buss for plating features on a semiconductor die
Grant 8,349,666 - Leal , et al. January 8, 2 | 2013-01-08 |
Recovery Method For Poor Yield At Integrated Circuit Die Panelization
App 20120329212 - Leal; George R. | 2012-12-27 |
Method of forming a packaged semiconductor device
Grant 8,216,918 - Gong , et al. July 10, 2 | 2012-07-10 |
Method Of Forming A Packaged Semiconductor Device
App 20120021565 - Gong; Zhiwei ; et al. | 2012-01-26 |
Circuit device with at least partial packaging and method for forming
Grant 8,072,062 - Leal , et al. December 6, 2 | 2011-12-06 |
Method For Singulating Electronic Components From A Substrate
App 20110217814 - Gao; Wei ; et al. | 2011-09-08 |
Method for controlling warpage in redistributed chip packaging panels
Grant 7,950,144 - Ramanathan , et al. May 31, 2 | 2011-05-31 |
Methods and apparatus for a semiconductor device package with improved thermal performance
Grant 7,892,882 - Leal , et al. February 22, 2 | 2011-02-22 |
Method Of Packaging Integrated Circuit Dies With Thermal Dissipation Capability
App 20100148357 - Yang; Liyu ; et al. | 2010-06-17 |
Method For Controlling Warpage In Redistributed Chip Packaging Panels
App 20090271980 - Ramanathan; Lakshmi N. ; et al. | 2009-11-05 |
Semiconductor device with a protected active die region and method therefor
Grant 7,579,219 - Leal , et al. August 25, 2 | 2009-08-25 |
Method of forming crack arrest features in embedded device build-up package and package thereof
Grant 7,553,753 - Zhao , et al. June 30, 2 | 2009-06-30 |
Fine pitch interconnect and method of making
Grant 7,528,069 - Wenzel , et al. May 5, 2 | 2009-05-05 |
Methods and apparatus for thermal management in a multi-layer embedded chip structure
Grant 7,405,102 - Lee , et al. July 29, 2 | 2008-07-29 |
Circuit Device With At Least Partial Packaging And Method For Forming
App 20080142960 - Leal; George R. ; et al. | 2008-06-19 |
Circuit device with at least partial packaging and method for forming
Grant 7,361,987 - Leal , et al. April 22, 2 | 2008-04-22 |
Method Of Forming Crack Arrest Features In Embedded Device Build-up Package And Package Thereof
App 20080057696 - Zhao; Jie-Hua ; et al. | 2008-03-06 |
Methods and apparatus for a semiconductor device package with improved thermal performance
App 20070284704 - Leal; George R. ; et al. | 2007-12-13 |
Methods and apparatus for thermal management in a multi-layer embedded chip structure
App 20070284711 - Lee; Tien Yu T. ; et al. | 2007-12-13 |
Semiconductor device having a bond pad and method therefor
Grant 7,271,013 - Yong , et al. September 18, 2 | 2007-09-18 |
Warp compensated package and method
App 20070210427 - Lytle; William H. ; et al. | 2007-09-13 |
Perforated embedded plane package and method
App 20070212813 - Fay; Owen R. ; et al. | 2007-09-13 |
Fine pitch interconnect and method of making
App 20070102828 - Wenzel; Robert J. ; et al. | 2007-05-10 |
Semiconductor device with a protected active die region and method therefor
App 20060192301 - Leal; George R. ; et al. | 2006-08-31 |
Circuit device with at least partial packaging and method for forming
App 20060012036 - Leal; George R. ; et al. | 2006-01-19 |
Semiconductor device with a protected active die region and method therefor
App 20050242425 - Leal, George R. ; et al. | 2005-11-03 |
Circuit device with at least partial packaging, exposed active surface and a voltage reference plane
Grant 6,921,975 - Leal , et al. July 26, 2 | 2005-07-26 |
Semiconductor device having a bond pad and method therefor
App 20050098903 - Yong, Loise E. ; et al. | 2005-05-12 |
Semiconductor device having a bond pad and method therefor
Grant 6,844,631 - Yong , et al. January 18, 2 | 2005-01-18 |
Circuit device with at least partial packaging and method for forming
Grant 6,838,776 - Leal , et al. January 4, 2 | 2005-01-04 |
Circuit device with at least partial packaging and method for forming
App 20040207068 - Leal, George R. ; et al. | 2004-10-21 |
Circuit device with at least partial packaging and method for forming
App 20040207077 - Leal, George R. ; et al. | 2004-10-21 |
Semiconductor device having a bond pad and method therefor
App 20030173667 - Yong, Lois E. ; et al. | 2003-09-18 |
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