U.S. patent application number 10/910454 was filed with the patent office on 2005-05-19 for wire bonding process for copper-metallized integrated circuits.
Invention is credited to Amador, Gonzalo, Subido, Willmar E., Test, Howard R..
Application Number | 20050106851 10/910454 |
Document ID | / |
Family ID | 22708278 |
Filed Date | 2005-05-19 |
United States Patent
Application |
20050106851 |
Kind Code |
A1 |
Test, Howard R. ; et
al. |
May 19, 2005 |
Wire bonding process for copper-metallized integrated circuits
Abstract
A robust, reliable and low-cost metal structure and process
enabling electrical wire/ribbon connections to the interconnecting
copper metallization of integrated circuits. The structure
comprises a layer of barrier metal that resists copper diffusion,
deposited on the non-oxidized copper surface in a thickness such
that the barrier layer reduces the diffusion of copper at
250.degree. C. by more than 80% compared with the absence of the
barrier metal. The structure further comprises an outermost
bondable layer which reduces the diffusion of the barrier metal at
250.degree. C. by more than 80% compared with the absence of the
bondable metal. Finally, a metal wire is bonded to the outermost
layer for metallurgical connection. The barrier metal is selected
from a group consisting of nickel, cobalt, chromium, molybdenum,
titanium, tungsten, and alloys thereof. The outermost bondable
metal layer is selected from a group consisting of gold, platinum,
and silver.
Inventors: |
Test, Howard R.; (Plano,
TX) ; Amador, Gonzalo; (Dallas, TX) ; Subido,
Willmar E.; (Garland, TX) |
Correspondence
Address: |
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS
TX
75265
|
Family ID: |
22708278 |
Appl. No.: |
10/910454 |
Filed: |
August 4, 2004 |
Related U.S. Patent Documents
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Application
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Filing Date |
Patent Number |
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10910454 |
Aug 4, 2004 |
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09817696 |
Mar 23, 2001 |
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6800555 |
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60192108 |
Mar 24, 2000 |
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Current U.S.
Class: |
438/613 ;
257/E21.174; 257/E21.508; 257/E23.02; 438/615; 438/617 |
Current CPC
Class: |
H01L 2224/05624
20130101; H01L 2924/01047 20130101; H01L 2924/05042 20130101; H01L
2924/20753 20130101; H01L 2924/3025 20130101; H01L 2224/0518
20130101; H01L 2224/4845 20130101; H01L 2924/01042 20130101; H01L
23/53238 20130101; H01L 2224/48847 20130101; H01L 2924/01013
20130101; H01L 2924/20752 20130101; H01L 2224/05556 20130101; H01L
2224/48647 20130101; H01L 2224/48747 20130101; H01L 2924/014
20130101; H01L 2224/05669 20130101; H01L 24/05 20130101; H01L
2224/05184 20130101; H01L 2224/05647 20130101; H01L 2224/48624
20130101; H01L 2924/01028 20130101; H01L 2924/10253 20130101; H01L
2224/05147 20130101; H01L 2224/4878 20130101; H01L 2224/48864
20130101; H01L 24/03 20130101; H01L 2224/05639 20130101; H01L
2224/05664 20130101; H01L 2224/4868 20130101; H01L 2224/48463
20130101; H01L 2224/4888 20130101; H01L 2224/85201 20130101; H01L
2224/48655 20130101; H01L 2224/78253 20130101; H01L 2924/01078
20130101; H01L 21/288 20130101; H01L 23/53233 20130101; H01L
2224/05164 20130101; H01L 2224/48839 20130101; H01L 2224/85205
20130101; H01L 2924/01014 20130101; H01L 2924/01074 20130101; H01L
24/45 20130101; H01L 2924/01029 20130101; H01L 2224/05111 20130101;
H01L 2224/45144 20130101; H01L 2224/48669 20130101; H01L 2224/48769
20130101; H01L 2224/85203 20130101; H01L 2924/01076 20130101; H01L
2924/01073 20130101; H01L 2924/20751 20130101; H01L 2224/48855
20130101; H01L 2924/00014 20130101; H01L 2924/01327 20130101; H01L
2924/04953 20130101; H01L 2224/05166 20130101; H01L 2224/48639
20130101; H01L 2224/45147 20130101; H01L 2924/01022 20130101; H01L
2924/0105 20130101; H01L 2224/48764 20130101; H01L 24/85 20130101;
H01L 2224/48844 20130101; H01L 2224/85013 20130101; H01L 2924/19043
20130101; H01L 2224/05171 20130101; H01L 2224/48644 20130101; H01L
2924/01027 20130101; H01L 2924/04941 20130101; H01L 2224/48755
20130101; H01L 2924/14 20130101; H01L 2224/0568 20130101; H01L
2224/48724 20130101; H01L 2924/01075 20130101; H01L 2224/48739
20130101; H01L 2224/04042 20130101; H01L 2224/05082 20130101; H01L
2924/01006 20130101; H01L 2224/45124 20130101; H01L 2924/01024
20130101; H01L 2224/45015 20130101; H01L 24/48 20130101; H01L
2224/05157 20130101; H01L 2224/05644 20130101; H01L 2224/45014
20130101; H01L 2924/01005 20130101; H01L 2224/05155 20130101; H01L
2224/05655 20130101; H01L 2224/48664 20130101; H01L 2224/78252
20130101; H01L 2924/01079 20130101; H01L 2224/45124 20130101; H01L
2924/00014 20130101; H01L 2224/45144 20130101; H01L 2924/00014
20130101; H01L 2224/45147 20130101; H01L 2924/00014 20130101; H01L
2224/48463 20130101; H01L 2924/00014 20130101; H01L 2224/05644
20130101; H01L 2924/01004 20130101; H01L 2224/45015 20130101; H01L
2924/20753 20130101; H01L 2224/45015 20130101; H01L 2924/20752
20130101; H01L 2224/45015 20130101; H01L 2924/20751 20130101; H01L
2924/00014 20130101; H01L 2224/78 20130101; H01L 2224/45014
20130101; H01L 2224/45124 20130101; H01L 2924/00 20130101; H01L
2224/85205 20130101; H01L 2224/45147 20130101; H01L 2924/00
20130101; H01L 2224/85205 20130101; H01L 2224/45144 20130101; H01L
2924/00 20130101; H01L 2224/85205 20130101; H01L 2224/45124
20130101; H01L 2924/00 20130101; H01L 2224/48824 20130101; H01L
2924/00 20130101; H01L 2224/48839 20130101; H01L 2924/00 20130101;
H01L 2224/48844 20130101; H01L 2924/00 20130101; H01L 2224/48847
20130101; H01L 2924/00 20130101; H01L 2224/48855 20130101; H01L
2924/00 20130101; H01L 2224/48864 20130101; H01L 2924/00 20130101;
H01L 2224/48869 20130101; H01L 2924/00 20130101; H01L 2224/48624
20130101; H01L 2924/00 20130101; H01L 2224/48644 20130101; H01L
2924/00 20130101; H01L 2224/48647 20130101; H01L 2924/00 20130101;
H01L 2224/48655 20130101; H01L 2924/00 20130101; H01L 2224/48664
20130101; H01L 2924/00 20130101; H01L 2224/48669 20130101; H01L
2924/00 20130101; H01L 2224/48724 20130101; H01L 2924/00 20130101;
H01L 2224/48744 20130101; H01L 2924/00 20130101; H01L 2224/48747
20130101; H01L 2924/00 20130101; H01L 2224/48739 20130101; H01L
2924/00 20130101; H01L 2224/48755 20130101; H01L 2924/00 20130101;
H01L 2224/48764 20130101; H01L 2924/00 20130101; H01L 2224/48769
20130101; H01L 2924/00 20130101; H01L 2224/4878 20130101; H01L
2924/00 20130101; H01L 2224/48639 20130101; H01L 2924/00 20130101;
H01L 2224/4868 20130101; H01L 2924/00 20130101; H01L 2224/45014
20130101; H01L 2224/45144 20130101; H01L 2924/00 20130101; H01L
2224/45014 20130101; H01L 2224/45147 20130101; H01L 2924/00
20130101; H01L 2224/4888 20130101; H01L 2924/00 20130101; H01L
2224/85203 20130101; H01L 2924/00 20130101; H01L 2924/00014
20130101; H01L 2224/45014 20130101; H01L 2924/206 20130101 |
Class at
Publication: |
438/613 ;
438/615; 438/617 |
International
Class: |
H01L 021/44 |
Claims
1. A structure for metallurgical connections between metal wires
and bond pads positioned on integrated circuits having copper
interconnecting metallization, comprising: a bond pad surface of
non-oxidized copper; a layer of barrier metal that resists copper
diffusion deposited on said copper surface, said barrier metal and
the thickness thereof coordinated such that said layer reduces the
diffusion of copper at 250.degree. C. by more than 80% compared
with the absence of such barrier metal; an outermost layer of
bondable metal, coordinated with thickness thereof such that said
outermost layer reduces the diffusion of said barrier metal at
250.degree. C. by more than 80% compared with the absence of said
bondable metal; and one of said metal wires bonded to said
outermost bondable metal.
2. The structure according to claim 1 wherein said barrier metal
layer is selected from a group consisting of nickel, cobalt,
chromium, molybdenum, titanium, tungsten, and alloys thereof.
3. The structure according to claim 1 wherein said bondable metal
layer is selected from a group consisting of gold, platinum,
palladium, and silver.
4. The structure according to claim 1 further comprising a thin
seed metal layer between said non-oxidized copper and said barrier
metal layer.
5. The structure of claim 4 wherein said seed metal is palladium or
tin.
6. The structure according to claim 1 wherein said metal wires are
selected from a group consisting of gold, copper, aluminum, and
alloys thereof.
7-15. (canceled)
Description
BACKGROUND OF THE INVENTION
[0001] The present invention is related in general to the field of
semiconductor devices and processes and more specifically to the
process of wire bonding to bond pads of copper-metallized
integrated circuits.
DESCRIPTION OF THE RELATED ART
[0002] In integrated circuits (IC) technology, pure or doped
aluminum has been the metallization of choice for interconnection
and bond pads for more than four decades. Main advantages of
aluminum include easy of deposition and patterning. Further, the
technology of bonding wires made of gold, copper, or aluminum to
the aluminum bond pads has been developed to a high level of
automation, miniaturization, and reliability. Examples of the high
technical standard of wire bonding to aluminum can be found in U.S.
Pat. No. 5,455,195, issued on Oct. 3, 1995 (Ramsey et al., "Method
for Obtaining Metallurgical Stability in Integrated Circuit
Conductive Bonds"); U.S. Pat. No. 5,244,140, issued on Sep. 14,
1993 (Ramsey et al., "Ultrasonic Bonding Process Beyond 125 kHz");
U.S. Pat. No. 5,201,454, issued on Apr. 13, 1993 (Alfaro et al.,
"Process for Enhanced Intermetallic Growth in IC
Interconnections"); and U.S. Pat. No. 5,023,697, issued on Jun. 11,
1991 (Tsumura, "Semiconductor Device with Copper Wire Ball
Bonding").
[0003] In the continuing trend to miniaturize the ICs, the RC time
constant of the interconnection between active circuit elements
increasingly dominates the achievable IC speed-power product.
Consequently, the relatively high resistivity of the
interconnecting aluminum now appears inferior to the lower
resistivity of metals such as copper. Further, the pronounced
sensitivity of aluminum to electromigration is becoming a serious
obstacle. Consequently, there is now a strong drive in the
semiconductor industry to employ copper as the preferred
interconnecting metal, based on its higher electrical conductivity
and lower electromigration sensitivity. From the standpoint of the
mature aluminum interconnection technology, however, this shift to
copper is a significant technological challenge.
[0004] Copper has to be shielded from diffusing into the silicon
base material of the ICs in order to protect the circuits from the
carrier lifetime killing characteristic of copper atoms positioned
in the silicon lattice. For bond pads made of copper, the formation
of thin copper(I)oxide films during the manufacturing process flow
has to be prevented, since these films severely inhibit reliable
attachment of bonding wires, especially for conventional gold-wire
ball bonding. In contrast to aluminum oxide films overlying
metallic aluminum, copper oxide films overlying metallic copper
cannot easily be broken by a combination of thermocompression and
ultrasonic energy applied in the bonding process. As further
difficulty, bare copper bond pads are susceptible to corrosion.
[0005] In order to overcome these problems, a process has been
disclosed to cap the clean copper bond pad with a layer of aluminum
and thus re-construct the traditional situation of an aluminum pad
to be bonded by conventional gold-wire ball bonding. A suitable
bonding process is described in U.S. Pat. No. 5,785,236, issued on
Jul. 28, 1998 (Cheung et al., "Advanced Copper Interconnect System
that is Compatible with Existing IC Wire Bonding Technology"). The
described approach, however, has several shortcomings.
[0006] First, the fabrication cost of the aluminum cap is higher
than desired, since the process requires additional steps for
depositing metal, patterning, etching, and cleaning. Second, the
cap must be thick enough to prevent copper from diffusing through
the cap metal and possibly poisoning the IC transistors. Third, the
aluminum used for the cap is soft and thus gets severely damaged by
the markings of the multiprobe contacts in electrical testing. This
damage, in turn, becomes so dominant in the ever decreasing size of
the bond pads that the subsequent ball bond attachment is no longer
reliable.
[0007] A low-cost structure and method for capping the copper bond
pads of copper-metallized ICs has been disclosed on U.S. patent
application No. 60/183,405, filed on 18 Feb. 2000. The present
invention is related to that application. An urgent need has arisen
for a reliable method of bonding wires to capped bond pads which
combines minimum fabrication cost with maximum up-diffusion control
of metals potentially capable of impeding subsequent wire bonding.
The bonding method should be flexible enough to be applied for
different IC product families and a wide spectrum of design and
process variations. Preferably, these innovations should be
accomplished while shortening production cycle time and increasing
throughput, and without the need of expensive additional
manufacturing equipment.
SUMMARY OF THE INVENTION
[0008] The present invention discloses a robust, reliable and
low-cost metal structure and process enabling electrical wire
connections to the interconnecting copper metallization of
integrated circuits (IC). The structure comprises a layer of
barrier metal that resists copper diffusion, deposited on the
non-oxidized copper surface in a thickness such that the barrier
layer reduces the diffusion of copper at 250.degree. C. by more
than 80% compared with the absence of the barrier metal. The
structure further comprises an outermost layer reduces the
diffusion of the barrier metal at 250.degree. C. by more than 80%
compared with the absence of the bondable metal. Finally, a metal
wire is bonded to the outermost layer for metallurgical
connection.
[0009] The barrier metal is selected from a group consisting of
nickel, cobalt, chromium, molybdenum, titanium, tungsten, and
alloys thereof. The outermost metal layer is selected from a group
consisting of gold, platinum, and silver.
[0010] The present invention is related to high density and high
speed ICs with copper interconnecting metallization, especially
those having high numbers of metallized inputs/outputs, or "bond
pads". These circuits can be found in many device families such as
processors, digital and analog devices, logic devices, high
frequency and high power devices, and in both large and small area
chip categories.
[0011] It is an aspect of the present invention to be applicable to
bond pad area reduction and thus supports the shrinking of IC
chips. Consequently, the invention helps to alleviate the space
constraint of continually shrinking applications such as cellular
communication, pagers, hard disk drives, laptop computers and
medical instrumentation.
[0012] Another aspect of the invention is to fabricate the bond pad
metal caps by the self-defining process of electroless deposition,
thus avoiding costly photolithographic and alignment
techniques.
[0013] Another aspect of the invention is to be guided by the metal
diffusion coefficients for selecting the appropriate pair of metals
and the coordinated layer thicknesses in order to minimize
up-diffusion at the elevated bonding temperatures and subsequent
bond-inhibiting chemical reactions.
[0014] Another aspect of the invention is to advance the process
and reliability of wafer-level multi-probing by eliminating probe
marks and subsequent bonding difficulties.
[0015] Another object of the invention is to provide design and
process concepts which are flexible so that they can be applied to
many families of semiconductor products, and are general so that
they can be applied to several generations of products.
[0016] Another object of the invention is to use only designs and
processes most commonly employed and accepted in the fabrication of
IC devices, thus avoiding the cost of new capital investment and
using the installed fabrication equipment base.
[0017] These objects have been achieved by the teachings of the
invention concerning selection criteria and process flows suitable
for mass production. The non-oxidized surface of the copper of the
bond pad is seeded by a metal such as palladium and covered with a
layer of a barrier metal such as nickel. The thickness of this
barrier layer has to be such that it prevents excessive copper
up-diffusion at the elevated temperatures of the bonding operation.
The outermost layer is a bondable metal such as palladium or gold.
The layer thickness has to be such that it prevents nickel
up-diffusion to the surface, where it would oxidize and impede wire
bonding. In mass production, the various metal layers are deposited
by electroless plating, thus avoiding the need for expensive
photolithographic definition steps.
[0018] The technical advances represented by the invention, as well
as the aspects thereof, will become apparent from the following
description of the preferred embodiments of the invention, when
considered in conjunction with the accompanying drawings and the
novel features set forth in the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019] FIGS. 1A and 1B illustrate schematic cross sections of the
preferred embodiment of the invention.
[0020] FIG. 1A shows a bondable cap of stacked layers over a bond
pad of an integrated circuit having copper metallization.
[0021] FIG. 1B shows the bond pad of FIG. 1A including a
ball-bonded wire.
[0022] FIG. 2 is a more detailed yet still schematic cross section
of the preferred embodiment of the invention.
[0023] FIG. 3 is a more detailed yet still schematic cross section
of the preferred embodiment of the invention.
[0024] FIG. 4 illustrates a block diagram of the process flow for
fabricating the bond pad cap according to the invention.
APPENDIX
[0025] The Table is listing the calculated thicknesses of barrier
metal layers which are required to reduce the up-diffusion of the
underlying metal by more than 80% compared with the absence of the
barrier metal.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0026] FIG. 1A shows a schematic cross section of the preferred
embodiment of the invention, generally designated 100. An
integrated circuit (IC) has copper interconnecting metallization
and is covered by a moisture-impenetrable protective overcoat 101.
This overcoat is usually made of silicon nitride, commonly 0.5 to
1.0 .mu.m thick. A window 102 is opened in the overcoat in order to
expose portion of the copper metallization 103. Not shown in FIG.
1A is the underlayer embedding the copper and preventing its
diffusion into parts of the IC (usually made of tantalum nitride,
tantalum silicon nitride, tungsten nitride, tungsten silicon
nitride, titanium, titanium nitride, or titanium tungsten; see FIG.
3).
[0027] In FIG. 1A, the dielectric IC portions 104 are only
summarily indicated. These electrically insulating portions may
include not only the traditional plasma-enhanced chemical vapor
deposited dielectrics such as silicon dioxide, but also newer
dielectric materials having lower dielectric constants, such as
silicon-containing hydrogen silsesquioxane, organic polyimides,
aerogels, and parylenes, or stacks of dielectric layers including
plasma-generated or ozone tetraethylorthosilicate oxide. Since
these materials are less dense and mechanically weaker than the
previous standard insulators, the dielectric under the copper is
often reinforced. Examples can be found in U.S. patent applications
No. 60/085,876, filed on May 18, 1998 (Saran et al., "Fine Pitch
System and Method for Reinforcing Bond Pads in Semiconductors"),
and No. 60/092,961, filed Jul. 14, 1998 (Saran, "System and Method
for Bonding over Active Integrated Circuits").
[0028] Since copper is susceptible to corrosion and even thin
copper(I)oxide films are difficult to bond to, the present
invention provides structures and processes of a cap formed over
the exposed copper, as described in FIGS. 1, 2 and 3. According to
the invention, the cap consists of a stack of metals having
coordinated thicknesses such that the stack satisfies three
requirements:
[0029] The cap acts as a barrier against the up-diffusion of copper
to the surface of the cap where the copper might impede the
subsequent wire bonding operation. Specifically, the cap the metal
selections and thicknesses are coordinated such that the cap
reduces the up-diffusion of copper at 250.degree. C. by more than
80% compared with the absence of the barrier metal.
[0030] The cap is fabricated by a technique, which avoids expensive
photolithographic steps. Specifically, an electroless process is
used to deposit the cap metal layers.
[0031] The cap has an outermost metal surface which is bondable.
Specifically, conventional ball and wedge bonding techniques can be
used to connect metal wires and other coupling members
metallurgically to the bond pad.
[0032] As indicated in FIGS. 1B and 2, wire ball bonding is the
preferred method of using coupling members to create electrical
connections. Another method is ribbon bonding employing wedge
bonders. In contrast to wedge bonding, ball bonding operates at
elevated temperatures for which the materials and processes of this
invention need to be harmonized.
[0033] The wire bonding process begins by positioning both the IC
chip with the bond pads and the object, to which the chip is to be
bonded, on a heated pedestal to raise their temperature to between
170 and 300.degree. C. A wire 110 (in FIG. 1B), typically of gold,
gold-beryllium alloy, other gold alloy, copper, aluminum, or alloys
thereof, having a diameter typically ranging from 18 to 33 .mu.m,
is strung through a heated capillary where the temperature usually
ranges between 200 and 500.degree. C. At the tip of the wire, a
free air ball is created using either a flame or a spark technique.
The ball has a typical diameter from about 1.2 to 1.6 wire
diameters. The capillary is moved towards the chip bonding pad (102
in FIG. 1A) and the ball is pressed against the metallization of
the bonding pad cap (layer 106 in FIGS. 1A and 1B). A combination
of compression force and ultrasonic energy creates the formation of
a strong metallurgical bond by metal interdiffusion. At time of
bonding, the temperature usually ranges from 150 to 270.degree. C.
In FIG. 1B, schematic form 111 exemplifies the final shape of the
attached "ball" in wire ball bonding.
[0034] It is important for the present invention that recent
technical advances in wire bonding now allow the formation of small
yet reliable ball contacts and tightly controlled shape of the wire
loop. Ball pitches as small as between 75 and 40 .mu.m can be
achieved. Such advances can, for instance, be found in the
computerized bonder 8020 by Kulicke & Soffa, Willow Grove, Pa.,
U.S.A., or in the ABACUS SA by, Texas Instruments, Dallas, Tex.,
U.S.A. Moving the capillary in a predetermined and
computer-controlled manner through the air will create a wire
looping of exactly defined shape. Finally, the capillary reaches
its desired destination and is lowered to touch the contact pad of
the object. With an imprint of the capillary, a metallurgical
stitch bond is formed, and the wire is flamed off to release the
capillary. Stitch contacts are small yet reliable; the lateral
dimension of the stitch imprint is about 1.5 to 3 times the wire
diameter (its exact shape depends on the shape of the capillary
used, such as capillary wall thickness and capillary
footprint).
[0035] It is an advantage of the present invention to provide a
metal cap surface of the bond pad hard enough that the fine-tip
needles used in electrical multiprobing do not create probe marks.
A soft metal surface, torn up by the needle imprint, is
particularly difficult to bond to when the area of the bond pad is
so small--a trend in contemporary bond pad shrinking--that the
imprint disturbs most of the available bonding area.
[0036] According to the invention, the metal cap over the copper
103 is provided by two layers:
[0037] Layer 105 is positioned over copper 203, sometimes deposited
on a seed metal layer (see FIGS. 2 and 3). Examples for layer 105
are nickel, cobalt, chromium, molybdenum, titanium, tungsten, and
alloys thereof. These metals are inexpensive and can be deposited
by electroless plating; however, they are poorly bondable. In these
metals, copper has a diffusion coefficient of less than
1.times.10E-23 cm.sup.2/s at 250.degree. C. Consequently, these
metals are good copper diffusion barriers. The layer thicknesses
required to reduce copper diffusion by more than 80% compared to
the absence of the layers are obtained by diffusion calculations.
As an example, the Table of the Appendix lists the layer thickness
of nickel when copper is diffusing at 250.degree. C. or 160.degree.
C., with diffusion time (min) as parameter. Generally, a barrier
thickness from about 0.5 to 1.5 .mu.m will safely meet the copper
reduction criterion.
[0038] Layer 106 is positioned over layer 105 as the outermost
layer of the cap; it is bondable so that it can accept the wire
bond 111. Examples for layer 106 are gold, platinum, palladium, and
silver. In addition, these metals have a diffusion coefficient for
the metals used in barrier 105 (such as nickel) of less than
1.times.10E-14 cm.sup.2/s at 250.degree. C. Consequently, these
metals are good diffusion barriers for the materials of layer 105.
Again, the layer thicknesses required to reduce the up-diffusion of
metal used in layer 105 by more than 80% compared to the absence of
layer 106 are obtained from diffusion calculations. As an example,
the Table of the Appendix lists the layer thickness (.mu.m) of gold
when nickel is up-diffusing at 250.degree. C. or 160.degree. C.,
with diffusion time (min) as parameter. Generally an outermost
layer thickness of 1.5 .mu.m or somewhat less will safely meet the
reduction criterion for metal diffusing from layer 105.
[0039] As another example, the Table of the Appendix lists the
layer thickness (.mu.m) of palladium when nickel is up-diffusing at
250.degree. C. or 160.degree. C., with diffusion time (min) as
parameter. Generally, a thickness of outermost layer 106 of about
0.4 to 1.5 .mu.m will safely meet the reduction criterion for metal
diffusing from layer 105.
[0040] The process flow of electroless plating is described in
conjunction with FIG. 4. Usually, the plated layers will fit into
the size of the bond pad opening (102 in FIG. 1A). For bond pads
having protective overcoats of reduced thickness, however, one or
more of the plated layers may grow electrolessly beyond the
periphery of the opening. FIG. 2 illustrates schematically an
example for this layer growth. The protective overcoat layer 201
has reduced thickness 201a (for instance, 0.5 .mu.m instead of the
usual 1.0 .mu.m). While the metal seed layer 208, plated directly
over the non-oxydized surface 203a of the copper metallization 203,
fits easily within the overcoat opening, the barrier layer 205 and
the bondable layer 206 grow beyond the opening periphery. This cap
region is designated 205a and 206a in FIG. 2; it does not affect
the metallurgical attachment of wire "ball" 211, but could affect
the minimum distance to adjacent bond pads.
[0041] FIG. 3 summarizes the preferred embodiment of the present
invention in more detail; most dimension ranges are quoted in FIGS.
1a and 1B, and the electroless plating and other fabrication
process steps are discussed in FIG. 4. The protective overcoat 301
has an opening, which defines the size of the bond pad, and a
thickness sufficient to accommodate all of the stacked layers,
which cap the bond pad IC copper metallization 303. The copper
trace 303 is imbedded in refractory metal shield 302 (for example,
tantalum nitride), which is surrounded by dielectric 304 and metal
re-enforcements 304a; methods quoted above).
[0042] Directly facing the cleaned and non-oxidized copper surface
303a is the first layer of the cap, a thin layer 308 of seed metal
(for example, palladium, about 5 to 10 nm thick; another choice is
tin). Immediately following the seed metal layer is metal layer 305
(for example, nickel) as a barrier against up-diffusing copper. On
top of this barrier layer is metal layer 306 (for example, gold, or
palladium) as a barrier against up-diffusing barrier metal (such as
nickel) and, at the same time, as the outermost layer of the cap
which is metallurgically bondable.
[0043] The electroless process used for fabricating the bond pad
cap of FIG. 3 is detailed in FIG. 4. After the bond pads have been
opened in the protective overcoat, exposing the copper IC
metallization in bond pad areas, the cap deposition process starts
at 401; the sequence of process steps is as follows:
[0044] Step 402: Coating the backside of the silicon IC wafer with
resist using a spin-on technique. This coat will prevent accidental
metal deposition on the wafer backside.
[0045] Step 403: Baking the resist, typically at 110.degree. C. for
a time period of about 30 to 60 minutes.
[0046] Step 404: Cleaning of the exposed bond pad copper surface
using a plasma ashing process for about 2 minutes.
[0047] Step 405: Cleaning by immersing the wafer, having the
exposed copper of the bond pads, in a solution of sulfuric acid,
nitric acids, or ant other acid, for about 50 to 60 seconds.
[0048] Step 406: Rinsing in overflow rinser for about 100 to 180
seconds.
[0049] Step 407: Immersing the wafer in a catalytic metal chloride
solution, such as palladium chloride, for about 40 to 80 seconds
"activates" the copper surface, i.e., a thin layer of seed metal
(such as palladium) is deposited onto the clean non-oxidized copper
surface.
[0050] Step 408: Rinsing in dump rinser for about 100 to 180
seconds.
[0051] Step 409: Electroless plating of barrier metal against
copper up-diffusion. If nickel is selected, plating between 150 to
180 seconds will deposit about 0.4 to 0.6 .mu.m thick nickel.
[0052] Step 410: Rinsing in dump rinser for about 100 to 180
seconds.
[0053] Step 411: Electroless plating of outermost layer, which is
bondable and simultaneously provides a barrier against up-diffusion
of the underlying barrier metal. If gold or palladium is selected,
plating between 150 to 180 seconds will deposit about 0.4 to 0.6
.mu.m thick gold or palladium, respectively. A preferred process
uses first an immersion step with self-limiting surface metal
replacement. If gold is selected, plating between 400 and 450
seconds will deposit approximately 30 nm thick gold. As a second
step for thicker metal layer (0.5 to 1.5 .mu.m thick), the
immersion process is followed by an autocatalytic process step.
[0054] Step 412: Rinsing in dump rinser for about 100 to 180
seconds.
[0055] Step 413: Stripping wafer backside protection resist for
about 8 to 12 minutes.
[0056] Step 414: Spin rinsing and drying for about 6 to 8
minutes.
[0057] The bond pad cap fabrication process stops at 415.
[0058] The subsequent metallurgical connection of metal wires or
ribbons by a ball or wedge bonding process is described above.
[0059] While this invention has been described in reference to
illustrative embodiments, this description is not intended to be
construed in a limiting sense. Various modifications and
combinations of the illustrative embodiments, as well as other
embodiments of the invention, will be apparent to persons skilled
in the art upon reference to the description. As an example, the
invention can be applied to IC bond pad metallizations other than
copper, which are difficult or impossible to bond by conventional
ball or wedge bonding techniques, such as alloys of refractory
metals and noble metals. As another example, the invention can be
extended to batch processing, further reducing fabrication costs.
As another example, the invention can be used in hybrid
technologies of wire/ribbon bonding and solder interconnections. It
is therefore intended that the appended claims encompass any such
modifications or embodiments.
1TABLE Thickness (micrometers) of barrier metal layer required to
reduce updiffusion of underlying metal by more than 80% Time
(minutes) 250 (degrees C.) 160 (degrees C.) Copper in Platinum 3
4.68E-07 1.79E-09 60 2.09E-06 8.01E-09 1440 1.03E-05 3.93E-08 4320
1.78E-05 6.80E-08 Copper in Nickel 3 5.39E-07 2.16E-09 60 2.41E-06
9.66E-09 1440 1.18E-05 4.73E-08 4320 2.04E-05 8.19E-08 Copper in
Palladium 3 1.30E-01 9.00E-02 60 5.60E-01 4.10E-01 1440 2.75E+00
2.00E+00 4320 4.76E+00 3.46E+00 Nickel in Gold 3 9.10E-01 1.10E-01
60 4.06E+00 5.10E-01 1440 1.99E+01 2.51E+00 4320 3.45E+01 4.35E+00
Nickel in Palladium 3 2.70E-02 8.00E-03 60 1.22E-01 3.80E-02 1440
5.98E-01 1.85E-01 4320 1.04E+00 3.20E-01
* * * * *