U.S. patent application number 10/828030 was filed with the patent office on 2004-12-30 for method for improving uniformity in deposited low k dielectric material.
This patent application is currently assigned to Taiwan Semiconductor Manufacturing Co., Ltd.. Invention is credited to Jang, Syun-Ming, Li, Lih-Ping, Lu, Yung-Chen.
Application Number | 20040266216 10/828030 |
Document ID | / |
Family ID | 32469618 |
Filed Date | 2004-12-30 |
United States Patent
Application |
20040266216 |
Kind Code |
A1 |
Li, Lih-Ping ; et
al. |
December 30, 2004 |
Method for improving uniformity in deposited low k dielectric
material
Abstract
A method for forming a low k dielectric material block is
provided. In one example, the method includes depositing a low k
dielectric layer over a semiconductor substrate and curing the
deposited low k dielectric layer. The curing may be performed using
a remote plasma process in which an excitation gas is excited in a
selected region remote from the deposited low k dieletric layer to
carry radiation energy and transfer to the low k dielectric layer
when the excitation gas contacts the low k dielectric layer.
Inventors: |
Li, Lih-Ping; (Hsin-Chu,
TW) ; Lu, Yung-Chen; (Taipei, TW) ; Jang,
Syun-Ming; (Hsin-Chu, TW) |
Correspondence
Address: |
HAYNES AND BOONE, LLP
901 MAIN STREET, SUITE 3100
DALLAS
TX
75202
US
|
Assignee: |
Taiwan Semiconductor Manufacturing
Co., Ltd.
No. 8, Li-Hsin Rd. 6, Science-Based Industrial Park
Hsin-Chu
TW
300-77
|
Family ID: |
32469618 |
Appl. No.: |
10/828030 |
Filed: |
April 20, 2004 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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10828030 |
Apr 20, 2004 |
|
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10434029 |
May 8, 2003 |
|
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6753269 |
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Current U.S.
Class: |
438/778 ;
257/E21.241; 257/E21.576; 257/E21.579; 438/782 |
Current CPC
Class: |
H01L 21/76831 20130101;
H01L 21/76801 20130101; H01L 21/76835 20130101; H01L 21/76826
20130101; H01L 21/76807 20130101; H01L 21/3105 20130101 |
Class at
Publication: |
438/778 ;
438/782 |
International
Class: |
H01L 021/4763; H01L
021/31; H01L 021/469 |
Claims
1. A method for forming a low k dielectric material block
comprising: depositing a low k dielectric layer over a
semiconductor substrate; and curing the deposited low k dielectric
layer using a remote plasma process in which an excitation gas is
excited in a selected region remote from the deposited low k
dielectric layer to carry radiation energy and transfer the energy
to the low k dielectric layer when the excitation gas contacts the
low k dielectric layer.
2. The method of claim 1 wherein the curing lasts from
approximately thirty seconds to ten minutes.
3. The method of claim 1 wherein the curing is completed in Rapid
Thermal Processing (RTP) equipment with a radiation source.
4. The method of claim 1 wherein the curing occurs at a temperature
of approximately 250.degree. C. to 450.degree. C.
5. The method of claim 1 wherein the depositing is accomplished
using a plasma chemical vapor deposition (CVD) process.
6. The method of claim 1 wherein the excitation gas is H2.
7. The method of claim 1 wherein the excitation gas is selected
from a group consisting of noble gases, CH4, O2, H2, N2O, or a
combination thereof.
8. A method for forming a substantially homogenous layer of
dielectric material, the method comprising: depositing a low k
dielectric layer over a semiconductor substrate; exciting a gas in
a location remote from the deposited low k dielectric layer; and
directing the excited gas towards the deposited low k dielectric
layer, wherein energy contained by the gas operates to cure the low
k dielectric layer when the gas contacts the low k dielectric
layer.
9. The method of claim 8 wherein the curing lasts from
approximately thirty seconds to ten minutes.
10. The method of claim 8 wherein the curing occurs at a
temperature of approximately 250.degree. C. to 450.degree. C.
11. The method of claim 8 wherein the depositing is accomplished
using a plasma chemical vapor deposition (CVD) process.
12. The method of claim 8 wherein the gas is H2.
13. The method of claim 8 wherein the gas is selected from a group
consisting of noble gases, CH4, O2, H2, N2O, or a combination
thereof.
14. The method of claim 8 further comprising: creating a trench;
creating a via; and depositing a conductive metal into the trench
and via.
15. The method of claim 14 further comprising performing a chemical
mechanical planarization process after depositing the conductive
metal.
16. A semiconductor device comprising: a low k dielectric material
block having a first low k dielectric layer with a higher density
on top of and contiguous to a second low k dielectric layer; a
trench formed in the first low k dielectric layer; a via formed in
the second low k dielectric layer; and a conductive metal deposited
into the trench and the via.
17. The semiconductor device of claim 16 wherein at least one of
the first and second layers is substantially homogenous.
Description
CROSS-REFERENCE
[0001] This application is a continuation-in-part of U.S. patent
application Ser. No. 10/434,029, filed on May 8, 2003, and entitled
"METHOD FOR LOW K DIELECTRIC DEPOSITION," the entire disclosure of
which is incorporated herein by reference.
BACKGROUND
[0002] The present disclosure relates generally to the fabrication
of semiconductor devices, and more particularly, to a method for
improving uniformity in deposited materials.
[0003] Semiconductor device geometries have dramatically decreased
in size since such devices were first introduced several decades
ago. Since then, integrated circuits have generally followed the
two year/half-size rule (often called Moore's Law), which means
that the number of devices on a chip doubles every two years.
Today's fabrication plants are routinely producing devices having
0.35 .mu.m and even 90 nm feature sizes.
[0004] In the process of reducing the size of devices on integrated
circuits, it has become necessary to use conductive materials
having low resistivity and insulators having low dielectric
constants (k.ltoreq.4.0) to reduce the capacitive coupling between
adjacent metal lines. A conductive material of interest is copper
which can be deposited in submicron features by electrochemical
deposition. Dielectric materials of interest are silicon oxides
that contain carbon. Combination of silicon oxide materials and
copper has led to new deposition methods for preparing vertical and
horizontal interconnects since copper is not easily etched to form
metal lines. Such methods include damascene methods depositing
vertical and horizontal interconnects wherein one or more
dielectric materials are deposited and etched to form the vertical
and horizontal interconnects that are filled with the conductive
material.
[0005] Dielectric layers can be deposited, etched and filled with
metal in multiple steps. Exemplary methods for depositing
dielectric layers include damascene methods where lines/trenches
are filled concurrently with vias/contacts. In a "counter-bore"
scheme, a series of dielectric layers are deposited on a substrate,
then vertical interconnects such as vias/contacts are etched
through all of the layers and horizontal interconnects such as
lines/trenches are etched through the top layers. A conductive
material is then deposited in both the vertical and horizontal
interconnects.
[0006] The deposition of low k material may use several
conventional methods, and may be subsequently cured through a radio
frequency (RF) plasma curing process. The RF plasma curing process
not only causes chemical reactions on the deposited material, but
also bombards the material with ions. One problem that has emerged
is that the bombardment may cause degradation in the uniformity of
the deposited material.
[0007] Accordingly, what is needed is a process to form a low k
material that has better uniformity in the deposition process.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] FIG. 1 illustrates a sectional view of a via/interconnect
structure.
[0009] FIGS. 2-5 illustrate sample processing steps to deposit low
k dielectric material without using an etch stop layer according to
one example of the present disclosure.
[0010] FIG. 6 illustrates a sectional view of a gradient low k
dielectric material undergoing an RF plasma curing process.
[0011] FIG. 7 illustrates a sectional view of a relatively
homogenous low k dielectric material undergoing a remote plasma
curing process.
DETAILED DESCRIPTION
[0012] The present disclosure relates generally to the fabrication
of semiconductor devices, and more particularly, to a method for
improving uniformity in deposited materials.
[0013] It is to be understood that the following disclosure
provides many different embodiments, or examples, for implementing
different features of the disclosure. Specific examples of
components and arrangements are described below to simplify the
present disclosure. These are, of course, merely examples and are
not intended to be limiting. In addition, the present disclosure
may repeat reference numerals and/or letters in the various
examples. This repetition is for the purpose of simplicity and
clarity and does not in itself dictate a relationship between the
various embodiments and/or configurations discussed.
[0014] Embodiments of the present disclosure provide a method for
depositing and etching of low k dielectric layers (i.e., k less
than or equal to about 4, often less than about 3). The methods may
be suited for selective etch processes such as damascene schemes
that deposit conductive materials, such as copper, within
interconnects formed in the low k dielectric layers.
[0015] The term "low dielectric constant" or "low k", with respect
to the low dielectric constant (k) dielectric material being
treated by the process as disclosed herein, means a dielectric
constant (k value) that is less than the dielectric constant of a
conventional silicon oxide dielectric material. For example, one
large group of the low k materials is the carbon-containing low k
material, which is a silicon oxide-containing material having one
or more carbon-containing groups with one carbon atom in each
carbon-containing group bonded to a silicon atom.
[0016] Whereas silicon oxide has a dielectric constant of
approximately 4.0, many low-k dielectrics have dielectric constants
less than 3.5. Examples of low-k dielectric materials include
organic or polymeric materials. Another example is porous, low
density materials in which a significant fraction of the bulk
volume contains air, which has a dielectric constant of
approximately 1. The properties of these porous materials are
proportional to their porosity. For example, at a porosity of about
80%, the dielectric constant of a porous silica film, i.e. porous
SiO.sub.2, is approximately 1.5. Still another example of a low-k
dielectric material is carbon doped silicon oxide wherein at least
a portion of the oxygen atoms bonded to the silicon atoms are
replaced by one or more organic groups such as, for example, an
alkyl group such as a methyl (CH.sub.3) group.
[0017] FIG. 1 illustrates a sectional view of a via/interconnect
structure 100 manufactured by conventional processing methods. In
this structure, a via 102 is embedded or surrounded by a low k
dielectric layer 104. The low k dielectric layer 104 may contain
silicon, oxygen, carbon, and hydrogen elements, and have a low
dielectric constant (k less than or equal to about 4.0). The low k
dielectric material may be spin on low k dielectrics (doped) or a
CVD layer deposited by oxidation of an organosilicon compound
containing C--H bonds and C--Si bonds. The via 102 is separated
from the low k dielectric layer 104 by a barrier layer 106 such as
silicon nitride or silicon carbide, that protects the dielectric
layers from diffusion of a conductive material such as copper
filling in the via 102. Underneath the low k dielectric layer 104,
there is a etch stop layer 108, which helps to control the
thickness of the low k dielectric layer while the entire structure
is going through some etching process. There may be a second low k
dielectric layer 110, such as spin on low k dielectrics (doped or
undoped) or a CVD layer deposited by oxidation of an organosilicon
compound. The second low k dielectric layer may also sit on a prior
dielectric substrate 112 wherein the via 102 makes contact with a
feature such as a metal line 114.
[0018] The first dielectric layer 104 is preferably deposited to a
thickness of about 1,000 to about 5,000 .ANG.. The second
dielectric layer 110 is then deposited to a thickness of about 500
to about 4,000 .ANG.. Deposition of low k dielectric layers can be
performed using conventional processes for depositing silicon
oxides, such as by oxidation of tetraethylorthosilicate (TEOS),
also known as tetraethoxysilane. Alternatively, the low k
dielectric layers can be produced by oxidation of an organosilicon
compound containing both C--H bonds and C--Si bonds, such as
methylsilane, dimethylsilane, trimethylsilane, trimethylsiloxane,
or any other similar materials. The dielectric layer is cured at
low pressure and high temperature to stabilize properties. Carbon
or hydrogen which remains in the dielectric layer contributes to
low dielectric constants, good barrier properties, and reduced etch
rates. The carbon and hydrogen contents of the deposited dielectric
layers is controlled by varying process conditions.
[0019] FIGS. 2-5 illustrate sample processing steps to deposit the
low k dielectric material without using an etch stop layer
according to one example of the present disclosure. FIG. 2
illustrates that the metal contact 114 is formed on an existing
substrate 112, and a layer of low k dielectric material 200 of a
predetermined thickness is deposited on top of the substrate 112
and metal 114. The initial thickness of the low k dielectric
material 200 can be approximately 6500 .ANG.. The general process
for depositing the low k dielectric material can be the similar to
the conventional methods. However, it would be preferred that a low
temperature condition is used. In one example, the deposition is
performed at the temperature below 300.degree. C., preferably below
50.degree. C. such as around 35.degree. C. At this relatively cold
temperature range, the deposited layer is partially polymerized
during deposition and polymerization is completed during subsequent
curing of the layer.
[0020] The subsequent curing process is done by a process referred
to as a low power curing process. In addition to setting the energy
level, the power of the curing process is actively controlled by
varying the curing time,. For example, a plasma curing is performed
for about 3 to 10 minutes at a temperature of about 400.degree. C.
In some embodiments of the present disclosure, the plasma energy
level is set around or below 2000W and the curing duration is about
6 minutes. The plasma curing can be a remote plasma curing as well
as a radio frequency plasma curing.
[0021] FIG. 3 illustrates the result of the plasma curing in which
the one layer of low k dielectric material is now controlled and
separated into two layers 300 and 302. The top layer 300 has its
physical characteristics that is different from the second layer
302 due to the fact that these two layers have different
compositions caused by the low temperature deposition and
controlled low power curing. One feature for these two layers is
that the top layer or the trench layer 300 has an etch rate much
lower than the lower layer 302 due to its higher density than the
lower one 302. The thickness of the trench layer 300 is about 2000
to 4000 .ANG..
[0022] It is thus noted that the above described process does not
need an etch stop layer to be separately formed. The difference in
the etch rate between the top layer and the lower layer of the low
k dielectric material satisfy the needs to control the etch
process, thus eliminating the need of the using an etch stop layer
between the two low k dielectric layers and simplifying the entire
low k material deposition process both in terms of processing time
and cost. It thus provides a larger etch window about trench depth
and profile control. And since the formation of both layers all
will happen in one reaction chamber, it reduces the both the
process time and costs. In addition, the increased density of the
top layer low k material also enhances the material mechanical
property.
[0023] In another embodiment, a dielectric layer may be cured to
provide uniformity throughout the dielectric layer. A dielectric
layer may be damaged when certain photo resist areas are removed.
If not treated, this damage may cause the dielectric layer to
become an absorption site that absorbs volatile material, such as
moisture, which may increase the dielectric constant of the
dielectric layer. In order to reduce the damage and aid in the
conversion of the low k material to an amorphous silicon oxide, the
deposited low k material may go through a bake process and then a
plasma curing process. The bake process may use a temperature range
from 150.degree. C. to 250.degree. C. for a time interval
sufficient to liberate substantially all of any solvent or
dispersant from the deposited low k material. By curing the low k
dielectric layer, damage to the dielectric layer may be reduced and
the conversion of the low k dielectric is completed.
[0024] In one example, the dielectric layer is cured at a
temperature between approximately 250.degree. C. and 450.degree. C.
for a period of time to initiate polymerization or cross-linking
sufficient to convert the deposited low k material to a low
dielectric constant layer. In some examples, the cure temperature
approaches the decomposition temperature of the selected low k
material. In order to speed up the curing process, the conventional
methods may utilize RF plasma to bombard the low k material in
order to transfer radiation energy thereto. However, the ion
bombardment may damage the low k material by causing degradation in
the uniformity of the deposited material, which may impact the
quality of the low k dielectric layer.
[0025] FIG. 6 illustrates one such low k dielectric layer wherein
poor uniformity has formed a deposited dielectric layer 400 with a
gradient composition. In FIG. 6, the RF plasma 402 is from
relatively high power energy sources (not shown) and affects at
least a portion of the dielectric surface 404. Another portion 406
may be unaffected. The bombardments cause a gradient low k material
composite in the deposited dielectric material 400, which destroys
the uniformity of the material and may result in the dielectric
material having a higher k value. For example, the upper portion
404 may be more dense than the lower portion 406. Although the
conventional RF plasma curing may vary in its plasma power level,
temperature, and pressure of the reaction chamber, cycle time, and
frequencies to improve the result, the fact that the particles from
the plasma source are bombarded onto the deposited low k dielectric
material cannot be changed.
[0026] Referring to FIG. 7, in order to get a homogeneous composite
of the low k dielectric layer, a remote plasma curing process 408
may be used instead of the direct RF plasma curing process.
Plasmas, which are excited by action of electrical energies of
different frequencies (e.g., from null (direct voltages) to
microwave frequencies), may be used to treat substrate surfaces in
semiconductor manufacturing. In general, the plasma may be produced
in an excitation gas (e.g., H2) remote from the low k material and
the excitation gas excites reactant low K materials. The excitation
gas may comprise a non-coating forming gas or a mixture of several
non-coating forming gases passing through a discharge zone, in
which excited and atomic species are formed. The term
"non-coating-forming gas" may be used to refer to such gases as
noble gases, CH4, O2, H2 and N2O. This excitation gas is mixed with
a coating-forming gas (e.g., H2), which may comprise a single
coating-forming gas or several gases, in a discharge-free region
remote from the excitation source.
[0027] The deposition process may use a plasma-CVD. More
specifically, in a selected region, the excitation gas and the
coating-forming gas may be mixed to cause an interaction between
the excitation gas and the coating-forming gas, which causes a
transfer of excitation energy of molecules or atoms and causes a
homogeneous pre-reaction. The pre-reacted components then react
heterogeneously with the substrate and form the low k dielectric
layer deposited thereon.
[0028] A remote plasma curing process may be used that does not
directly bombard the deposited material and does not prevent or
negatively affect the desired chemical reactions from happening.
The curing may be performed in Rapid Thermal Processing (RTP)
equipment with a radiation source. In the present example, the
curing process may last between approximately one to ten minutes
and may occur at a temperature of approximately 250.degree. C. to
450.degree. C.
[0029] During the curing process, the substrate (e.g., the wafer)
may be maintained in an environment in which only a very low oxygen
level is permitted to avoid undesired oxidation. A nitrogen or
other inert gas atmosphere may be used. In addition, the curing
time may vary depending on the low k material selected for the
deposition, as well as other considerations such as cure
temperature, process gas ambient atmosphere, time-temperature
process conditions and heating condition.
[0030] It is understood that several modifications, changes and
substitutions are intended in the foregoing disclosure and in some
instances some features of the disclosure will be employed without
a corresponding use of other features. Accordingly, it is
appropriate that the appended claims be construed broadly and in a
manner consistent with the scope of the disclosure.
* * * * *