U.S. patent application number 10/018180 was filed with the patent office on 2003-03-13 for micromechanical component and corresponding production method.
Invention is credited to Lutz, Markus, Offenberg, Michael.
Application Number | 20030049878 10/018180 |
Document ID | / |
Family ID | 7638360 |
Filed Date | 2003-03-13 |
United States Patent
Application |
20030049878 |
Kind Code |
A1 |
Offenberg, Michael ; et
al. |
March 13, 2003 |
Micromechanical component and corresponding production method
Abstract
The present invention provides a micromechanical component
including a substrate (1); a micromechanical functional plane (100)
provided on the substrate; a covering plane (200) provided on the
micromechanical functional plane (100); and a printed circuit trace
plane (300) provided on the covering plane (200). The covering
plane (200) features a monocrystalline region (14) which is
epitaxially grown on an underlying monocrystalline region (7; 24);
and the covering plane (200) features a polycrystalline region (15)
which is epitaxially grown on an underlying polycrystalline
starting layer (13) at the same time.
Inventors: |
Offenberg, Michael;
(Kirchentellinsfurt, DE) ; Lutz, Markus;
(Sunnyvale, CA) |
Correspondence
Address: |
KENYON & KENYON
ONE BROADWAY
NEW YORK
NY
10004
US
|
Family ID: |
7638360 |
Appl. No.: |
10/018180 |
Filed: |
September 9, 2002 |
PCT Filed: |
March 22, 2001 |
PCT NO: |
PCT/DE01/01116 |
Current U.S.
Class: |
438/50 ; 257/415;
257/417; 257/E21.131 |
Current CPC
Class: |
B81C 2203/0735 20130101;
B81C 1/00246 20130101 |
Class at
Publication: |
438/50 ; 257/415;
257/417 |
International
Class: |
H01L 021/00; H01L
029/82 |
Claims
What is claimed is:
1. A micromechanical component comprising: a substrate (1); a
micromechanical functional plane (100) provided on the substrate; a
covering plane (200) provided on the micromechanical function plane
(100); and a printed circuit trace plane (300) provided on the
covering plane (200); wherein the covering plane (200) features a
monocrystalline region (14) which is epitaxially grown on an
underlying monocrystalline region (7; 24); and the covering plane
(200) features a preferably polycrystalline region (15) which is
epitaxially grown on an underlying polycrystalline starting layer
(13) at the same time.
2. The micromechanical component as recited in claim 1, wherein the
micromechanical functional plane (100) features a monocrystalline
region (7) which is epitaxially grown on an underlying
monocrystalline region (1), as well as a polycrystalline region (8)
which is epitaxially grown on an underlying polycrystalline
starting layer (6) at the same time.
3. The micromechanical component as recited in claim 1, wherein the
micromechanical functional plane (100) features an SOI-type
monocrystalline region (24) formed above an insulator layer (25)
with the substrate (1).
4. The micromechanical component as recited in claim 1, 2 or 3,
wherein the monocrystalline region (14) of the covering plane (200)
includes one or a plurality of integrated circuit elements (23) of
an evaluation circuit or wiring elements.
5. The micromechanical component as recited in one of the preceding
Claims, wherein the polycrystalline region (8) of the
micromechanical functional plane (100) features a movable sensor
structure (10).
6. The micromechanical component claim 5, wherein the
micromechanical functional plane (100) features a buried
polysilicon layer (3) underneath the movable sensor structure
(10).
7. The micromechanical component as recited in one of the preceding
Claims, wherein one or a plurality of flip-chip connection
elements, preferably gold bumps, are provided in the printed
circuit trace plane (300).
8. The micromechanical component as recited in one of the preceding
Claims, wherein it is possible to manufacture it by silicon-surface
micromachining.
9. A method for manufacturing a micromechanical component
comprising the steps of: providing a substrate (1); providing a
micromechanical functional plane (100) on the substrate (1);
providing a covering plane (200) on the micromechanical functional
plane (100); providing a polysilicon starting layer (13)
region-wise on the micromechanical functional plane (100), and
leaving open region-wise a monocrystalline region (7, 24) of the
micromechanical functional plane (100); epitaxially depositing a
monocrystalline region (14) on the monocrystalline region (7, 24)
left open and epitaxially depositing a polycrystalline region (15)
on the polycrystalline starting layer (13) at the same time; and
providing a printed circuit trace plane (300) on the covering plane
(200).
Description
BACKGROUND INFORMATION
[0001] The present invention relates to a micromechanical component
including a substrate, a micromechanical functional plane provided
on the substrate, a covering plane provided on the micromechanical
functional plane, and a printed circuit trace plane provided on the
covering plane. The present invention also relates to a
corresponding manufacturing method.
[0002] Micromechanical function will be understood as an arbitrary
active function, for example a sensor function, or passive
function, for example a printed circuit trace function.
[0003] Although applicable to arbitrary micromechanical components
and structure, in particular to sensors and actuators, the present
invention and its underlying problem will be explained with
reference to a micromechanical component, for example an
acceleration sensor, which is manufacturable in the technology of
silicon surface micromachining.
[0004] Generally known are monolithically integrated,
surface-micromachined inertial sensors whose movable structures are
affixed to the chip in an unprotected manner (analog devices).
Because of this, an increased expenditure of time and energy during
handling and packaging ensues.
[0005] This problem can be avoided using a sensor having the
evaluation circuit on a separate chip; in this context, for
example, the surface-micromachined structures are covered by a
second cap wafer. This type of packaging creates a high portion of
the cost of a surface-micromachined acceleration sensor. This cost
results from the large surface required for the sealing surface
between the cap wafer and the sensor wafer and because of the
complex patterning (2-3 masks, bulk micromachining) of the cap
wafer.
[0006] The evaluation circuit is implemented on a second chip and
connected to the sensor element via wire bottom. This, in turn,
creates the necessity for the sensor elements to be sized such that
the parasitic effects developing due to the parasites in the lead
wires and bonding wires are negligible, that they no longer have
any dominant influence on the sensor function. In addition,
flip-chips techniques have to be ruled out because of parasitic
effects.
[0007] Such sensors could make do with considerably less surface
for the micromechanics if the evaluation circuit were situated on
the same Si chip and the sensitive electrodes could be connected
with only low parasities.
[0008] German Patent Application DE 195 37 814 A1 describes the
structure of a functional layer system and a method for the
hermetically packaging of surface-micromachined sensors. Explained
in this context is the manufacture of the sensor structure using
known technological methods. The mentioned hermetical packaging is
effected using a separate cap wafer which is made of silicon and
patterned using complex patterning processes such as KHO etching.
The cap wafer is affixed to the substrate featuring the sensor
(sensor wafer) using a glass solder (seal glass). For this purpose,
a broad bonding frame is required around each sensor chip to ensure
sufficient adhesion and tightness of the cap. This considerably
reduces the number of sensor chips per sensor wafer. Due to large
space required and the complex manufacture of the cap wafer
considerable costs are attributable to the sensor packaging.
[0009] German Patent Application DE 43 41 271 A1 discloses a
micromechanical acceleration sensor whose components are composed
partly of monocrystalline material and partly of polycrystalline
material. For manufacturing this known micromechanical acceleration
sensor, an epitaxial reactor is used. A starting layer made of
LPCVD polysilicon is used for determining the regions where
polycrystalline silicon is intended to grow during the epitaxial
process.
ADVANTAGES OF THE INVENTION
[0010] The micromechanical component according to the present
invention having the features of claim 1 and the manufacturing
method according to claim 9 have the following advantages. It is
possible for the evaluation circuit and the sensor element to be
monolithically integrated on one chip. Error-prone complex bonding
wires between the sensor element and the evaluation circuit can be
omitted. The size of the sensing elements can be reduced since less
parasitic effects occur in the bonding. Only one chip has to be
mounted. The process is based on the surface-micromachining process
known from document P4318466.9 which yields epitaxial polysilicon
having a thickness of at least 10 .mu.m. A simplification of the
surface-micromachining process ensues because the structures can be
bonded from above. The buried polysilicon can be omitted.
[0011] The integration of the component is independent of the
process of the evaluation circuit to the greatest possible extent
as a result of which an adaptation to new IC processes is
simplified. Depending on the sensor principle, the component can be
reduced to the size of the bonding pads heretofore required on the
IC for bonding as a result of which the cost is not increased due
to additional surface.
[0012] According to the present invention, the sensor chip can be
connected using the so-called "flip-chip method", that is upside
down with eutectic or gold bumps instead of using bonding wires
since the parasitic influences are strongly reduced in comparison
with the two-chip solution. Using this technique, it is also
possible to produce sensors with CSP (chip scale package) whose
package is no more than 20% larger than the chip. A CPS-packaged
chip can be premeasured and trimmed prior to assembly.
[0013] The core of the present invention is the combination of the
single-crystalline and polycrystalline growth during the deposition
of the covering layer in the epitaxial reactor. In the process,
single-crystalline silicon requires a single-crystalline surface as
a starting layer, polycrystalline silicon requires a
polycrystalline starting layer which is preferably deposited using
LPCVD.
[0014] Advantageous refinements and improvements of the respective
objective of the present invention can be found in the
subclaims.
[0015] According to a preferred refinement, a first layer featuring
the micromechanical functional plane has a monocrystalline region
which is epitaxially grown on the underlying monocrystalline region
as well as a polycrystalline region which is epitaxially grown on
the underlying polycrystalline starting layer at the same time.
Thus, the same epitaxial step is used twice in two different
planes.
[0016] According to a further preferred refinement, a first layer
featuring the micromechanical functional plane has an SOI-type
monocrystalline region formed above an insulator layer with the
substrate. This has the advantage that the buried polysilicon layer
can be omitted and that one epitaxial step is dropped. Preferably
used as silicon is a single-crystalline, high-doped base material
which is free of mechanical stress.
[0017] According to another preferred refinement, the
monocrystalline region includes a second layer which is deposited
on the first layer and which features one or a plurality of
integrated circuit elements of an evaluation circuit or wiring
elements. In this manner, a so-called "monolithically integrated
one-chip solution" can be attained.
[0018] According to a further preferred embodiment, the
polycrystalline region of the micromechanical functional plane
features a movable sensor structure.
[0019] According to a further preferred refinement, the
micromechanical functional plane features a buried polysilicon
layer underneath the movable sensor structure.
[0020] According to another preferred refinement, one or a
plurality of flip-chip connection elements, preferably gold bumps,
are provided in the printed circuit trace plane. This is a rugged
bonding type which is made possible by the substantially planar
surface.
[0021] According to a further preferred embodiment, the component
can be manufactured by silicon surface micromachining.
DRAWINGS
[0022] Exemplary embodiments of the present invention are depicted
in the drawing and will be explained in greater detail in the
following description.
[0023] FIG. 1 shows a schematic cross-sectional view of a
micromechanical component according to a first embodiment of the
present invention,
[0024] FIGS. 2a,b depict a schematic cross-sectional view of a the
manufacturing steps of the micromechanical component according to
FIG. 1; and
[0025] FIG. 3 shows a schematic cross-sectional view of a
micromechanical component according to a second embodiment of the
present invention,
DESCRIPTION OF THE EXEMPLARY EMBODIMENTS
[0026] In the Figures, identical or functionally identical
components are denoted by the same reference symbols.
[0027] FIG. 1 is a schematic cross-sectional view of a
micromechanical component according to a first embodiment of the
present invention.
[0028] In FIG. 1, 1 denotes a silicon substrate wafer, 2 a lower
oxide, 3 buried polysilicon, 4 a contact hole in sacrificial oxide
5, 5 a sacrificial oxide, 6 a first starting polysilicon, 7 a first
single-crystalline silicon of epitaxy, 8 a first epitaxial
polysilicon, 9 an insulating trench, 10 a movable sensor structure,
11 a first refill oxide, 12 a contact hole in refill oxide 11, 13 a
second starting polysilicon, 14 a second single-crystalline silicon
of epitaxy, 15 a second epitaxial polysilicon, 16 an electrical
and/or mechanical connecting element between the first and the
second epitaxial polysilicon, 17 a trench, 18 a second refill
oxide, 19 an oxide for insulating the printed circuit traces, 20 a
cross connection, 21 a printed circuit trace, 22 a contact hole in
printed circuit trace 21 and in refill oxide 18 and 23 an
electronic component of the evaluation circuit.
[0029] 100 denotes a micromechanical functional plane featuring
movable sensor structure 10, here an acceleration sensor, 200 a
covering plane for hermetically sealing movable sensor structure
10, and 300 a printed circuit trace plane.
[0030] In this first embodiment, which can be manufactured by
silicon surface micromachining which is known per se, covering
plane 200, on one hand, features monocrystalline region 14 which is
epitaxially grown on underlying monocrystalline region 7. On the
other hand, covering plane 200 features polycrystalline region 15
which is epitaxially grown on underlying polycrystalline starting
layer 13 at the same time. In other words, monocrystalline and
polycrystalline silicon is grown side by side in one process
step.
[0031] Monocrystalline region 14 of covering plane 200 contains
integrated circuit elements of an evaluation circuit. A CMOS
transistor 23 is illustrated as an example.
[0032] Analogously, micromechanical functional plane 100 features
monocrystalline region 7 which is epitaxially grown on underlying
monocrystalline substrate region 1 and polycrystalline region 8
which is epitaxially grown on underlying polycrystalline starting
layer 6 at the same time. This process step of simultaneously
growing Si in single- and polycrystalline form is carried out both
for sensor structure 10 and for covering plane 200.
[0033] Micromechanical functional plane 100 features buried
polysilicon layer 3 underneath movable sensor structure 10 as a
wiring plane.
[0034] FIGS. 2a,b depict a schematic cross-sectional view of a the
manufacturing steps of the micromechanical component according to
FIG. 1.
[0035] In general, IC processes require a single-crystalline Si
substrate as a starting material for the process. This applies both
to processes with analog components requiring an epitaxially
deposited single-crystalline Si layer and pure CMOS processes not
requiring epitaxy. In this example, therefore, one starts with a
single-crystalline Si wafer as substrate 1.
[0036] In a first step, an oxidation of substrate 1 is carried out
to form lower oxide 2. Subsequently, buried polysilicon 3 is
deposited and patterned as a lower printed circuit trace region. In
a following step, sacrificial oxide 5 is deposited and patterned.
Thereupon, a deposition and patterning of first starting
polysilicon 6, in particular a removal of the starting polysilicon
and of lower oxide 2 are carried out at locations where
single-crystalline silicon (region 7 in FIG. 2a) is intended to
grow on substrate 1 during the later epitaxy step.
[0037] After that, the epitaxy step is carried out in which
monocrystalline silicon region 7 is grown together with
polycrystalline silicon region 8 of micromechanical functional
plane 100. A further step is an optional planarization of the
resulting structure to compensate for slight differences in height
due to the substructure lying between substrate 1 and
polycrystalline silicon region 8.
[0038] Then, as illustrated in FIG. 2b, a refilling is carried out
with refill oxide 11 as well as a patterning of refill oxide 11 to
form contact holes 12. Subsequently, second starting polysilicon
layer 13 is deposited and patterned together with first refill
oxide 11, in particular, second starting polysilicon layer 13 and
refill oxide 11 are removed where single-crystalline silicon
(region 14 in FIG. 2b) is intended to grow on region 7. In a
subsequent process step, the second epitaxial process follows in
which monocrystalline silicon is deposited in region 14 and
polycrystalline silicon is concurrently deposited in region 15.
Again, optionally, a planarization of the resulting covering layer
is carried out to compensate for the substructure between
polysilicon region 8 and polysilicon region 15.
[0039] Thereupon, trenches 17 which are used for insulation and as
etch holes for removing first refill oxide 11 are formed in second
epitaxial polysilicon 15. The etch profile of trenches 17 can be
selected in such a manner that they widen downward as indicated in
FIG. 2b. The upper opening diameter should be selected to be
minimal so that the deposition of second refill oxide 18 can be
accomplished more quickly and, in fact, without a significant
quantity of second refill oxide 18 getting into movable sensor
structure 10. Thus, an anisotropic oxide deposition is desired and,
to be more precise, only on the surface if possible.
[0040] In a subsequent process step, movable sensor structure 10 is
etched free by removing lower oxide 2, sacrificial oxide 5 and
first refill oxide 11 through etch trenches 17. For better control,
it would also be possible to divide the etching free into two steps
in that, prior to depositing first refill oxide 11, lower oxides 2
and 5 are removed and first refill oxide 11 is deposited only then.
An important advantage of this process lies in that, during
sacrificial layer etching which is presently carried out with HF
vapor, no electronic circuit or aluminum are present yet which, in
the case of back-end processes, can be protected only with great
difficulty and effort.
[0041] In the next step, second refill oxide 18 is deposited and
patterned, a predetermined pressure is adjusted, and a
predetermined gas atmosphere is adjusted during the final closing
of the hollow spaces by second refill oxide 18, which determines
the properties of the enclosed gas consequently, inter alia, the
attenuation of mechanical sensor structure 10.
[0042] Subsequent to the completion of the micromechanical
component, the IC process, for example a CMOS or BiCMOS process,
can now be carried out for manufacturing the evaluation circuit in
monocrystalline silicon region 14. Thereupon, a deposition and
patterning of printed circuit trace plane 300, in particular of
oxide 19 and printed circuit trace aluminum 21 take place. To
complete the component, usually, the chips are diced and an
assembly is carried out as with standard IC components.
[0043] FIG. 3 is a schematic cross-sectional view of a
micromechanical component according to a second embodiment of the
present invention.
[0044] In FIG. 3, in addition to the reference symbols already
introduced, 24 denotes an SOI (Silicon on Insulator) layer and 25
an insulator layer. In this second embodiment, thus, substrate 1,
insulator layer 25 and monocrystalline silicon layer 24 form an SOI
structure which is known per se.
[0045] In the so designed component, lower oxide 2, buried
polysilicon 3, contact hole 4 in sacrificial oxide 5, sacrificial
oxide 5, first starting polysilicon 6, first single-crystalline
silicon of epitaxy 7, and first epitaxial polysilicon 8 are
omitted.
[0046] Consequently, if such an SOI wafer is used as the starting
material, then numerous process steps are dropped since then, the
mechanically active structure is formed from SOI material 24. In
this second embodiment, thus, the entire wiring is transferred into
printed circuit trace plane 300.
[0047] Although the present invention has been described above in
the light of preferred exemplary embodiment, it is not limited
thereto but can be modified in many ways.
[0048] In particular, it is possible to use arbitrary
micromechanical base materials such as germanium and not only the
silicon substrate specified by way of example.
[0049] Also, it is possible to form arbitrary sensor structures and
not only the illustrated acceleration sensor.
[0050] Region 15 does not necessarily have to be polycrystalline
but can also be recrystallized or the like.
* * * * *