U.S. patent application number 09/525105 was filed with the patent office on 2003-01-16 for semiconductor circuit assembly having a plated leadframe including gold selectively covering areas to be soldered.
Invention is credited to Abbott, Donald C., Moehle, Paul R..
Application Number | 20030011048 09/525105 |
Document ID | / |
Family ID | 22419101 |
Filed Date | 2003-01-16 |
United States Patent
Application |
20030011048 |
Kind Code |
A1 |
Abbott, Donald C. ; et
al. |
January 16, 2003 |
SEMICONDUCTOR CIRCUIT ASSEMBLY HAVING A PLATED LEADFRAME INCLUDING
GOLD SELECTIVELY COVERING AREAS TO BE SOLDERED
Abstract
A leadframe for use with integrated circuit chips comprising a
plated layer of gold selectively covering areas of said leadframe
intended for solder attachment; and said gold layer providing a
visual distinction to said areas.
Inventors: |
Abbott, Donald C.; (Norton,
MA) ; Moehle, Paul R.; (Seekonk, MA) |
Correspondence
Address: |
Gary C Honeycutt
Texas Instruments Incorporated
PO Box 655474
MS 3999
Dallas
TX
75265
US
|
Family ID: |
22419101 |
Appl. No.: |
09/525105 |
Filed: |
March 14, 2000 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
60125304 |
Mar 19, 1999 |
|
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|
Current U.S.
Class: |
257/666 ;
257/677; 257/692; 257/763; 257/E23.054; 438/123; 438/683 |
Current CPC
Class: |
H01L 2924/01083
20130101; H01L 2224/48673 20130101; H01L 2224/48644 20130101; H01L
2224/48739 20130101; H01L 2224/48764 20130101; H01L 2224/73265
20130101; H01L 2924/15747 20130101; H01L 2924/01032 20130101; H01L
2224/48864 20130101; H01L 2224/85439 20130101; H01L 2924/01028
20130101; H01L 2924/0105 20130101; H01L 2224/45147 20130101; H01L
2224/85473 20130101; H01L 2924/01045 20130101; H01L 2924/01078
20130101; H01L 2924/01006 20130101; H01L 2224/48773 20130101; H01L
2224/45144 20130101; H01L 2924/181 20130101; H01L 2924/01014
20130101; H01L 2924/014 20130101; H01L 2224/48744 20130101; H01L
2924/01029 20130101; H01L 2924/01079 20130101; H01L 2224/48839
20130101; H01L 2224/48664 20130101; H01L 2224/32245 20130101; H01L
2224/48247 20130101; H01L 2224/48599 20130101; H01L 2924/01049
20130101; H01L 2224/48844 20130101; H01L 2924/01005 20130101; H01L
2924/14 20130101; H01L 2224/45124 20130101; H01L 2224/48873
20130101; H01L 2224/85444 20130101; H01L 2924/01031 20130101; H01L
2224/48091 20130101; H01L 2224/484 20130101; H01L 2924/01047
20130101; Y02P 70/50 20151101; H01L 2924/01013 20130101; H01L
23/49582 20130101; H01L 24/48 20130101; H05K 3/3426 20130101; H01L
24/73 20130101; H01L 2224/85464 20130101; H01L 24/45 20130101; H01L
2224/48699 20130101; H01L 2224/48639 20130101; H01L 2224/45124
20130101; H01L 2924/00014 20130101; H01L 2224/45144 20130101; H01L
2924/00014 20130101; H01L 2224/45147 20130101; H01L 2924/00014
20130101; H01L 2224/484 20130101; H01L 2924/00014 20130101; H01L
2224/48091 20130101; H01L 2924/00014 20130101; H01L 2224/73265
20130101; H01L 2224/32245 20130101; H01L 2224/48247 20130101; H01L
2924/00012 20130101; H01L 2924/15747 20130101; H01L 2924/00
20130101; H01L 2224/48839 20130101; H01L 2924/00 20130101; H01L
2224/48844 20130101; H01L 2924/00 20130101; H01L 2224/48864
20130101; H01L 2924/00 20130101; H01L 2224/48873 20130101; H01L
2924/00 20130101; H01L 2224/48639 20130101; H01L 2924/00 20130101;
H01L 2224/48644 20130101; H01L 2924/00 20130101; H01L 2224/48664
20130101; H01L 2924/00 20130101; H01L 2224/48673 20130101; H01L
2924/00 20130101; H01L 2224/48739 20130101; H01L 2924/00 20130101;
H01L 2224/48744 20130101; H01L 2924/00 20130101; H01L 2224/48764
20130101; H01L 2924/00 20130101; H01L 2224/48773 20130101; H01L
2924/00 20130101; H01L 2924/181 20130101; H01L 2924/00012
20130101 |
Class at
Publication: |
257/666 ;
438/123; 257/677; 257/692; 257/763; 438/683 |
International
Class: |
H01L 021/48; H01L
023/495; H01L 029/40 |
Claims
We claim:
1. A leadframe for use with integrated circuit chips comprising: a
plated layer of gold selectively covering areas of said leadframe
intended for solder attachment; and said gold layer providing a
visual distinction to said areas.
2. A leadframe for use with integrated circuit chips, having a chip
mount pad and a plurality of lead segments, comprising: a leadframe
base made of copper or copper alloy; a first layer of nickel
deposited on said copper or copper alloy; a layer of an alloy of
nickel and palladium on said first nickel layer; a second layer of
nickel on said alloy layer, said second nickel layer deposited to
be suitable for bending of said lead segments, wire bonding, and
solder attachment; a layer of palladium, said palladium layer
deposited to be suitable for protecting the nickel surface for wire
bonding and solderability, and for adhesion to molding compound;
and a layer of gold selectively covering areas of said lead
segments intended for solder attachment, said layer of gold
providing a visual distinction to said areas and having a thickness
to optimize solder attachment.
3. The leadframe according to claim 2 wherein said gold layer has a
thickness in the range from 2 to 5 nm.
4. The leadframe according to claim 2 wherein said first nickel
layer has a thickness in the range from 50 to 150 nm.
5. The leadframe according to claim 2 wherein said alloy layer has
a thickness in the range from 50 to 150 nm.
6. The leadframe according to claim 2 wherein said second nickel
layer has a thickness in the range from 1000 to 3000 nm.
7. The leadframe according to claim 2 wherein said palladium layer
has a thickness in the range from 25 to 75 nm.
8. The leadframe according to claim 2 wherein said copper or copper
alloy base has a thickness between about 100 and 250 .mu.m.
9. The leadframe according to claim 2 wherein said solder
attachment comprises solder materials selected from a group
consisting of tin/lead, tin/indium, tin/silver, tin/bismuth and
conductive adhesive compounds.
10. The leadframe according to claim 1 wherein said leadframe
comprises an iron-nickel alloy or invar base, selectively plated
with gold.
11. A semiconductor device comprising: a leadframe comprising a
chip mount pad for an integrated circuit chip and a plurality of
lead segments having their first end near said mount pad and their
second end remote from said mount pad; said leadframe having a
first surface layer of nickel, a layer of an alloy of nickel and
palladium, a second layer of nickel, and a layer of palladium; said
leadframe further having an outermost layer of gold selectively
covering said second ends of said lead segments in a thickness
suitable to optimize solder attachment; an integrated circuit chip
attached to said mount pad; bonding wires interconnecting said chip
and said first ends of said lead segments; encapsulation material
surrounding said chip, bonding wires and said first ends of said
lead segments, whereby the adhesion between said encapsulation
material and said surrounded parts is maximized; and said
encapsulation material leaving said second ends of said lead
segments exposed, whereby the solder attachment to said gold layer
is maximized.
12. The device according to claim 11 wherein said bonding wires are
selected from a group consisting of gold, copper, aluminum and
alloys thereof.
13. The device according to claim 11 wherein the bonding wire
contacts to said first ends of said lead segments comprise welds
made by ball bonds, stitch bonds, or wedge bonds.
14. The device according to claim 11 wherein said encapsulation
material is selected from a group consisting of epoxy-based molding
compounds suitable for adhesion to said leadframe.
15. The device according to claim 11 further comprising lead
segments having said second ends bent, whereby said segments obtain
a form suitable for solder attachment.
16. A method for fabricating a leadframe comprising a chip mount
pad and a plurality of lead segments having their first end near
said mount pad and their second end remote from said mount pad,
comprising the steps of: selectively masking said chip pad and said
first segment ends, thereby leaving said second segment ends
exposed; and plating a layer of gold on said exposed segment ends
in a thickness suitable to optimize solder attachment, thereby
creating a visual distinction between the gold-plated and unplated
leadframe areas.
17. A method for fabricating a leadframe comprising the steps of:
providing a copper leadframe having a mount pad for an integrated
circuit chip and a plurality of lead segments having their first
end near said mount pad and their second end remote from said mount
pad; cleaning said leadframe in alkaline soak cleaning and alkaline
electrocleaning; activating said leadframe by immersing said
leadframe into an acid solution, thereby dissolving any copper
oxide; immersing said leadframe into an electrolytic nickel plating
solution and depositing a first layer of nickel onto said copper;
electroplating a layer comprising an alloy of nickel and palladium;
electroplating a second layer of nickel, thereby adapting said lead
segments for mechanical bending; electroplating a layer of
palladium; selectively masking said chip pad and said first segment
ends, thereby leaving said second segment ends exposed; and plating
a layer of gold on said exposed segment ends in a thickness
suitable to optimize solder attachment, thereby creating a visual
distinction between the gold-plated and unplated leadframe
areas.
18. The method according to claim 17 wherein said gold plating is
performed electrolytically or electrolessly.
19. The method according to claim 17 wherein said masked parts of
said leadframe comprise the leadframe areas to be encapsulated by
molding compound.
20. The method according to claim 17 wherein the process steps are
executed in sequence without time delays, yet including
intermediate rinsing steps.
21. The method according to claim 17 wherein said acid solution may
be sulfuric acid, hydrochloric acid or any other acid.
22. A method for fabricating a leadframe comprising the steps of:
providing a copper leadframe having a mount pad for an integrated
circuit chip and a plurality if lead segments having their first
end near said mount pad and their second end remote from said mount
pad; cleaning said leadframe in alkaline soak cleaning and alkaline
electrocleaning; activating said leadframe by immersing said
leadframe into an acid solution, thereby dissolving any copper
oxide; electroplating a layer of nickel, thereby adapting said lead
segments for mechanical bending; electroplating a layer of
palladium; selectively masking said chip pad and said first segment
ends, thereby leaving said second segment ends exposed; and plating
a layer of gold on said exposed segment ends in a thickness
suitable to optimize solder attachment, thereby creating a visual
distinction between the gold-plated and unplated leadframe areas.
Description
FIELD OF THE INVENTION
[0001] The present invention is related in general to the field of
semiconductor devices and processes and more specifically to the
materials and fabrication of leadframes for integrated circuit
devices.
DESCRIPTION OF THE RELATED ART
[0002] The leadframe for semiconductor devices was invented (U.S.
Pat. Nos. 3,716,764 and 4,034,027) to serve several needs of
semiconductor devices and their operation simultaneously: First of
all, the leadframe provides a stable support pad for firmly
positioning the semiconductor chip, usually an integrated circuit
(IC) chip. Since the leadframe including the pads is made of
electrically conductive material, the pad may be biased, when
needed, to any electrical potential required by the network
involving the semiconductor device, especially the ground
potential.
[0003] Secondly, the leadframe offers a plurality of conductive
segments to bring various electrical conductors into close
proximity of the chip. The remaining gap between the ("inner") tip
of the segments and the conductor pads on the IC surface are
typically bridged by thin metallic wires, individually bonded to
the IC contact pads and the leadframe segments. Obviously, the
technique of wire bonding implies that reliable welds can be formed
at the (inner) segment tips.
[0004] Thirdly, the ends of the lead segment remote from the IC
chip ("outer" tips) need to be electrically and mechanically
connected to "other parts" or the "outside world", for instance to
assembly printed circuit boards. In the overwhelming majority of
electronic applications, this attachment is performed by soldering.
Obviously, the technique of soldering implies that reliable wetting
and solder contact can be performed at the (outer) segment
tips.
[0005] It has been common practice to manufacture single piece
leadframes from thin (about 120 to 250 .mu.m) sheets of metal. For
reasons of easy manufacturing, the commonly selected starting
metals are copper, copper alloys, iron-nickel alloys for instance
the so-called "Alloy 42"), and invar. The desired shape of the
leadframe is etched or stamped from the original sheet. In this
manner, an individual segment of the leadframe takes the form of a
thin metallic strip with its particular geometric shape determined
by the design. For most purposes, the length of a typical segment
is considerably longer than its width.
[0006] In the European patent # 0 335 608 B1, issued Jun. 14, 1995
(Abbott, "Leadframe with Reduced Corrosion"), a palladium-plated
leadframe is introduced which is not subject to corrosion due to
galvanic potential forces aiding the migration of the base metal
ions to the top surface where they will form corrosion products.
The patent describes a sequence of layers consisting of nickel
(over the base metal), palladium/nickel alloy, nickel, and
palladium (outermost). This technology has been widely accepted by
the semiconductor industry.
[0007] After assembly on the leadframe, most ICs are encapsulated,
commonly by plastic material in a molding process. It is essential
that the molding compound, usually an epoxy-based thermoset
compound, has good adhesion to the leadframe and the device parts
it encapsulates. Palladium, described above as the outermost layer
of the leadframe, offers excellent adhesion to molding
compounds.
[0008] Unfortunately, palladium is expensive; its price climbed in
the last decade from about one third of the gold price to about 20%
higher than gold. Cost reduction pressures in semiconductor
manufacturing have initiated efforts to reduce the thickness of the
palladium layers employed to about one third of its previous
thickness. At this thinness, palladium does not prevent oxidation
of the underlying nickel which will inhibit its solderability. A
method introduced in semiconductor manufacturing uses a thin layer
of gold on the palladium surface to prevent oxidation. One related
example is described in U.S. Pat. No. 5,859,471, issued on Jan. 12,
1999 (Kuraishi et al., "Semiconductor Device having TAB Tape
Leadframe with Reinforced Outer Leads").
[0009] In these methods, however, the entire surfaces of the
leadframe are plated with gold. This practice severely inhibits the
adhesion of the leadframe segments to molding compounds and risks
delamination in thermomechnical stress testing. Furthermore, the
plating of the complete leadframe with a thin gold layer makes it
impossible to decide by visual inspection whether a leadframe has
the gold surface or not. Such standard simple inspection, however,
is highly desirable as manufacturing practice. Finally, the
deposition of gold in unnecessary areas is counterproductive to
cost saving efforts.
[0010] An urgent need has therefore arisen for a low-cost, reliable
mass production method for a leadframe having reduced palladium
layer thickness combined with solderablility, bondability, adhesion
capability to molding compounds, and visual inspection contrasts.
The leadframe and its method of fabrication should be flexible
enough to be applied for different semiconductor product families
and a wide spectrum of design and assembly variations, and should
achieve improvements toward the goals of improved process yields
and device reliability. Preferably, these innovations should be
accomplished using the installed equipment base so that no
investment in new manufacturing machines is needed.
SUMMARY OF THE INVENTION
[0011] According to the present invention for a semiconductor
integrated circuit (IC) leadframe, a plated layer of gold
selectively covers areas of the leadframe intended for soldering,
providing a visual distinction to those areas and optimizing solder
attachment. While this layer of gold is very thin and thus barely
adds to the leadframe cost, it enables substantial savings of
underlying plated metals without diminishing the leadframe quality
for wire bonding and for adhesion to molding compounds.
[0012] The present invention is related to high density ICs,
especially those having high numbers of inputs/outputs, or contact
pads, and also to devices in packages requiring surface mount in
printed circuit board assembly. These ICs can be found in many
semiconductor device families such as standard linear and logic
products, digital signal processors, microprocessors, digital and
analog devices, high frequency and high power devices, and both
large and small area chip categories. The invention represents a
significant cost reduction of the semiconductor packages,
especially the plastic molded packages, compared to the
conventional copper-based palladium-plated leadframes.
[0013] It is an aspect of the present invention to provide a
technology for reducing the thickness of costly noble metal,
especially palladium, layers while simultaneously improving the
solderability the leadframe and maintaining its reliable adhesion
to plastic molding compounds.
[0014] Another aspect of the invention is to reach these goals
without the cost of equipment changes and new capital investment,
by using the installed fabrication equipment base.
[0015] Another aspect of the present invention is to introduce a
manufacturing quality check based on a simple, low-cost visual
inspection. This check insures the selection of the correct
leadframe and its appropriate preparation before releasing it into
the assembly process flow.
[0016] These aspects have been achieved by the teachings of the
invention concerning masking and deposition methods suitable for
mass production. Various modifications of leadframe preparations
have been successfully employed.
[0017] In the first embodiment of the invention, the frequently
used layer sequence of first nickel, palladium-nickel alloy, second
nickel and palladium is modified so that the palladium layer
thickness is reduced across the entire leadframe and a thin layer
of gold is selectively plated on lead segment areas intended for
solder attachment, preventing the oxidation of the underlying
nickel and thus preserving its solderability.
[0018] In the second embodiment of the invention, the first nickel
layer and the palladium-nickel alloy layer are omitted. Again,
solderability, bondability, adhesion to plastics, and corrosion
insensitivity are demonstrated.
[0019] Leadframes prepared according to the invention can be
successfully used in surface mount technologies based on bending
the package lead segments.
[0020] The technical advances represented by the invention, as well
as the aspects thereof, will become apparent from the following
description of the preferred embodiments of the invention, when
considered in conjunction with the accompanying drawings and the
novel features set forth in the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0021] FIG. 1 is a schematic cross sectional view of a portion of a
leadframe made according to the first embodiment of the
invention.
[0022] FIG. 2 is a schematic cross sectional view of a portion of a
leadframe made according to the second embodiment of the
invention.
[0023] FIG. 3 is a schematic and simplified cross sectional view of
a package semiconductor device having a leadframe according to the
invention, solder assembled on a substrate.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0024] The present invention is related to the assembly of
semiconductor ICs on leadframes and their final encapsulation, the
sequential construction of these leadframes using deposited layers
of various metals, and the process of fabricating these leadframes
so that they offer quality-related visual inspection and reliable
solder attachment to substrates.
[0025] The invention reduces the cost of leadframes while the
leadframe functions are maximized. The invention best applies to
any leadframe and any substrate used in semiconductor technology
which exhibit the following design features: Usually, a chip pad
for support of the IC chip surrounded by lead segments having an
inner tip in proximity of the chip pad, and outer tips remote from
the chip pad. The invention thus applies to semiconductor package
types such as PDIPs, SOICs, QFPs, SSOPs, TQFPs, TSSOPs and
TVSOPs.
[0026] For PDIPs, the gold spot is applied to both sides of the
outer segments. For gull wing devices (see below FIG. 3), the gold
spot is only required on the surface of the segment that faces the
assembly board. For J-leaded devices, the gold is on the outside of
the J-bend; it may also cover the edges of the segment.
[0027] The base metal of leadframes is typically copper or copper
alloys. Other choices comprise iron-nickel alloys ("Alloy 42"),
invar, or aluminum.
[0028] Leadframe segments have to satisfy five needs in
semiconductor assembly:
[0029] 1) Leadframes have to comprise outer segment tips for solder
attachment to other parts;
[0030] 2) leadframes have to comprise inner segment tips for bond
attachments to wires;
[0031] 3) leadframes have to comprise outer segments ductile for
forming and bending the segments;
[0032] 4) leadframe surfaces have to comprise adhesion to molding
compounds; and
[0033] 5) leadframe segments have to comprise insensitivity to
corrosion.
[0034] According to the teachings of this invention, Need 1) is
satisfied by selectively depositing a layer of gold where, and only
where, a solder joint has to be made. This gold layer is plated
over a layer of a noble metal, usually palladium, which is
intentionally made thin. While at this thinness, the palladium
would not prevent the oxidation of the underlying nickel, together
with the thin gold layer such protection is provided and the
solderablilty of the nickel guaranteed.
[0035] As stated above, the final form of the outer lead segments
after bending determines where the gold is required.
[0036] The invention satisfies Need 2) by the choice of the noble
metal layer employed to fulfill Need 1). For palladium, a thin
layer is sufficient for reliable bonding wire attachment (stitch
bonds, ball bonds, or wedge bonds).
[0037] The invention satisfies Need 3) by the selection of
thickness and structure of the nickel layer employed to fulfill
need 1). Thickness and deposition method of the nickel layer have
to be selected such that the layer insures ductility and enables
the bending and forming of the outer lead segments.
[0038] The invention satisfies Need 4) by the choice of the noble
metal layer employed to fulfill need 1); a practical selection is
palladium with its excellent adhesion to thermoset molding
compounds and other encapsulation materials. From the standpoint of
maximum adhesion, it is an advantage that the invention avoids gold
inside the finished package.
[0039] The invention satisfies Need 5) by the sequence of layers
deposited over the copper base. The optimum corrosion insensitivity
is achieved by the layer sequence described in FIG. 1.
[0040] In the embodiment of the invention in FIG. 1, the schematic
cross section of a leadframe portion according to the invention is
generally designated 100. The copper or copper alloy base sheet 101
has a preferred thickness in the range from 100 to 300 .mu.m;
thinner sheets are possible. The ductility in this thickness range
provides the 5 to 15% elongation needed in the segment bending and
forming operation. The leadframe is stamped or etched from the
starting metal sheet. The stamped or etched leadframe is first
immersed in an alkaline preclean solution at 20 to 90.degree. C.
for few seconds up to 3 minutes. Oils, grease, soil, dirt and other
contamination are thereby removed.
[0041] After rinsing, the leadframe is next immersed in an acid
activation bath at room temperature for few seconds up to 5
minutes. The bath consists of a solution of sulfuric acid,
hydrochlorid acid, or other acid solution, preferably at about 30
to 60 g/l concentration. This solution removes copper oxide and
leaves the metallic copper oxide surface in an activated state,
ready to accept the deposition of metallic nickel.
[0042] The nickel layer 102 is electroplated to a thickness in the
range between about 50 and 150 nm. The next deposited layer 103 is
an alloy between nickel and a noble metal selected from a group
consisting of palladium, rhodium, gold silver, and platinum. The
preferred choice is palladium, with 60 to 80% palladium. The alloy
layer is deposited by electroplating and between about 25 and 150
nm thick; it should be coherent since its main purpose is corrosion
protection.
[0043] The important layer 104 is electroplated nickel, deposited
preferably for a thickness of about 0.5 to 3 .mu.m. This nickel
layer has to be ductile in order to be malleable in the leadframe
segment bending and forming process. Further, the nickel surface
has to be wettable in the soldering process, so that solder alloys
or conductive adhesives can be used successfully.
[0044] The overall thickness of the two nickel layers and the
nickel alloy layer is in the range of about 650 to 4000 nm.
[0045] The next deposited layer of the embodiment in FIG. 1 is the
layer 105, comprising an electroplated noble metal selected from a
group consisting of palladium, rhodium, gold and silver. The
preferred embodiment is palladium; however, if minimum
interdiffusion with solder is desired, layer 105 may also consist
of platinum. Since the cost of palladium has increased
significantly in the last few years, it is important that the
present invention reduces its thickness from the value it
customarily had (about three times larger). According to the
invention, layer 105 is preferably between about 10 and 30 nm
thick, when palladium is chosen.
[0046] In this thickness range, palladium is suitable for all wire
bonding attachments (stitch bonds, ball bonds, and wedge bonds) and
retains its excellent adhesion to thermoplastic molding
compounds--an attribute crucial for avoiding package delamination
and progressive corrosion.
[0047] The outermost layer of the embodiment in FIG. 1 is layer
106, comprising selectively plated gold in the thickness range of
about 2 to 5 nm. Its purpose is to prevent surface oxidation of the
underlying layer 104 wherever solder joints are to be made. As FIG.
1 shows, a mask, covering portions of layer 105, allows the gold
deposition beginning at a limit 106a so that the gold is
spot-plated in the areas where solderablility is required.
[0048] In this thickness range, gold not only reliably provides
good solderablilty, but also provides a visual distinction between
the gold-plated areas and the adjacent palladium or nickel surfaces
without gold deposition. This contrast between covered and
uncovered areas can readily be seen by the unaided eye and is,
therefore, well suited for automated visual inspection in
manufacturing process control, contributing to product quality
assurance.
[0049] There are several methods to selectively deposit metals from
solution onto a continuous strip. For high volume production of
leadframes, continuous strip or reel-to-reel plating is
advantageous. The process steps of the preferred methods are as
follows.
[0050] STEP AND REPEAT
[0051] Leadframe material is stopped in selective plating head;
[0052] rubber mask system clamps on material;
[0053] plating solution is jetted at material;
[0054] current is applied;
[0055] current is shut off;
[0056] solution is shut off;
[0057] head opens;
[0058] material moves.
[0059] Advantages: Very sharp plating spot with excellent edge
definition; very good spot location capability when used with index
holes, pins and feedback vision system.
[0060] Disadvantages: Slow; material must stop during selective
plating; expensive equipment to buy and maintain; timing issues;
lots of moving parts.
[0061] WHEEL SYSTEM
[0062] Material is moved over a large diameter wheel with apertures
in it to allow solution flow to material;
[0063] backing belt is used to hold material on wheel and mask
backside of material;
[0064] anode is stationary inside wheel.
[0065] Advantages: Fast, material never stops for selective
plating; no timing issues; pumps, rectifiers, and drive system are
on continuously; lower cost because less complicated
mechanically.
[0066] Disadvantages: None for gold spot plating (poor edge shape,
poor spot location, and bleedout are not critical issues).
[0067] In the embodiment of the invention shown in the schematic
cross section of FIG. 2, the copper or copper alloy base of the
leadframe is directly followed by the electroplated nickel layer
104; the additional nickel layer and the nickel/palladium alloy
layer are omitted. The thickness range of nickel layer 104 is again
about 0.5 to 3 .mu.m. According to the present invention, the
electroplated noble metal layer 105 (for example, palladium) is
only about 10 to 30 nm thick. The outermost layer is the thin,
selectively plated gold layer 106 with a preferred thickness range
from about 2 to 5 nm. As FIG. 2 shows, a mask allows the gold
deposition to begin at limit 106a so that the gold is spot-plated
in the areas where solderability is required.
[0068] In the schematic cross section of FIG. 3, the copper or
copper alloy leadframe 301 of the invention is shown as applied in
the assembly of a semiconductor package generally designated 300.
Leadframe 301 has a chip mount pad 302 onto which an IC chip 303 is
attached using adhesive material 304 (typically an epoxy or
polyimide which has to undergo polymerization). Leadframe 301
further has a plurality of lead segments 305. These lead segments
have a first end 305a near the chip mount pad 302 and their second
end 305b remote from mount pad 302.
[0069] As shown in FIG. 3 schematically, leadframe 305 comprises
base 306 made of copper or copper alloy. On the surface of this
copper is a sequence of layers, described in detail in FIG. 1.
Closest to the copper is a first layer 307 of nickel. This layer is
followed by an alloy layer 308 made of nickel and a noble metal,
preferably palladium, and a second layer 309 of nickel. The top
layer inside the package and on some portions of lead segments 305
is layer 310, made of a noble metal, preferably palladium.
[0070] As described in conjunction with FIG. 1, this sequence of
layers provides reliable protection against corrosion, reliable
adhesion to the plastic encapsulation compound, and reliable wire
bonding for connecting the chip contact pads to the leadframe
segments. In FIG. 3, bonding wires 311 have stitches 312 welded to
the palladium surface 310 of leadframe segments 305. The bonding
wires are selected from a group consisting of gold, copper,
aluminum, and alloys thereof. Any of these metals provide reliable
welds to the layered leadframes of the invention.
[0071] As shown in FIG. 3, the second ends 305b of segments 305 are
suitable for bending and forming due to the ductility of the copper
base and the electroplated nickel layer. Using this malleable
characteristic, segments 305 may be formed in any shape required
for surface mounting or any other technique of board attach of the
semiconductor devices. The bending of the segments does not
diminish the corrosion protection of the second segment ends 305b.
For example, FIG. 3 indicates a so-called "gull wing shape" of
segments 305. This shape is widely used for IC packages in the
so-called "small outline" configuration, as illustrated in FIG.
3.
[0072] Outermost layer 313 in FIG. 3 is the spot-plated thin gold
layer of the present invention. This gold layer covers the area of
the outer segment ends 305b where the solder joints are made. Due
to border line 313a, the gold can be distinguished from the
palladium and nickel surface near the plastic outline. In an
embodiment different from FIG. 3, the gold of gull-wing devices
covers only the surface of the segments that face the assembly
board; in this case, the gold can also be distinguished from the
palladium surface when compared to the reverse side of the
segment.
[0073] The gold spot-plated copper leadframe of the invention
provides for easy and reliable solder attachment to boards or other
parts of the formed leadframe segments. In FIG. 3, solder attach
material 314 comprises materials selected from a group consisting
of tin/lead mixture, tin/indium, tin/silver, tin/bismuth, and
conductive adhesive compounds. When palladium is selected as the
metal of layer 310, it may be dissolved (not shown in FIG. 3) into
the solder material during the attachment process so that direct
solder wetting to the nickel layer 309 is achieved.
[0074] In FIG. 3, molding compound 315 encapsulates the mounted
chip 303, bonding wires 311 and the first ends 305a of the lead
segments 305. The second, remote ends 305b of the segments are not
included in the molded package; they remain exposed for solder
attachment. Typically, the encapsulation material 315 is selected
from a group consisting of epoxy-based molding compounds suitable
for adhesion to layer 310 of the leadframe. For palladium,
excellent adhesion characteristics to molding compounds can be
achieved, preventing package delamination, moisture ingress and
corrosion.
[0075] While this invention has been described in reference to
illustrative embodiments, this description is not intended to be
construed in a limiting sense. Various modifications and
combinations of the illustrative embodiments, as well as other
embodiments of the invention, will be apparent to persons skilled
in the art upon reference to the description. As an example, the
material of the semiconductor chip may comprise silicon, silicon
germanium, gallium arsenide, or any other semiconductor material
used in manufacturing. As another example, the design, cover area
and fabrication method of the gold layer may be modified to suit
specific leadframe or substrate needs. It is therefore intended
that the appended claims encompass any such modifications or
embodiments.
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