U.S. patent application number 09/729127 was filed with the patent office on 2002-01-24 for schottky diode having increased forward current with improved reverse bias characteristics and method of fabrication.
This patent application is currently assigned to Advanced Power Devices. Invention is credited to Chang, Paul, Chern, Geeng-Chuan, Hsueh, Wayne Y.W., Rodov, Vladimir.
Application Number | 20020008237 09/729127 |
Document ID | / |
Family ID | 27088651 |
Filed Date | 2002-01-24 |
United States Patent
Application |
20020008237 |
Kind Code |
A1 |
Chang, Paul ; et
al. |
January 24, 2002 |
Schottky diode having increased forward current with improved
reverse bias characteristics and method of fabrication
Abstract
A Schottky diode comprises a semiconductor body of one
conductivity type, the semiconductor body having a grooved surface,
a metal layer on the grooved surface and forming a Schottky
junction with sidewalls of the grooved surface and ohmic contacts
with top portions of the grooved surface. The semiconductor body
preferably includes a silicon substrate with the grooved surface
being on a device region defined by a guard ring of a conductivity
type opposite to the conductivity type of the semiconductor body,
and a plurality of doped regions at the bottom of grooves and
forming P-N junctions with the semiconductor body. The P-N
junctions of the doped regions form carrier depletion regions
across and spaced from the grooves to increase the reverse bias
breakdown voltage and reduce the reverse bias leakage current. The
ohmic contacts of the metal layer increase forward current and
reduce forward voltage of the Schottky diode.
Inventors: |
Chang, Paul; (Saratoga,
CA) ; Chern, Geeng-Chuan; (Cupertino, CA) ;
Hsueh, Wayne Y.W.; (San Jose, CA) ; Rodov,
Vladimir; (Redondo Beach, CA) |
Correspondence
Address: |
TOWNSEND AND TOWNSEND AND CREW
TWO EMBARCADERO CENTER
EIGHTH FLOOR
SAN FRANCISCO
CA
94111-3834
US
|
Assignee: |
Advanced Power Devices
|
Family ID: |
27088651 |
Appl. No.: |
09/729127 |
Filed: |
December 1, 2000 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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09729127 |
Dec 1, 2000 |
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09620074 |
Jul 20, 2000 |
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09729127 |
Dec 1, 2000 |
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09620653 |
Jul 20, 2000 |
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Current U.S.
Class: |
257/54 ;
257/E21.359; 257/E29.338 |
Current CPC
Class: |
H01L 29/66143 20130101;
H01L 29/781 20130101; H01L 21/2815 20130101; H01L 29/872
20130101 |
Class at
Publication: |
257/54 |
International
Class: |
H01L 031/036 |
Claims
What is claimed is:
1. A Schottky diode comprising a) a semiconductor body of one
conductivity type and having a major surface, b) a guard ring of
opposite conductivity type formed in the major surface of second
conductivity type and surrounding a device region, c) a plurality
of trenches in the major surface within the device region, d) doped
regions of said opposite conductivity type formed in the
semiconductor body at the bottom of trenches, said doped region
forming P-N junctions with the semiconductor body, and e) a metal
overlying the device region and in the plurality of trenches
forming a Schottky junction with sidewalls of the trenches and
ohmic contacts with the major surface between trenches.
2. The semiconductor body of claim 1 wherein the semiconductor body
is silicon.
3. The semiconductor body of claim 2 wherein the semiconductor body
comprises a substrate and an epitaxial layer, the epitaxial layer
being of N-conductivity with the major surface of the epitaxial
layer between trenches having a high N dopant concentration to make
ohmic contacts with the metal layer.
4. The semiconductor body of claim 2 wherein the guard ring is
P-type conductivity.
5. The semiconductor body of claim 4 wherein the metal overlying
the device region is selected from the group consisting of
molybdenum, platinum, aluminum, refractory metal and suicides
thereof.
6. The semiconductor body of claim 5 and further including contact
metal on the bottom of the semiconductor body and on the metal
overlying the device region.
7. The semiconductor body of claim 6 wherein the contact metal is
selected from the group consisting of Ti, TiN, Ni, Ag, Au, Cu, and
combinations thereof.
8. The semiconductor body of claim 1 and further including contact
metal on the bottom of the semiconductor body and on the metal
overlying the device region.
9. The semiconductor body of claim 8 wherein the contact metal is
selected from the group consisting of Ti, TiN, Ni, Ag, Au, Cu, and
combinations thereof.
10. A method of fabricating a Schottky diode comprising a)
providing a semiconductor body of one conductivity type and having
a major surface, b) forming a guard ring of opposite conductivity
type in the major surface and surrounding a device region, c)
increasing the dopant of one conductivity type in the major surface
in the device region, d) forming a plurality of trenches in the
major surface in the device region, e) forming doped regions of
opposite conductivity type in the semiconductor body at the bottom
of trenches, the doped regions forming P-N junctions with the
semiconductor body, and f) forming a Schottky metal layer over the
major surface in the device region and in the trenches, the
Schottky metal layer forming Schottky junctions with sidewalls of
the trenches and ohmic contacts with the major surface between
trenches.
11. The method of claim 10 and further including the steps of: g)
forming a contact metal layer on a second major surface opposite to
said major surface as a bottom contact, and h) forming a contact
metal layer on the Schottky metal layer as a top contact.
12. The method of claim 11 wherein the semiconductor body comprises
silicon and step f) includes depositing a metal from the group
consisting of molybdenum, platinum, aluminum, refractory metal and
suicides thereof.
13. The method of claim 12 wherein steps g) and h) include
depositing a metal from the group consisting of Ti, TiN, Ni, Ag,
Au, Cu, and combinations thereof.
14. The method of claim 12 wherein the semiconductor body comprises
a substrate of silicon and an epitaxial layer of N-conductivity,
the guard ring being P conductivity.
15. The method as defined by claim 10 wherein step e) includes
selectively masking the trenches with photoresist as an ion mask,
and implanting dopant ions into the doped regions.
16. The method as defined by claim 10 wherein step e) includes
selectively forming an insulating layer on surfaces of the trenches
as an ion mask, and implanting dopant ions into the doped
regions.
17. The method as defined by claim 16 wherein the insulating layer
comprises silicon oxide.
18. The method as defined by claim 17 wherein the silicon oxide is
thermally grown.
19. The method as defined by claim 17 wherein the silicon oxide is
deposited.
20. A Schottky diode comprising a semiconductor body of one
conductivity type, the semiconductor body having a grooved surface,
a metal layer on the grooved surface and forming Schottky junctions
with sidewalls of the grooved surface and ohmic contacts with top
portions of the grooved surface, and a plurality of doped region of
opposite conductivity type in the semiconductor body at bottom
portions of the grooved surface, the doped regions forming P-N
junctions with the semiconductor body.
21. The Schottky diode as defined by claim 20 wherein the
semiconductor body comprises a silicon substrate and an epitaxial
silicon layer of N-conductivity on the substrate, the epitaxial
layer having the grooved surface.
22. The Schottky diode as defined by claim 21 wherein the metal
layer is selected from the group consisting of molybdenum,
platinum, aluminum, refracting metal, silicides thereof, and
combinations thereof.
23. The Schottky diode as defined by claim 20 wherein the grooved
surface is on a device region of the semiconductor body defined by
a guard ring of a second conductivity type surrounding the device
region.
Description
CROSS-REFERENCES TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part of pending
application Ser. No. 09/620,074 filed Jul. 20, 2000, for "Schottky
Diode Having Increased Active Surface Area With Improved Reverse
Bias Characteristics And Method Of Fabrication", and copending
application Ser. No. 09/620,653 filed Jul. 21, 2000, for "Schottky
Diode Having Increased Active Surface Area With Improved Reverse
Bias Characteristics And Method Of Fabrication", the descriptions
of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
[0002] This invention relates generally to power semiconductor
devices, and more particularly the invention relates to a Schottky
diode device and a method of making same.
[0003] Power semiconductor rectifiers have a variety of
applications including use in power supplies and power converters.
Heretofore, Schottky diodes have been used in these applications. A
Schottky diode is characterized by a low turn-on voltage, fast
turnoff, and nonconductance when the diode is reverse biased. To
create a Schottky diode a metal-silicon barrier must be formed. In
order to obtain the proper characteristics for the Schottky diode,
the barrier metal is likely different than the metal used in other
process steps such as metal ohmic contacts.
[0004] Copending application Ser. No. 09/283,537, incorporated
herein by reference, discloses a vertical semiconductor power
rectifier device which employs a large number of parallel connected
cells, each comprising a MOSFET structure with a gate-to-drain
short via common metalization and an associated Schottky diode.
This provides a low Vf path through the channel regions of the
MOSFET cells to the source region on the other side of the device.
The method of manufacturing the rectifier device provides highly
repeatable device characteristics at reduced manufacturing
costs.
[0005] Copending application Ser. No. 09/620,074 and Ser. No.
09/620,653, supra, effectively increase diode surface by providing
a trenched surface on which Schottky material is deposited. The
resulting structure has increased current capacity for
semiconductor chip area. In accordance with the method of
fabricating the Schottky diode, a guard ring is formed around a
device region in a semiconductor chip surface. The guard ring has
conductivity type opposite to that of the chip body. Using
photoresist masking and etching, a plurality of trenches are etched
in the surface of the device region, thereby effectively increasing
the active surface area in the device region. A Schottky metal is
then deposited over the device region in the trenches, and
electrode material is deposited to form top and bottom electrodes
for the Schottky diode.
[0006] To provide for higher reverse breakdown voltage and lower
reverse leakage current, a P-N junction can be formed at or near
the bottom of the trench surfaces so that when the Schottky diode
is reversed biased, a charge depletion region spreads across and
spaced-from the trench surface, thereby increasing the reverse
breakdown voltage and reducing reverse leakage current. In
accordance with a preferred embodiment, the PN junction is formed
by ion implantation in alignment with the trench walls. A
photoresist mask can be employed to define the ion implanted
surface area. Alternatively, an oxide layer can be selectively
formed on the surfaces of the trench surface to limit the
implantation of ions.
[0007] The present invention is directed to an improved method of
manufacturing a Schottky rectifier device and the resulting
structure.
SUMMARY OF THE INVENTION
[0008] In accordance with the invention, the effective surface area
of a Schottky diode is increased by providing a trenched surface on
which Schottky material is deposited. The resulting structure has
increased current capacity for semiconductor chip area.
[0009] To provide for higher reverse breakdown voltage and lower
reverse leakage current, a P-N junction can be formed at or near
the bottom of the trench surfaces so that when the Schottky diode
is reversed biased, a charge depletion region spreads across and
spaced-from the trench surface, thereby increasing the reverse
breakdown voltage and reducing reverse leakage current. In
accordance with a preferred embodiment, the PN junction is formed
by ion implantation in alignment with the trench walls. A
photoresist mask can be employed to define the ion implanted
surface area. Alternatively, an oxide layer can be selectively
formed on the surfaces of the trench surface to limit the
implantation of ions.
[0010] In accordance with a feature of the invention, the top
portions of the trenched surface are doped whereby the Schottky
material forms ohmic contacts thereto and Schottky contacts to the
side surfaces of the trenches. The ohmic contacts increase forward
current and reduce forward voltage of the Schottky diode. Electrode
material is then deposited to form top and bottom electrodes for
the Schottky diode.
[0011] The invention and objects and features thereof will be more
readily apparent from the following detailed description and
appended claims when taken with the drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] FIGS. 1-10 are section views illustrating steps in
fabricating a Schottky diode in accordance with one embodiment of
the invention.
[0013] FIG. 11 is a plan view of the resulting Schottky diode using
the processes of FIGS. 1-10.
[0014] FIGS. 12-18 are section views illustrating steps in
fabricating a Schottky diode in accordance with another embodiment
of the invention.
[0015] Like elements in the figures have the same reference
numerals.
DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS
[0016] FIGS. 1-10 are section views illustrating process steps in
fabricating a Schottky diode in accordance with one embodiment of
the present invention. In FIG. 1 an N+ silicon substrate 10 has an
N- epitaxial silicon layer 12 thereon with layer 12 having a
conductivity of about 0.1-10 ohm cm. A field oxide 14 is grown or
deposited on the surface of epitaxial layer 12 to a thickness of
300-1000 nm.
[0017] In FIG. 2 a photoresist pattern 16 is formed over field
oxide 14 with openings through the photoresist at 18 for the
removal of exposed field oxide and implantation of boron or other
P-type dopant for use in fabricating a guard ring around a device
region. Boron is implanted at 20 at a dose of about
E11-E14/cm.sup.2. The boron implant can be after photoresist
removal.
[0018] In FIG. 3 the photoresist 16 is removed and the body is
heated for boron drive-in in forming deep P-regions 22 which are
the guard ring surrounding a device region under field oxide 14. An
additional boron (BF.sub.2) implant (E13-E15/cm.sup.2) is made for
high surface concentration to form good ohmic contacts to the guard
ring. Rapid thermal annealing is employed to activate the BF.sub.2
dopant.
[0019] In FIG. 4 a second photoresist mask pattern 24 is used to
expose the active device region so that the overlying field oxide
14 can be later removed, as shown in FIG. 5 in which a suitable
oxide etchant such as HF solution is employed. An arsenic implant
is then made to dope the surface of N-layer 12 to about 10.sup.18
atoms per cc (10.sup.17-10.sup.20 atoms per cc) as shown at 26.
[0020] Thereafter, in FIG. 6 a third photoresist pattern 28 is
formed over the surface of the active region to define trenches 29
in the surface of the active region by etching as illustrated in
FIG. 7. A plasma or reactive ion etch can be employed for etching
the trenches with either vertical or sloped sidewalls. Thereafter,
boron or BF.sub.2 ions are implanted (E13-E15/cm.sup.2) in the
bottom of the trenches in P-regions 30 of epitaxial layer 12 using
photoresist pattern 28 as an ion implant mask.
[0021] Photoresist pattern 28 is then removed and rapid thermal
annealing is employed to form P-regions 30 at the trench bottoms,
thereby forming P-N junctions with epitaxial layer 12, and heavily
doped N regions 26 in the top surfaces of the trenches. A Schottky
metal 32 is then deposited over the surface of the active region in
the trenches as shown in FIG. 8. The Schottky metal may comprise
molybdenum, aluminum, platinum or other known material for forming
Schottky junctions with silicon such as refractory metals and
silicides thereof. The Schottky metal forms ohmic contacts with
heavily doped N regions 26 and Schottky junctions with the
sidewalls of the trenches between regions 26 and P regions 30.
Finally, a bottom electrode 34 and a top electrode 36 are deposited
for making contact to the finished Schottky diode. The electrode
material can be titanium, titanium nitride, nickel, silver, gold,
copper, or other suitable material and combinations thereof.
[0022] FIG. 9 illustrates the finished device with a forward bias
and depletion regions 40 around P-regions 30, ohmic contacts of the
Schottky metal to N doped regions 26, and the PN-junctions formed
with N- epitaxial layer 12 therebetween. With a forward bias,
current flows from the top electrode to the bottom electrode as
illustrated at 42. The ohmic contacts increase forward current and
reduce forward voltage of the Schottky diode device.
[0023] FIG. 10 illustrates the finished device with a reverse bias
applied to the top of electrode 36 and bottom electrode 34, whereby
current ceases to flow. The reverse bias on the PN-junction formed
by P-regions 30, and the N- epitaxial layer 12 expands across and
spaced from the Schottky diode as shown at 40. The increased charge
depletion region with the reverse bias of the electrodes increases
the reverse breakdown voltage for the device and lowers reverse
leakage current.
[0024] FIG. 11 is a plan view illustrating the top of the completed
Schottky diode. The trenched surface in the active region
surrounded by guard ring 22 increases the surface area of the
Schottky diode and this increases current density and current
carrying capacity for unit surface area of the semiconductor
device.
[0025] As shown in FIG. 7, some of the boron or BF.sub.2 can be
implanted into the sidewalls of the trenches, especially when the
sidewalls are sloped. To prevent this an alternative embodiment is
provided.
[0026] FIGS. 12-19 are section views illustrating the alternative
embodiment of the invention. In this process, the steps illustrated
in FIGS. 1-5 remain the same. However, in FIG. 12, an insulator
layer 50 having a thickness on the order of 30-300 nm is grown or
deposited on the surface of epitaxial layer 12. The insulator is
preferably silicon oxide or a silicon nitride layer. Thereafter,
photoresist pattern 28 is again formed over the surface of the
active region to define trenches in the surface of the active
region by etching as illustrated in FIG. 13. Again, a plasma or
reactive ion etch can be employed to form the trenches with either
vertical or sloped sidewalls. Exposed insulator 50 is removed prior
to trench formation using either a wet or dry etch.
[0027] Next, as shown in FIG. 14, the photoresist 28 is removed,
and another insulator layer 52 is deposited over the surface of the
device. The insulator can be silicon oxide or silicon nitride and
is preferably in the range of 30 to 300 nm in thickness.
[0028] Next, as shown in FIG. 15, anisotropic etch is used to
remove the insulator 52 from the bottom of the trenches but leaves
insulator 52 on the sidewalls and insulator 50 on the top of the
trench surfaces, and boron or BF.sub.2 is then implanted into the
bottom of the trenches in P-regions 30 of epitaxial layer 12. This
is similar to the process step of FIG. 7. The sidewall spacer also
reduces the bottom trench area, thereby reducing the PN-junction
area and increasing the Schottky conducting area. Thereafter, as
shown in FIG. 16, rapid thermal annealing is employed to activate
ions in P-regions 30 at the trench bottoms, and then the insulator
50, 52 is removed from the walls of the trench. Schottky metal 32
is then deposited over the surface of the trenched surface, similar
to the process step of FIG. 8, followed by forming of bottom
electrode 34 and top electrode 36. Use of the oxide ion mask, as
shown in FIG. 14 provides added protection against ion implantation
into the sidewalls and top surfaces of the trenched surface.
[0029] Finally, the finished device is shown forward biased in FIG.
17 and reverse biased in FIG. 18, similar to FIGS. 9 and 10,
above.
[0030] There has been shown an improved Schottky diode having
increased current capacity for semiconductor chip area. The
inclusion of PN-junctions at the bottoms of the trenched surface
permits the use of enhanced depletion regions when the diode is
reversed biased, thereby increasing the reverse bias breakdown
voltage, and reducing reverse bias leakage current. The ohmic
contacts of the Schottky metal to the doped top surfaces of the
trenched major surface increase forward current and reduce forward
voltage of the Schottky diode device. While the invention has been
described with reference to specific embodiments, the description
is illustrative of the invention and is not to be construed as
limiting the invention. Various modifications and applications may
occur to those skilled in the art without departing from the true
spirit and scope of the invention as defined by the appended
claims.
* * * * *