| Patent | Date |
|---|
Co-integration Of Gate-all-around Fet, Finfet And Passive Devices On Bulk Substrate
App 20220310590 - Frougier; Julien ; et al. | 2022-09-29 |
Phase Change Memory Cell Resistive Liner
App 20220310913 - Cheng; Kangguo ; et al. | 2022-09-29 |
Gate-all-around Devices With Isolated And Non-isolated Epitaxy Regions For Strain Engineering
App 20220310602 - Greene; Andrew M. ; et al. | 2022-09-29 |
Cross-bar fin formation
Grant 11,456,181 - Cheng , et al. September 27, 2 | 2022-09-27 |
Vertical Phase Change Bridge Memory Cell
App 20220302377 - LI; JUNTAO ; et al. | 2022-09-22 |
Substrate Thinning For A Backside Power Distribution Network
App 20220301878 - Xie; Ruilong ; et al. | 2022-09-22 |
Split gate (SG) memory device and novel methods of making the SG-memory device
Grant 11,450,678 - Zang , et al. September 20, 2 | 2022-09-20 |
On-chip decoupling capacitor
Grant 11,450,659 - Reznicek , et al. September 20, 2 | 2022-09-20 |
Single diffusion cut for gate structures
Grant 11,450,570 - Zang , et al. September 20, 2 | 2022-09-20 |
Scalable heat sink and magnetic shielding for high density MRAM arrays
Grant 11,444,238 - Frougier , et al. September 13, 2 | 2022-09-13 |
Formation of trench silicide source or drain contacts without gate damage
Grant 11,443,982 - Greene , et al. September 13, 2 | 2022-09-13 |
Middle of line structures
Grant 11,437,286 - Zang , et al. September 6, 2 | 2022-09-06 |
Techniques for forming replacement metal gate for VFET
Grant 11,437,489 - Xie , et al. September 6, 2 | 2022-09-06 |
Nanosheet Metal-oxide Semiconductor Field Effect Transistor With Asymmetric Threshold Voltage
App 20220278195 - Ando; Takashi ; et al. | 2022-09-01 |
Magnetoresistive random-access memory cell having a metal line connection
Grant 11,424,403 - Xie , et al. August 23, 2 | 2022-08-23 |
Resistive Random-access Memory Cell And Manufacturing Method Thereof
App 20220254996 - Cheng; Kangguo ; et al. | 2022-08-11 |
Symmetric read operation resistive random-access memory cell with bipolar junction selector
Grant 11,411,049 - Reznicek , et al. August 9, 2 | 2022-08-09 |
Magnetoresistive random-access memory device structure
Grant 11,411,048 - Wu , et al. August 9, 2 | 2022-08-09 |
Replacement Gate Cross-couple For Static Random-access Memory Scaling
App 20220246739 - Xie; Ruilong ; et al. | 2022-08-04 |
Methods, Apparatus, And Manufacturing System For Self-aligned Patterning Of A Vertical Transistor
App 20220238386 - Park; Chanro ; et al. | 2022-07-28 |
Transistor having forked nanosheets with wraparound contacts
Grant 11,398,480 - Zhang , et al. July 26, 2 | 2022-07-26 |
Variable Sheet Forkfet Device
App 20220231020 - Frougier; Julien ; et al. | 2022-07-21 |
Wraparound Contact To A Buried Power Rail
App 20220223698 - Xie; Ruilong ; et al. | 2022-07-14 |
Nanosheet transistor device with bottom isolation
Grant 11,387,319 - Xie , et al. July 12, 2 | 2022-07-12 |
Phase change memory cell with second conductive layer
Grant 11,380,842 - Li , et al. July 5, 2 | 2022-07-05 |
Nanosheet Transistors With Wrap Around Contact
App 20220208981 - Frougier; Julien ; et al. | 2022-06-30 |
Forming replacement low-k spacer in tight pitch fin field effect transistors
Grant 11,374,111 - Cai , et al. June 28, 2 | 2022-06-28 |
Reducing parasitic bottom electrode resistance of embedded MRAM
Grant 11,374,167 - Frougier , et al. June 28, 2 | 2022-06-28 |
Wrapped-around Contact For Vertical Field Effect Transistor Top Source-drain
App 20220199785 - Xie; Ruilong ; et al. | 2022-06-23 |
Low Capacitance Low Rc Wrap-around-contact
App 20220199787 - Xie; Ruilong ; et al. | 2022-06-23 |
Symmetric Read Operation Resistive Random-access Memory Cell With Bipolar Junction Selector
App 20220199688 - Reznicek; Alexander ; et al. | 2022-06-23 |
Nanosheet Semiconductor Devices With N/p Boundary Structure
App 20220199772 - Xie; Ruilong ; et al. | 2022-06-23 |
Vertical Field Effect Transistor With Crosslink Fin Arrangement
App 20220199776 - Seshadri; Indira ; et al. | 2022-06-23 |
Reduction Of Bottom Epitaxy Parasitics For Vertical Transport Field Effect Transistors
App 20220190157 - LI; Tao ; et al. | 2022-06-16 |
Vfet Contact Formation
App 20220190125 - Wu; Heng ; et al. | 2022-06-16 |
Transistor having confined source/drain regions with wrap-around source/drain contacts
Grant 11,362,194 - Reznicek , et al. June 14, 2 | 2022-06-14 |
High Density Reram Integration With Interconnect
App 20220181389 - Ando; Takashi ; et al. | 2022-06-09 |
Transistor Having Source Or Drain Formation Assistance Regions With Improved Bottom Isolation
App 20220181213 - Xie; Ruilong ; et al. | 2022-06-09 |
Vertical field effect transistor with bottom source-drain region
Grant 11,355,633 - Reznicek , et al. June 7, 2 | 2022-06-07 |
Replacement gate cross-couple for static random-access memory scaling
Grant 11,349,001 - Xie , et al. May 31, 2 | 2022-05-31 |
Hybrid Non-volatile Memory Cell
App 20220165944 - Cheng; Kangguo ; et al. | 2022-05-26 |
Fin Stack Including Tensile-strained And Compressively Strained Fin Portions
App 20220157816 - Cheng; Kangguo ; et al. | 2022-05-19 |
Scalable vertical transistor bottom source-drain epitaxy
Grant 11,335,804 - Yeh , et al. May 17, 2 | 2022-05-17 |
Buried Power Rail For Scaled Vertical Transport Field Effect Transistor
App 20220148969 - Xie; Ruilong ; et al. | 2022-05-12 |
Secure Chip Identification Using Random Threshold Voltage Variation In A Field Effect Transistor Structure As A Physically Unclonable Function
App 20220149183 - Oteri; Clint Jason ; et al. | 2022-05-12 |
Wrap-around Bottom Contact For Bottom Source/drain
App 20220149188 - Wang; Junli ; et al. | 2022-05-12 |
Self-aligned Uniform Bottom Spacers For Vtfets
App 20220149179 - Xie; Ruilong ; et al. | 2022-05-12 |
Self-aligned top via scheme
Grant 11,322,402 - Xie , et al. May 3, 2 | 2022-05-03 |
Mtj-based Analog Memory Device
App 20220130441 - Houssameddine; Dimitri ; et al. | 2022-04-28 |
Back end of line structures with metal lines with alternating patterning and metallization schemes
Grant 11,315,799 - Xie , et al. April 26, 2 | 2022-04-26 |
Phase change material switch and method of fabricating same
Grant 11,316,105 - Shen , et al. April 26, 2 | 2022-04-26 |
Stacked nanosheet rom
Grant 11,315,938 - Reznicek , et al. April 26, 2 | 2022-04-26 |
Wrap Around Contact Process Margin Improvement With Early Contact Cut
App 20220123116 - Xie; Ruilong ; et al. | 2022-04-21 |
Structures and SRAM bit cells integrating complementary field-effect transistors
Grant 11,309,319 - Mann , et al. April 19, 2 | 2022-04-19 |
Methods, apparatus, and manufacturing system for self-aligned patterning of a vertical transistor
Grant 11,309,220 - Park , et al. April 19, 2 | 2022-04-19 |
FinFET with dual work function metal
Grant 11,302,794 - Xie , et al. April 12, 2 | 2022-04-12 |
Partial Self-Aligned Contact for MOL
App 20220108923 - Xie; Ruilong ; et al. | 2022-04-07 |
Metallization Lines On Integrated Circuit Products
App 20220108950 - Xie; Ruilong ; et al. | 2022-04-07 |
Semiconductor FET device with bottom isolation and high-.kappa. first
Grant 11,295,988 - Xie , et al. April 5, 2 | 2022-04-05 |
Transistor having source or drain formation assistance regions with improved bottom isolation
Grant 11,295,983 - Xie , et al. April 5, 2 | 2022-04-05 |
Forming source and drain regions for sheet transistors
Grant 11,289,484 - Zhang , et al. March 29, 2 | 2022-03-29 |
Stacked gate structures
Grant 11,282,838 - Zhang , et al. March 22, 2 | 2022-03-22 |
Enhanced bottom dielectric isolation in gate-all-around devices
Grant 11,282,961 - Frougier , et al. March 22, 2 | 2022-03-22 |
Reduction of bottom epitaxy parasitics for vertical transport field effect transistors
Grant 11,271,107 - Li , et al. March 8, 2 | 2022-03-08 |
Metallization layer formation process
Grant 11,270,935 - Cheng , et al. March 8, 2 | 2022-03-08 |
Self-aligned source and drain contacts
Grant 11,264,481 - Park , et al. March 1, 2 | 2022-03-01 |
Vertical Field Effect Transistor With Bottom Spacer
App 20220059696 - Waskiewicz; Christopher J. ; et al. | 2022-02-24 |
Vertical Field Effect Transistor With Self-aligned Source And Drain Top Junction
App 20220059677 - Xie; Ruilong ; et al. | 2022-02-24 |
Stacked Field Effect Transistor With Wrap-around Contacts
App 20220052047 - Xie; Ruilong ; et al. | 2022-02-17 |
Nanosheet transistor with asymmetric gate stack
Grant 11,251,288 - Xie , et al. February 15, 2 | 2022-02-15 |
Wrap-around bottom contact for bottom source/drain
Grant 11,251,304 - Wang , et al. February 15, 2 | 2022-02-15 |
Self-aligned uniform bottom spacers for VTFETS
Grant 11,251,287 - Xie , et al. February 15, 2 | 2022-02-15 |
Stacked spin-orbit-torque magnetoresistive random-access memory
Grant 11,251,362 - Wu , et al. February 15, 2 | 2022-02-15 |
Cross-bar vertical transport field effect transistors without corner rounding
Grant 11,251,301 - Kang , et al. February 15, 2 | 2022-02-15 |
Nanosheet Transistor With Asymmetric Gate Stack
App 20220045193 - Xie; Ruilong ; et al. | 2022-02-10 |
Vertical Stacked Nanosheet Cmos Transistors With Different Work Function Metals
App 20220044973 - CHENG; Kangguo ; et al. | 2022-02-10 |
Method and structure for forming fully-aligned via
Grant 11,244,861 - Xie , et al. February 8, 2 | 2022-02-08 |
Reducing parasitic capacitance within semiconductor devices
Grant 11,244,864 - Xie , et al. February 8, 2 | 2022-02-08 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20220037194 - Li; Juntao ; et al. | 2022-02-03 |
Scalable Device for FINFET Technology
App 20220037212 - Xie; Ruilong ; et al. | 2022-02-03 |
Local Isolation Of Source/drain For Reducing Parasitic Capacitance In Vertical Field Effect Transistors
App 20220037210 - Xie; Ruilong ; et al. | 2022-02-03 |
Method of forming an interconnect structure with enhanced corner connection
Grant 11,239,165 - Xie , et al. February 1, 2 | 2022-02-01 |
Vertical transistors having improved control of top source or drain junctions
Grant 11,239,342 - Cheng , et al. February 1, 2 | 2022-02-01 |
Replacement bottom spacer for vertical transport field effect transistors
Grant 11,239,119 - Xie , et al. February 1, 2 | 2022-02-01 |
Physical unclonable function for MRAM structures
Grant 11,239,414 - Xie , et al. February 1, 2 | 2022-02-01 |
Partial self-aligned contact for MOL
Grant 11,239,115 - Xie , et al. February 1, 2 | 2022-02-01 |
Nanosheet Transistor With Self-aligned Dielectric Pillar
App 20220028729 - Xie; Ruilong ; et al. | 2022-01-27 |
Metallization lines on integrated circuit products
Grant 11,233,006 - Xie , et al. January 25, 2 | 2022-01-25 |
Fully Aligned Via for Interconnect
App 20220020688 - Xie; Ruilong ; et al. | 2022-01-20 |
Partial Wrap Around Top Contact
App 20220020634 - Xie; Ruilong ; et al. | 2022-01-20 |
Sloped epitaxy buried contact
Grant 11,227,922 - Li , et al. January 18, 2 | 2022-01-18 |
Wrap around contact process margin improvement with early contact cut
Grant 11,227,923 - Xie , et al. January 18, 2 | 2022-01-18 |
Formation of contacts for semiconductor devices
Grant 11,227,801 - Xie , et al. January 18, 2 | 2022-01-18 |
Cross-bar Fin Formation
App 20220013366 - Cheng; Kangguo ; et al. | 2022-01-13 |
Augmented Semiconductor Lasers With Spontaneous Emissions Blockage
App 20220013986 - FROUGIER; Julien ; et al. | 2022-01-13 |
Stacked Gate Structures
App 20220013521 - Zhang; Chen ; et al. | 2022-01-13 |
Field-effect transistor devices with sidewall implant under bottom dielectric isolation
Grant 11,222,979 - Miao , et al. January 11, 2 | 2022-01-11 |
Gate Induced Drain Leakage Reduction In Finfets
App 20220005941 - Reznicek; Alexander ; et al. | 2022-01-06 |
Self-Aligned Source and Drain Contacts
App 20220005934 - Park; Chanro ; et al. | 2022-01-06 |
Strained Semiconductor FET Devices with Epitaxial Quality Improvement
App 20220005951 - Wu; Heng ; et al. | 2022-01-06 |
Self-aligned Bottom Spacer Epi Last Flow For Vtfet
App 20220005935 - Li; Tao ; et al. | 2022-01-06 |
Vertical field effect transistor with bottom spacer
Grant 11,217,692 - Waskiewicz , et al. January 4, 2 | 2022-01-04 |
Vertical Transistor Having An Oxygen-blocking Top Spacer
App 20210408261 - Zhang; Chen ; et al. | 2021-12-30 |
Transistor Having Stacked Source/drain Regions With Formation Assistance Regions And Multi-region Wrap-around Source/drain Contacts
App 20210408233 - Xie; Ruilong ; et al. | 2021-12-30 |
Using selectively formed cap layers to form self-aligned contacts to source/drain regions
Grant 11,211,462 - Park , et al. December 28, 2 | 2021-12-28 |
Transistor having stacked source/drain regions with formation assistance regions and multi-region wrap-around source/drain contacts
Grant 11,211,452 - Xie , et al. December 28, 2 | 2021-12-28 |
Via formation with robust hardmask removal
Grant 11,211,291 - Xie , et al. December 28, 2 | 2021-12-28 |
Sloped Epitaxy Buried Contact
App 20210399098 - Li; Tao ; et al. | 2021-12-23 |
Vtfet With Cell Height Constraints
App 20210399131 - Wu; Heng ; et al. | 2021-12-23 |
Self-aligned contacts for MOL
Grant 11,205,590 - Fan , et al. December 21, 2 | 2021-12-21 |
Multiple work function nanosheet transistors with inner spacer modulation
Grant 11,205,698 - Ando , et al. December 21, 2 | 2021-12-21 |
Self-aligned top via structure
Grant 11,205,592 - Xie , et al. December 21, 2 | 2021-12-21 |
Vertical Transport Field-effect Transistor Structure Having Increased Effective Width And Self-aligned Anchor For Source/drain Region Formation
App 20210391444 - Xie; Ruilong ; et al. | 2021-12-16 |
Silicide Formation For Source/drain Contact In A Vertical Transport Field-effect Transistor
App 20210391224 - Wu; Heng ; et al. | 2021-12-16 |
Semiconductor FET Device with Bottom Isolation and High-k First
App 20210391222 - Xie; Ruilong ; et al. | 2021-12-16 |
Stacked field effect transistor with wrap-around contacts
Grant 11,201,153 - Xie , et al. December 14, 2 | 2021-12-14 |
Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistor
Grant 11,201,152 - Xie , et al. December 14, 2 | 2021-12-14 |
Selective Shrink for Contact Trench
App 20210384306 - Xie; Ruilong ; et al. | 2021-12-09 |
Dual Step Etch-back Inner Spacer Formation
App 20210384296 - Greene; Andrew M. ; et al. | 2021-12-09 |
Nanosheet transistor with self-aligned dielectric pillar
Grant 11,195,746 - Xie , et al. December 7, 2 | 2021-12-07 |
Bottom dielectric isolation structure for nanosheet containing devices
Grant 11,195,911 - Xie , et al. December 7, 2 | 2021-12-07 |
Forming single and double diffusion breaks for fin field-effect transistor structures
Grant 11,195,745 - Li , et al. December 7, 2 | 2021-12-07 |
Transistor Having Source Or Drain Formation Assistance Regions With Improved Bottom Isolation
App 20210375685 - Xie; Ruilong ; et al. | 2021-12-02 |
Vertical Transistor With Self-aligned Gate
App 20210376140 - Li; Juntao ; et al. | 2021-12-02 |
Nanosheet transistor having wrap-around bottom isolation
Grant 11,189,713 - Xie , et al. November 30, 2 | 2021-11-30 |
Formation of vertical transport field-effect transistor structure having increased effective width
Grant 11,189,712 - Xie , et al. November 30, 2 | 2021-11-30 |
VTFET with cell height constraints
Grant 11,189,725 - Wu , et al. November 30, 2 | 2021-11-30 |
Reduced Source/drain Coupling For Cfet
App 20210366782 - Xie; Ruilong ; et al. | 2021-11-25 |
Nanosheet transistor with inner spacers
Grant 11,183,561 - Cheng , et al. November 23, 2 | 2021-11-23 |
Fin field effect transistor devices with self-aligned gates
Grant 11,183,389 - Xu , et al. November 23, 2 | 2021-11-23 |
Self-aligned edge passivation for robust resistive random access memory connection
Grant 11,183,632 - Ando , et al. November 23, 2 | 2021-11-23 |
Vertical field effect transistor having improved uniformity
Grant 11,183,581 - Cheng , et al. November 23, 2 | 2021-11-23 |
Nanosheet Transistor With Asymmetric Gate Stack
App 20210359103 - Xie; Ruilong ; et al. | 2021-11-18 |
Scalable Heat Sink And Magnetic Shielding For High Density Mram Arrays
App 20210359197 - FROUGIER; JULIEN ; et al. | 2021-11-18 |
Transistor Having Forked Nanosheets With Wraparound Contacts
App 20210358911 - Zhang; Jingyun ; et al. | 2021-11-18 |
Augmented semiconductor lasers with spontaneous emissions blockage
Grant 11,177,632 - Frougier , et al. November 16, 2 | 2021-11-16 |
Scalable device for FINFET technology
Grant 11,177,181 - Xie , et al. November 16, 2 | 2021-11-16 |
Gate induced drain leakage reduction in FinFETs
Grant 11,177,366 - Reznicek , et al. November 16, 2 | 2021-11-16 |
Self-aligned bottom spacer EPI last flow for VTFET
Grant 11,177,367 - Li , et al. November 16, 2 | 2021-11-16 |
Stacked nanosheet CFET with gate all around structure
Grant 11,177,258 - Xie , et al. November 16, 2 | 2021-11-16 |
Vertical field effect transistor with self-aligned source and drain top junction
Grant 11,177,370 - Xie , et al. November 16, 2 | 2021-11-16 |
Via Interconnects For A Magnetoresistive Random-access Memory Device
App 20210351340 - Frougier; Julien ; et al. | 2021-11-11 |
Stacked Fet Multiply And Accumulate Integrated Circuit
App 20210349691 - Hekmatshoartabari; Bahman ; et al. | 2021-11-11 |
Planarization Controllability For Interconnect Structures
App 20210351064 - Xie; Ruilong ; et al. | 2021-11-11 |
Single Diffusion Cut For Gate Structures
App 20210351068 - ZANG; Hui ; et al. | 2021-11-11 |
Planarization controllability for interconnect structures
Grant 11,171,044 - Xie , et al. November 9, 2 | 2021-11-09 |
Structure And Method To Fabricate Resistive Memory With Vertical Pre-determined Filament
App 20210343938 - PARK; Chanro ; et al. | 2021-11-04 |
Self-aligned gate contact compatible cross couple contact formation
Grant 11,164,782 - Xie , et al. November 2, 2 | 2021-11-02 |
Stacked upper fin and lower fin transistor with separate gate
Grant 11,164,870 - Wu , et al. November 2, 2 | 2021-11-02 |
Reduced source/drain coupling for CFET
Grant 11,164,793 - Xie , et al. November 2, 2 | 2021-11-02 |
Two-stage top source drain epitaxy formation for vertical field effect transistors enabling gate last formation
Grant 11,164,787 - Reznicek , et al. November 2, 2 | 2021-11-02 |
Wrap around contact formation for VTFET
Grant 11,164,947 - Wu , et al. November 2, 2 | 2021-11-02 |
Fin-type field-effect transistors over one or more buried polycrystalline layers
Grant 11,164,867 - Adusumilli , et al. November 2, 2 | 2021-11-02 |
Complementary field-effect transistors
Grant 11,164,792 - Xie , et al. November 2, 2 | 2021-11-02 |
Transistor having in-situ doped nanosheets with gradient doped channel regions
Grant 11,164,960 - Zhang , et al. November 2, 2 | 2021-11-02 |
Wrap-around Bottom Contact For Bottom Source/drain
App 20210336046 - Wang; Junli ; et al. | 2021-10-28 |
Field-Effect Transistor Devices with Sidewall Implant Under Bottom Dielectric Isolation
App 20210336056 - Miao; Xin ; et al. | 2021-10-28 |
Transistor Having In-situ Doped Nanosheets With Gradient Doped Channel Regions
App 20210336038 - Zhang; Jingyun ; et al. | 2021-10-28 |
Nanosheet device integrated with a FINFET transistor
Grant 11,158,636 - Yeh , et al. October 26, 2 | 2021-10-26 |
Vertical stacked nanosheet CMOS transistors with different work function metals
Grant 11,158,544 - Cheng , et al. October 26, 2 | 2021-10-26 |
Silicide formation for source/drain contact in a vertical transport field-effect transistor
Grant 11,158,543 - Wu , et al. October 26, 2 | 2021-10-26 |
Reducing Parasitic Capacitance Within Semiconductor Devices
App 20210327762 - Xie; Ruilong ; et al. | 2021-10-21 |
Method And Structure For Forming Fully-aligned Via
App 20210327756 - Xie; Ruilong ; et al. | 2021-10-21 |
Multiple Work Function Nanosheet Transistors With Inner Spacer Modulation
App 20210328013 - Ando; Takashi ; et al. | 2021-10-21 |
Confined Gate Recessing For Vertical Transport Field Effect Transistors
App 20210327759 - Xie; Ruilong ; et al. | 2021-10-21 |
Self-aligned isolation for nanosheet transistor
Grant 11,152,464 - Pranatharthi Haran , et al. October 19, 2 | 2021-10-19 |
Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors
Grant 11,152,265 - Xie , et al. October 19, 2 | 2021-10-19 |
Self-aligned Uniform Bottom Spacers For Vtfets
App 20210320186 - Xie; Ruilong ; et al. | 2021-10-14 |
Work Function Metal Patterning For Nanosheet Cfets
App 20210320035 - Xie; Ruilong ; et al. | 2021-10-14 |
Via Formation With Robust Hardmask Removal
App 20210313229 - Xie; Ruilong ; et al. | 2021-10-07 |
HALF BURIED nFET/pFET EPITAXY SOURCE/DRAIN STRAP
App 20210313252 - Zhang; Jingyun ; et al. | 2021-10-07 |
Via-to-metal tip connections in multi-layer chips
Grant 11,139,242 - Xie , et al. October 5, 2 | 2021-10-05 |
Dual step etch-back inner spacer formation
Grant 11,139,372 - Greene , et al. October 5, 2 | 2021-10-05 |
Vertical transistor with self-aligned gate
Grant 11,139,399 - Li , et al. October 5, 2 | 2021-10-05 |
Reduction Of Bottom Epitaxy Parasitics For Vertical Transport Field Effect Transistors
App 20210305424 - LI; Tao ; et al. | 2021-09-30 |
Cmos Top Source/drain Region Doping And Epitaxial Growth For A Vertical Field Effect Transistor
App 20210305104 - Wu; Heng ; et al. | 2021-09-30 |
Self-aligned Isolation For Nanosheet Transistor
App 20210305361 - Pranatharthi Haran; Balasubramanian S. ; et al. | 2021-09-30 |
Late Gate Cut With Optimized Contact Trench Size
App 20210305093 - Reznicek; Alexander ; et al. | 2021-09-30 |
Enhanced Bottom Dielectric Isolation In Gate-all-around Devices
App 20210305420 - FROUGIER; Julien ; et al. | 2021-09-30 |
Physical Unclonable Function For Mram Structures
App 20210305499 - Xie; Ruilong ; et al. | 2021-09-30 |
Protective Bilayer Inner Spacer For Nanosheet Devices
App 20210305410 - Yao; Yao ; et al. | 2021-09-30 |
Ion-sensitive field-effect transistor with sawtooth well to enhance sensitivity
Grant 11,131,647 - Park , et al. September 28, 2 | 2021-09-28 |
Late gate cut with optimized contact trench size
Grant 11,133,217 - Reznicek , et al. September 28, 2 | 2021-09-28 |
Uniform work function metal recess for vertical transistor complementary metal oxide semiconductor technology
Grant 11,133,308 - Xie , et al. September 28, 2 | 2021-09-28 |
Vertical Transport Field-effect Transistor Including Replacement Gate
App 20210296494 - Xie; Ruilong ; et al. | 2021-09-23 |
Integrating Embedded Memory On Cmos Logic Using Thin Film Transistors
App 20210296396 - Wu; Heng ; et al. | 2021-09-23 |
Finfet With Dual Work Function Metal
App 20210296463 - Xie; Ruilong ; et al. | 2021-09-23 |
Reduced Source/drain Coupling For Cfet
App 20210296184 - Xie; Ruilong ; et al. | 2021-09-23 |
Formation Of Contacts For Semiconductor Devices
App 20210296178 - Xie; Ruilong ; et al. | 2021-09-23 |
Phase Change Material Switch And Method Of Fabricating Same
App 20210296580 - Shen; Tian ; et al. | 2021-09-23 |
Single diffusion cut for gate structures
Grant 11,127,623 - Zang , et al. September 21, 2 | 2021-09-21 |
Middle-of-line contacts with varying contact area providing reduced contact resistance
Grant 11,127,825 - Park , et al. September 21, 2 | 2021-09-21 |
Augmented Semiconductor Lasers With Spontaneous Emissions Blockage
App 20210288468 - FROUGIER; Julien ; et al. | 2021-09-16 |
On-chip Decoupling Capacitor
App 20210288046 - Reznicek; Alexander ; et al. | 2021-09-16 |
Cross-bar Vertical Transport Field Effect Transistors Without Corner Rounding
App 20210288181 - KANG; Tsung-Sheng ; et al. | 2021-09-16 |
Interconnect Structure With Enhanced Corner Connection
App 20210287988 - Xie; Ruilong ; et al. | 2021-09-16 |
MRAM integration into the MOL for fast 1T1M cells
Grant 11,121,174 - Reznicek , et al. September 14, 2 | 2021-09-14 |
Reducing Parasitic Bottom Electrode Resistance Of Embedded Mram
App 20210280776 - Frougier; Julien ; et al. | 2021-09-09 |
Using Selectively Formed Cap Layers To Form Self-aligned Contacts To Source/drain Regions
App 20210280690 - Park; Chanro ; et al. | 2021-09-09 |
Vertical Field Effect Transistor With Self-aligned Source And Drain Top Junction
App 20210273077 - Xie; Ruilong ; et al. | 2021-09-02 |
Wrap Around Contact Formation for VTFET
App 20210273063 - Wu; Heng ; et al. | 2021-09-02 |
Half buried nFET/pFET epitaxy source/drain strap
Grant 11,107,752 - Zhang , et al. August 31, 2 | 2021-08-31 |
Integration of split gate metal-oxide-nitride-oxide-semiconductor memory with vertical FET
Grant 11,107,827 - Xie , et al. August 31, 2 | 2021-08-31 |
Self-aligned repaired top via
Grant 11,107,731 - Xie , et al. August 31, 2 | 2021-08-31 |
Magnetoresistive Random-access Memory Device Structure
App 20210265422 - Wu; Heng ; et al. | 2021-08-26 |
Magnetoresistive Random-access Memory With Metal Interconnects
App 20210265559 - Xie; Ruilong ; et al. | 2021-08-26 |
Stacked Field Effect Transistor With Wrap-around Contacts
App 20210265348 - Xie; Ruilong ; et al. | 2021-08-26 |
Wrap Around Contact Process Margin Improvement With Early Contact Cut
App 20210265470 - Xie; Ruilong ; et al. | 2021-08-26 |
Stacked Nanosheet CFET with Gate All Around Structure
App 20210265345 - Xie; Ruilong ; et al. | 2021-08-26 |
Nanosheet field effect transistor with spacers between sheets
Grant 11,101,348 - Xie , et al. August 24, 2 | 2021-08-24 |
Buried power rail for transistor devices
Grant 11,101,217 - Xie , et al. August 24, 2 | 2021-08-24 |
Stacked Spin-orbit-torque Magnetoresistive Random-access Memory
App 20210257543 - Wu; Heng ; et al. | 2021-08-19 |
Gate-all-around field effect transistor having stacked U shaped channels configured to improve the effective width of the transistor
Grant 11,094,784 - Cheng , et al. August 17, 2 | 2021-08-17 |
Staircase surface-enhanced raman scattering substrate
Grant 11,092,551 - Cheng , et al. August 17, 2 | 2021-08-17 |
Nanosheet device with tall suspension and tight contacted gate poly-pitch
Grant 11,094,803 - Xie , et al. August 17, 2 | 2021-08-17 |
Structure and method to fabricate resistive memory with vertical pre-determined filament
Grant 11,094,883 - Park , et al. August 17, 2 | 2021-08-17 |
Nanosheet structures having vertically oriented and horizontally stacked nanosheets
Grant 11,094,781 - Xie , et al. August 17, 2 | 2021-08-17 |
Stacked-nanosheet semiconductor structures with support structures
Grant 11,088,288 - Xie , et al. August 10, 2 | 2021-08-10 |
Double replacement metal line patterning
Grant 11,087,993 - Xie , et al. August 10, 2 | 2021-08-10 |
Protective bilayer inner spacer for nanosheet devices
Grant 11,081,568 - Yao , et al. August 3, 2 | 2021-08-03 |
On-chip security key with phase change memory
Grant 11,081,172 - Cheng , et al. August 3, 2 | 2021-08-03 |
Nanosheet Device Integrated With A Finfet Transistor
App 20210233910 - Yeh; Chun-Chen ; et al. | 2021-07-29 |
Nanosheet Device With Tall Suspension And Tight Contacted Gate Poly-pitch
App 20210234018 - Xie; Ruilong ; et al. | 2021-07-29 |
Spin-orbit-torque magneto-resistive random access memory with stepped bottom electrode
Grant 11,075,334 - Reznicek , et al. July 27, 2 | 2021-07-27 |
Vertical Transport Field Effect Transistor With Bottom Source/drain
App 20210226055 - Wu; Heng ; et al. | 2021-07-22 |
Self-aligned Top Via Structure
App 20210225705 - Xie; Ruilong ; et al. | 2021-07-22 |
Nanosheet Transistor Having Wrap-around Bottom Isolation
App 20210226034 - Xie; Ruilong ; et al. | 2021-07-22 |
Transistor Having Confined Source/drain Regions With Wrap-around Source/drain Contacts
App 20210226032 - Reznicek; Alexander ; et al. | 2021-07-22 |
FinFET-based integrated circuits with reduced parasitic capacitance
Grant 11,069,680 - Xie , et al. July 20, 2 | 2021-07-20 |
Semiconductor device comprising metal-insulator-metal (MIM) capacitor
Grant 11,069,677 - Park , et al. July 20, 2 | 2021-07-20 |
Steep-switch vertical field effect transistor
Grant 11,069,744 - Chanemougame , et al. July 20, 2 | 2021-07-20 |
Stacked field effect transistors with reduced coupling effect
Grant 11,069,684 - Xie , et al. July 20, 2 | 2021-07-20 |
Reduction Of Drain Leakage In Nanosheet Device
App 20210217846 - Hashemi; Pouya ; et al. | 2021-07-15 |
Gate Induced Drain Leakage Reduction In Finfets
App 20210217876 - Reznicek; Alexander ; et al. | 2021-07-15 |
Nanosheet Transistor With Self-aligned Dielectric Pillar
App 20210217654 - Xie; Ruilong ; et al. | 2021-07-15 |
Vertical Field Effect Transistor With Bottom Spacer
App 20210217889 - Waskiewicz; Christopher J. ; et al. | 2021-07-15 |
Controlled Bottom Junctions
App 20210217896 - Anderson; Brent ; et al. | 2021-07-15 |
Scalable Device for FINFET Technology
App 20210217667 - Xie; Ruilong ; et al. | 2021-07-15 |
Self-aligned Bottom Spacer Epi Last Flow For Vtfet
App 20210217871 - Li; Tao ; et al. | 2021-07-15 |
Dielectric isolation for nanosheet devices
Grant 11,062,937 - Cheng , et al. July 13, 2 | 2021-07-13 |
Self-aligned Gate Contact Compatible Cross Couple Contact Formation
App 20210210384 - Xie; Ruilong ; et al. | 2021-07-08 |
Pcm Cell With Resistance Drift Correction
App 20210210683 - Wu; Heng ; et al. | 2021-07-08 |
Vtfet With Cell Height Constraints
App 20210210633 - Wu; Heng ; et al. | 2021-07-08 |
HALF BURIED nFET/pFET EPITAXY SOURCE/DRAIN STRAP
App 20210210413 - Zhang; Jingyun ; et al. | 2021-07-08 |
Complementary Field-effect Transistors
App 20210210349 - Xie; Ruilong ; et al. | 2021-07-08 |
Scalable Vertical Transistor Bottom Source-drain Epitaxy
App 20210210631 - Yeh; Chun-Chen ; et al. | 2021-07-08 |
Fishbone Long Channel Nanosheet Device
App 20210210637 - Zhang; Jingyun ; et al. | 2021-07-08 |
Forming Source And Drain Regions For Sheet Transistors
App 20210210489 - Zhang; Jingyun ; et al. | 2021-07-08 |
Vertical Field Effect Transistor With Bottom Source-drain Region
App 20210210632 - Reznicek; Alexander ; et al. | 2021-07-08 |
Nanosheet Transistor With Inner Spacers
App 20210210598 - Cheng; Kangguo ; et al. | 2021-07-08 |
Vertical transport field effect transistor with bottom source/drain
Grant 11,056,588 - Wu , et al. July 6, 2 | 2021-07-06 |
Self-aligned gate contact integration with metal resistor
Grant 11,056,537 - Miao , et al. July 6, 2 | 2021-07-06 |
Nanosheet transistor with dual inner airgap spacers
Grant 11,056,570 - Xie , et al. July 6, 2 | 2021-07-06 |
Source and drain EPI protective spacer during single diffusion break formation
Grant 11,056,399 - Yao , et al. July 6, 2 | 2021-07-06 |
Long channel nanosheet FET having tri-layer spacers
Grant 11,049,979 - Miao , et al. June 29, 2 | 2021-06-29 |
Bottom Dielectric Isolation Structure For Nanosheet Containing Devices
App 20210193797 - Xie; Ruilong ; et al. | 2021-06-24 |
Self-Aligned Edge Passivation For Robust Resistive Random Access Memory Connection
App 20210193920 - Ando; Takashi ; et al. | 2021-06-24 |
Two-stage Top Source Drain Epitaxy Formation For Vertical Field Effect Transistors Enabling Gate Last Formation
App 20210193527 - Reznicek; Alexander ; et al. | 2021-06-24 |
Middle of the line self-aligned direct pattern contacts
Grant 11,043,418 - Stephens , et al. June 22, 2 | 2021-06-22 |
Vertical field effect transistor
Grant 11,043,588 - Razavieh , et al. June 22, 2 | 2021-06-22 |
Integration of air spacer with self-aligned contact in transistor
Grant 11,043,411 - Park , et al. June 22, 2 | 2021-06-22 |
Methods Of Performing Fin Cut Etch Processes For Finfet Semiconductor Devices
App 20210183709 - Zhuang; Lei L. ; et al. | 2021-06-17 |
Phase change memory cell with a metal layer
Grant 11,038,106 - Radens , et al. June 15, 2 | 2021-06-15 |
Gate cap last for self-aligned contact
Grant 11,031,295 - Park , et al. June 8, 2 | 2021-06-08 |
Transistor with airgap spacer
Grant 11,031,485 - Cheng , et al. June 8, 2 | 2021-06-08 |
Contact interlayer dielectric replacement with improved SAC cap retention
Grant 11,024,536 - Carr , et al. June 1, 2 | 2021-06-01 |
Self-aligned cut process for self-aligned via process window
Grant 11,024,539 - Xie , et al. June 1, 2 | 2021-06-01 |
Non-self aligned contact semiconductor devices
Grant 11,024,720 - Xie , et al. June 1, 2 | 2021-06-01 |
Forming an MRAM device over a transistor
Grant 11,024,670 - Reznicek , et al. June 1, 2 | 2021-06-01 |
Forming An Mram Device Over A Transistor
App 20210159271 - Reznicek; Alexander ; et al. | 2021-05-27 |
Phase Change Memory Cell With A Metal Layer
App 20210159405 - Radens; Carl ; et al. | 2021-05-27 |
Mram Integration Into The Mol For Fast 1t1m Cells
App 20210159270 - Reznicek; Alexander ; et al. | 2021-05-27 |
Spin-orbit-torque Magneto-resistive Random Access Memory With Stepped Bottom Electrode
App 20210159390 - Reznicek; Alexander ; et al. | 2021-05-27 |
Vertical field effect transistor with reduced parasitic capacitance
Grant 11,018,240 - Cheng , et al. May 25, 2 | 2021-05-25 |
Semiconductor Device With Improved Contact Resistance And Via Connectivity
App 20210151323 - Park; Chanro ; et al. | 2021-05-20 |
Nanosheet Transistors With Inner Airgaps
App 20210151556 - Wu; Heng ; et al. | 2021-05-20 |
Nanosheet Devices With Improved Electrostatic Integrity
App 20210151565 - Xie; Ruilong ; et al. | 2021-05-20 |
Back End Of Line Structures With Metal Lines With Alternating Patterning And Metallization Schemes
App 20210151327 - Xie; Ruilong ; et al. | 2021-05-20 |
Novel Split Gate (sg) Memory Device And Novel Methods Of Making The Sg-memory Device
App 20210151451 - Zang; Hui ; et al. | 2021-05-20 |
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection
App 20210151583 - XU; Wenyu ; et al. | 2021-05-20 |
Long Channel Nanosheet Fet Having Tri-layer Spacers
App 20210151607 - Miao; Xin ; et al. | 2021-05-20 |
Transistor having airgap spacer around gate structure
Grant 11,011,638 - Xie , et al. May 18, 2 | 2021-05-18 |
Fin field-effect transistor with reduced parasitic capacitance and reduced variability
Grant 11,011,626 - Cheng , et al. May 18, 2 | 2021-05-18 |
Asymmetric gate edge spacing for SRAM structures
Grant 11,011,528 - Reznicek , et al. May 18, 2 | 2021-05-18 |
Method and structure of metal cut
Grant 11,011,417 - Fan , et al. May 18, 2 | 2021-05-18 |
Low resistivity epitaxially formed contact region for nanosheet external resistance reduction
Grant 11,004,984 - Wu , et al. May 11, 2 | 2021-05-11 |
Middle of the line contact formation
Grant 11,004,750 - Xie , et al. May 11, 2 | 2021-05-11 |
Partial Self-Aligned Contact for MOL
App 20210134671 - Xie; Ruilong ; et al. | 2021-05-06 |
Nanosheet Structures Having Vertically Oriented And Horizontally Stacked Nanosheets
App 20210134949 - XIE; Ruilong ; et al. | 2021-05-06 |
Structure And Method To Fabricate Resistive Memory With Vertical Pre-determined Filament
App 20210135108 - PARK; Chanro ; et al. | 2021-05-06 |
Vertical metal-air transistor
Grant 10,998,424 - Li , et al. May 4, 2 | 2021-05-04 |
Nanosheet bottom isolation and source or drain epitaxial growth
Grant 10,998,234 - Xie , et al. May 4, 2 | 2021-05-04 |
Mechanically stable complementary field effect transistors
Grant 10,998,233 - Xie , et al. May 4, 2 | 2021-05-04 |
Methods, apparatus and system for a self-aligned gate cut on a semiconductor device
Grant 10,998,422 - Zang , et al. May 4, 2 | 2021-05-04 |
Finfet Device With Partial Interface Dipole Formation For Reduction Of Gate Induced Drain Leakage
App 20210126122 - Ando; Takashi ; et al. | 2021-04-29 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,991,808 - Frougier , et al. April 27, 2 | 2021-04-27 |
Airgap Vertical Transistor Without Structural Collapse
App 20210118721 - Cheng; Kangguo ; et al. | 2021-04-22 |
Transistors With Uniform Source/drain Epitaxy
App 20210119051 - Cheng; Kangguo ; et al. | 2021-04-22 |
Staircase Surface-enhanced Raman Scattering Substrate
App 20210116383 - Cheng; Kangguo ; et al. | 2021-04-22 |
Trench silicide contacts with high selectivity process
Grant 10,985,260 - Greene , et al. April 20, 2 | 2021-04-20 |
Vertical field effect transistor replacement metal gate fabrication
Grant 10,985,073 - Xie , et al. April 20, 2 | 2021-04-20 |
Replacement Gate Cross-couple For Static Random-access Memory Scaling
App 20210111028 - Xie; Ruilong ; et al. | 2021-04-15 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20210111225 - Frougier; Julien ; et al. | 2021-04-15 |
Floating gate prevention and capacitance reduction in semiconductor devices
Grant 10,978,574 - Xie , et al. April 13, 2 | 2021-04-13 |
Vertical Transport Field Effect Transistor With Bottom Source/drain
App 20210104627 - Wu; Heng ; et al. | 2021-04-08 |
Extreme ultraviolet patterning process with resist hardening
Grant 10,971,362 - Park , et al. April 6, 2 | 2021-04-06 |
Techniques for Forming Replacement Metal Gate for VFET
App 20210098602 - Xie; Ruilong ; et al. | 2021-04-01 |
Replacement Bottom Spacer For Vertical Transport Field Effect Transistors
App 20210098597 - Xie; Ruilong ; et al. | 2021-04-01 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,964,750 - Frougier , et al. March 30, 2 | 2021-03-30 |
Stacked Transistor With Separate Gate
App 20210091079 - Wu; Heng ; et al. | 2021-03-25 |
Low Resistivity Epitaxially Formed Contact Region For Nanosheet External Resistance Reduction
App 20210091230 - Wu; Heng ; et al. | 2021-03-25 |
Self-Aligned Contacts for MOL
App 20210090950 - Fan; Su Chen ; et al. | 2021-03-25 |
Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
Grant 10,957,799 - Xie , et al. March 23, 2 | 2021-03-23 |
Gate cut with high selectivity to preserve interlevel dielectric layer
Grant 10,957,544 - Greene , et al. March 23, 2 | 2021-03-23 |
Back End Of Line Structures With Metal Lines With Alternating Patterning And Metallization Schemes
App 20210082714 - Xie; Ruilong ; et al. | 2021-03-18 |
Stacked-nanosheet Semiconductor Structures With Support Structures
App 20210083127 - Xie; Ruilong ; et al. | 2021-03-18 |
Vertical Metal-air Transistor
App 20210083075 - Li; Juntao ; et al. | 2021-03-18 |
Middle Of The Line Contact Formation
App 20210082770 - Xie; Ruilong ; et al. | 2021-03-18 |
Forming single and double diffusion breaks
Grant 10,950,506 - Xie , et al. March 16, 2 | 2021-03-16 |
Methods of forming air gaps between source/drain contacts and the resulting devices
Grant 10,950,692 - Xie , et al. March 16, 2 | 2021-03-16 |
Asymmetric gate cut isolation for SRAM
Grant 10,950,610 - Paul , et al. March 16, 2 | 2021-03-16 |
Back end of line structures with metal lines with alternating patterning and metallization schemes
Grant 10,950,459 - Xie , et al. March 16, 2 | 2021-03-16 |
Nanosheet Transistor Device With Bottom Isolation
App 20210074809 - Xie; Ruilong ; et al. | 2021-03-11 |
Transistor Having Airgap Spacer
App 20210066489 - Xie; Ruilong ; et al. | 2021-03-04 |
Scaled Gate Contact And Source/drain Cap
App 20210066464 - ZANG; Hui ; et al. | 2021-03-04 |
Methods, apparatus and system for a local interconnect feature over an active region in a finFET device
Grant 10,937,693 - Xie , et al. March 2, 2 | 2021-03-02 |
Gate cut structures
Grant 10,937,786 - Zang , et al. March 2, 2 | 2021-03-02 |
Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protection
Grant 10,937,890 - Xu , et al. March 2, 2 | 2021-03-02 |
Ion-sensitive field-effect transistor formed with alternating dielectric stack to enhance sensitivity
Grant 10,935,516 - Cheng , et al. March 2, 2 | 2021-03-02 |
Vertical Transistor With Self-aligned Gate
App 20210057565 - Li; Juntao ; et al. | 2021-02-25 |
Vertical Transport Field-effect Transistor Structure Having Increased Effective Width And Self-aligned Anchor For Source/drain Region Formation
App 20210057568 - Xie; Ruilong ; et al. | 2021-02-25 |
Semiconductor device with improved contact resistance and via connectivity
Grant 10,930,510 - Park , et al. February 23, 2 | 2021-02-23 |
Method and structure to improve overlay margin of non-self-aligned contact in metallization layer
Grant 10,930,568 - Xie , et al. February 23, 2 | 2021-02-23 |
Self-aligned Top Via Scheme
App 20210050259 - Xie; Ruilong ; et al. | 2021-02-18 |
Vertical resistor adjacent inactive gate over trench isolation
Grant 10,923,469 - Zang , et al. February 16, 2 | 2021-02-16 |
Wrap-around contact for vertical field effect transistors
Grant 10,923,590 - Cheng , et al. February 16, 2 | 2021-02-16 |
Air-gap spacers for field-effect transistors
Grant 10,923,389 - Park , et al. February 16, 2 | 2021-02-16 |
Double Replacement Metal Line Patterning
App 20210043462 - Xie; Ruilong ; et al. | 2021-02-11 |
Dual Step Etch-back Inner Spacer Formation
App 20210043728 - Greene; Andrew M. ; et al. | 2021-02-11 |
Fin-type Field-effect Transistors Over One Or More Buried Polycrystalline Layers
App 20210043624 - Adusumilli; Siva P. ; et al. | 2021-02-11 |
Gate-all-around Field Effect Transistors With Robust Inner Spacers And Methods
App 20210043727 - Frougier; Julien ; et al. | 2021-02-11 |
Methods of performing fin cut etch processes for FinFET semiconductor devices
Grant 10,916,478 - Zhuang , et al. February 9, 2 | 2021-02-09 |
Nanosheet devices with improved electrostatic integrity
Grant 10,916,630 - Xie , et al. February 9, 2 | 2021-02-09 |
Uniform bottom spacer for VFET devices
Grant 10,916,650 - Bentley , et al. February 9, 2 | 2021-02-09 |
Modified dielectric fill between the contacts of field-effect transistors
Grant 10,916,470 - Kamineni , et al. February 9, 2 | 2021-02-09 |
Local Isolation Of Source/drain For Reducing Parasitic Capacitance In Vertical Field Effect Transistors
App 20210035867 - Xie; Ruilong ; et al. | 2021-02-04 |
Nanosheet transistors with inner airgaps
Grant 10,910,470 - Wu , et al. February 2, 2 | 2021-02-02 |
Neuromorphic circuit structure and method to form same
Grant 10,909,443 - Nowak , et al. February 2, 2 | 2021-02-02 |
Protective Bilayer Inner Spacer For Nanosheet Devices
App 20210028297 - Yao; Yao ; et al. | 2021-01-28 |
Gate-all-around field effect transistors with robust inner spacers and methods
Grant 10,903,317 - Frougier , et al. January 26, 2 | 2021-01-26 |
Surface enhanced Raman scattering substrate
Grant 10,900,906 - Cheng , et al. January 26, 2 | 2021-01-26 |
Formation of dielectric layer as etch-stop for source and drain epitaxy disconnection
Grant 10,903,315 - Loubet , et al. January 26, 2 | 2021-01-26 |
Vertically integrated memory cells with complementary pass transistor selectors
Grant 10,903,360 - Hekmatshoartabari , et al. January 26, 2 | 2021-01-26 |
Transistors with uniform source/drain epitaxy
Grant 10,903,365 - Cheng , et al. January 26, 2 | 2021-01-26 |
Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
Grant 10,903,369 - Xie , et al. January 26, 2 | 2021-01-26 |
Asymmetric Gate Cut Isolation For Sram
App 20210020644 - Paul; Bipul C. ; et al. | 2021-01-21 |
Metallization Layer Formation Process
App 20210020565 - Cheng; Kangguo ; et al. | 2021-01-21 |
Nanosheet Transistors With Inner Airgaps
App 20210020741 - Wu; Heng ; et al. | 2021-01-21 |
Phase Change Memory Cell With Second Conductive Layer
App 20210020833 - LI; JUNTAO ; et al. | 2021-01-21 |
Interconnects separated by a dielectric region formed using removable sacrificial plugs
Grant 10,896,874 - Ning , et al. January 19, 2 | 2021-01-19 |
Self-aligned contact for vertical field effect transistor
Grant 10,896,972 - Anderson , et al. January 19, 2 | 2021-01-19 |
Airgap vertical transistor without structural collapse
Grant 10,896,845 - Cheng , et al. January 19, 2 | 2021-01-19 |
Silicide Formation For Source/drain Contact In A Vertical Transport Field-effect Transistor
App 20210013108 - Wu; Heng ; et al. | 2021-01-14 |
Vertical Field Effect Transistor Replacement Metal Gate Fabrication
App 20210013106 - Xie; Ruilong ; et al. | 2021-01-14 |
Floating Gate Prevention And Capacitance Reduction In Semiconductor Devices
App 20210013322 - Xie; Ruilong ; et al. | 2021-01-14 |
Scaled gate contact and source/drain cap
Grant 10,892,338 - Zang , et al. January 12, 2 | 2021-01-12 |
Method of forming air-gap spacers and gate contact over active region and the resulting device
Grant 10,886,378 - Xie , et al. January 5, 2 | 2021-01-05 |
Buried Power Rail For Transistor Devices
App 20200411436 - Xie; Ruilong ; et al. | 2020-12-31 |
FinFET with etch-selective spacer and self-aligned contact capping layer
Grant 10,879,180 - Zang , et al. December 29, 2 | 2020-12-29 |
Insulating gate separation structure for transistor devices
Grant 10,879,073 - Park , et al. December 29, 2 | 2020-12-29 |
Methods, Apparatus And System For Forming On-chip Metal-insulator-meal (mim) Capacitor
App 20200402976 - Park; Chanro ; et al. | 2020-12-24 |
Transistors With Uniform Source/drain Epitaxy
App 20200403099 - Cheng; Kangguo ; et al. | 2020-12-24 |
Middle Of Line Structures
App 20200402861 - ZANG; Hui ; et al. | 2020-12-24 |
Self-aligned Cut Process For Self-aligned Via Process Window
App 20200402852 - Xie; Ruilong ; et al. | 2020-12-24 |
Spacer structures for a transistor device
Grant 10,872,979 - Zang , et al. December 22, 2 | 2020-12-22 |
Contact structures for integrated circuit products
Grant 10,872,809 - Xie , et al. December 22, 2 | 2020-12-22 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,872,962 - Frougier , et al. December 22, 2 | 2020-12-22 |
Airgap Vertical Transistor Without Structural Collapse
App 20200395238 - Cheng; Kangguo ; et al. | 2020-12-17 |
Transistor With Airgap Spacer
App 20200388694 - Cheng; Kangguo ; et al. | 2020-12-10 |
Surface Enhanced Raman Scattering Substrate
App 20200386685 - Cheng; Kangguo ; et al. | 2020-12-10 |
Method And Structure Of Metal Cut
App 20200381296 - Fan; Su Chen ; et al. | 2020-12-03 |
Forming Single And Double Diffusion Breaks
App 20200381307 - Xie; Ruilong ; et al. | 2020-12-03 |
Gate Cap Last For Self-aligned Contact
App 20200381306 - Park; Chanro ; et al. | 2020-12-03 |
Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation
Grant 10,854,515 - Kamineni , et al. December 1, 2 | 2020-12-01 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20200373196 - Li; Juntao ; et al. | 2020-11-26 |
Semiconductor Device With Improved Contact Resistance And Via Connectivity
App 20200373165 - Park; Chanro ; et al. | 2020-11-26 |
Structures And Sram Bit Cells Integrating Complementary Field-effect Transistors
App 20200365601 - Mann; Randy W. ; et al. | 2020-11-19 |
Transistor Having Strain-inducing Anchors And A Strain-enhancing Suspended Channel
App 20200365467 - Cheng; Kangguo ; et al. | 2020-11-19 |
Vertical Field Effect Transistor
App 20200365728 - RAZAVIEH; Ali ; et al. | 2020-11-19 |
One-time Programmable Device Compatible With Vertical Transistor Processing
App 20200365607 - Cheng; Kangguo ; et al. | 2020-11-19 |
Nanosheet transistor having improved bottom isolation
Grant 10,840,329 - Xie , et al. November 17, 2 | 2020-11-17 |
One-time programmable device compatible with vertical transistor processing
Grant 10,840,148 - Cheng , et al. November 17, 2 | 2020-11-17 |
Fin cut forming single and double diffusion breaks
Grant 10,840,147 - Li , et al. November 17, 2 | 2020-11-17 |
Structures and SRAM bit cells with a buried cross-couple interconnect
Grant 10,840,146 - Paul , et al. November 17, 2 | 2020-11-17 |
Asymmetric Gate Edge Spacing For Sram Structures
App 20200357805A1 - | 2020-11-12 |
Nanosheet Transistor Having Improved Bottom Isolation
App 20200357884A1 - | 2020-11-12 |
Gate-all-around Field Effect Transistors With Inner Spacers And Methods
App 20200357911A1 - | 2020-11-12 |
Fin Field-effect Transistor With Reduced Parasitic Capacitance And Reduced Variability
App 20200357896A1 - | 2020-11-12 |
Tapered fin-type field-effect transistors
Grant 10,832,967 - Zang , et al. November 10, 2 | 2020-11-10 |
Self-aligned gate isolation with asymmetric cut placement
Grant 10832916 - | 2020-11-10 |
Replacement contact formation for gate contact over active region with selective metal growth
Grant 10,832,964 - Xie , et al. November 10, 2 | 2020-11-10 |
Gate contact over active region with self-aligned source/drain contact
Grant 10,832,943 - Fan , et al. November 10, 2 | 2020-11-10 |
Forming a reliable wrap-around contact without source/drain sacrificial regions
Grant 10,832,954 - Frougier , et al. November 10, 2 | 2020-11-10 |
Interconnect structure having reduced resistance variation and method of forming same
Grant 10832944 - | 2020-11-10 |
Confined source drain epitaxy to reduce shorts in CMOS integrated circuits
Grant 10,833,198 - Xie , et al. November 10, 2 | 2020-11-10 |
Integrating nanosheet transistors, on-chip embedded memory, and extended-gate transistors on the same substrate
Grant 10833191 - | 2020-11-10 |
Fully aligned via formation without metal recessing
Grant 10,832,947 - Park , et al. November 10, 2 | 2020-11-10 |
Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor
Grant 10832961 - | 2020-11-10 |
Uniform Work Function Metal Recess For Vertical Transistor Complementary Metal Oxide Semiconductor Technology
App 20200350313A1 - | 2020-11-05 |
Nanosheet Devices With Improved Electrostatic Integrity
App 20200343342A1 - | 2020-10-29 |
Fin Cut Forming Single And Double Diffusion Breaks
App 20200343144A1 - | 2020-10-29 |
Via-to-metal Tip Connections In Multi-layer Chips
App 20200343186A1 - | 2020-10-29 |
Nanosheet field-effect transistors formed with sacrificial spacers
Grant 10818792 - | 2020-10-27 |
Nanosheet transistor with optimized junction and cladding detectivity control
Grant 10818776 - | 2020-10-27 |
Contact Interlayer Dielectric Replacement With Improved Sac Cap Retention
App 20200335392A1 - | 2020-10-22 |
Sacrificial Gate Spacer Regions For Gate Contacts Formed Over The Active Region Of A Transistor
App 20200335401A1 - | 2020-10-22 |
Ion-sensitive Field-effect Transistor With Micro-pillar Well To Enhance Sensitivity
App 20200328088A1 - | 2020-10-15 |
Source And Drain Epi Protective Spacer During Single Diffusion Break Formation
App 20200328121A1 - | 2020-10-15 |
Self-aligned chamferless interconnect structures of semiconductor devices
Grant 10804199 - | 2020-10-13 |
FinFET device and method of manufacturing
Grant 10804379 - | 2020-10-13 |
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection
App 20200321448A1 - | 2020-10-08 |
Gate-all-around Field Effect Transistor Having Stacked U Shaped Channels Configured To Improve The Effective Width Of The Transistor
App 20200321434A1 - | 2020-10-08 |
Gate Contact Over Active Region With Self-aligned Source/drain Contact
App 20200321244A1 - | 2020-10-08 |
FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming same
Grant 10797049 - | 2020-10-06 |
Interconnects Separated By A Dielectric Region Formed Using Removable Sacrificial Plugs
App 20200312764A1 - | 2020-10-01 |
Forming A Reliable Wrap-around Contact Without Source/drain Sacrifical Regions
App 20200312980A1 - | 2020-10-01 |
Self-aligned Gate Contact Integration With Metal Resistor
App 20200312909A1 - | 2020-10-01 |
Single Diffusion Cut For Gate Structures
App 20200312718A1 - | 2020-10-01 |
FinFET-BASED INTEGRATED CIRCUITS WITH REDUCED PARASITIC CAPACITANCE
App 20200312843A1 - | 2020-10-01 |
Vertical field effect transistor with anchor
Grant 10790379 - | 2020-09-29 |
Method to increase effective gate height
Grant 10790148 - | 2020-09-29 |
Ion-sensitive field-effect transistor with micro-pillar well to enhance sensitivity
Grant 10788446 - | 2020-09-29 |
IC structure with metal cap on cobalt layer and methods of forming same
Grant 10790363 - | 2020-09-29 |
finFET with improved nitride to fin spacing
Grant 10790395 - | 2020-09-29 |
Contact structures
Grant 10790376 - | 2020-09-29 |
Middle-of-line Contacts With Varying Contact Area Providing Reduced Contact Resistance
App 20200303264A1 - | 2020-09-24 |
Wrap-Around Contact for Vertical Field Effect Transistors
App 20200303543A1 - | 2020-09-24 |
Vertically stacked complementary-FET device with independent gate control
Grant 10784171 - | 2020-09-22 |
Fabrication of vertical field effect transistor structure with controlled gate length
Grant 10784357 - | 2020-09-22 |
Multi-level Ferroelectric Memory Cell
App 20200295017A1 - | 2020-09-17 |
Ion-sensitive Field-effect Transistor Formed With Alternating Dielectric Stack To Enhance Sensitivity
App 20200292490A1 - | 2020-09-17 |
Ion-sensitive Field-effect Transistor With Sawtooth Well To Enhance Sensitivity
App 20200292491A1 - | 2020-09-17 |
Confined Source Drain Epitaxy To Reduce Shorts In Cmos Integrated Circuits
App 20200295200A1 - | 2020-09-17 |
Vertical Stacked Nanosheet Cmos Transistors With Different Work Function Metals
App 20200294866A1 - | 2020-09-17 |
Fin Field Effect Transistor Devices With Self-aligned Gates
App 20200294803A1 - | 2020-09-17 |
Non-self Aligned Contact Semiconductor Devices
App 20200295151A1 - | 2020-09-17 |
Integration of vertical-transport transistors and planar transistors
Grant 10777465 - | 2020-09-15 |
Mechanically Stable Complementary Field Effect Transistors
App 20200286788A1 - | 2020-09-10 |
Integrating Nanosheet Transistors, On-chip Embedded Memory, And Extended-gate Transistors On The Same Substrate
App 20200287046A1 - | 2020-09-10 |
Structures And Sram Bit Cells Integrating Complementary Field-effect Transistors
App 20200286900A1 - | 2020-09-10 |
Transistor with recessed cross couple for gate contact over active region integration
Grant 10770388 - | 2020-09-08 |
On-chip metal-insulator-metal (MIM) capacitor and methods and systems for forming same
Grant 10770454 - | 2020-09-08 |
Self-aligned buried contact for vertical field-effect transistor and method of production thereof
Grant 10770585 - | 2020-09-08 |
Unique gate cap and gate cap spacer structures for devices on integrated circuit products
Grant 10770566 - | 2020-09-08 |
Integration Of Split Gate Metal-oxide-nitride-oxide-semiconductor Memory With Vertical Fet
App 20200279858A1 - | 2020-09-03 |
Fully Aligned Via Formation Without Metal Recessing
App 20200279769A1 - | 2020-09-03 |
Interlayer Dielectric Replacement Techniques With Protection For Source/drain Contacts
App 20200279933A1 - | 2020-09-03 |
Modified Dielectric Fill Between The Contacts Of Field-effect Transistors
App 20200279768A1 - | 2020-09-03 |
Extreme Ultraviolet Patterning Process With Resist Hardening
App 20200273704A1 - | 2020-08-27 |
Ion-sensitive Field Effect Transistor (isfet) With Enhanced Sensitivity
App 20200271620A1 - | 2020-08-27 |
Transistor Channel Having Vertically Stacked Nanosheets Coupled By Fin-shaped Bridge Regions
App 20200274000A1 - | 2020-08-27 |
Neuromorphic Circuit Structure And Method To Form Same
App 20200272880A1 - | 2020-08-27 |
Transistor Channel Having Vertically Stacked Nanosheets Coupled By Fin-shaped Bridge Regions
App 20200273979A1 - | 2020-08-27 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10756203 - | 2020-08-25 |
Vertical Field Effect Transistor Having Improved Uniformity
App 20200266288A1 - | 2020-08-20 |
Large area contacts for small transistors
Grant 10749031 - | 2020-08-18 |
Width adjustment of stacked nanowires
Grant 10749038 - | 2020-08-18 |
Ion-sensitive field effect transistor (ISFET) with enhanced sensitivity
Grant 10746691 - | 2020-08-18 |
Wraparound contact surrounding source/drain regions of integrated circuit structures and method of forming same
Grant 10741656 - | 2020-08-11 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10741675 - | 2020-08-11 |
Short channel and long channel devices
Grant 10741668 - | 2020-08-11 |
Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling
Grant 10734499 - | 2020-08-04 |
Gate-all-around transistor with spacer support and methods of forming same
Grant 10734525 - | 2020-08-04 |
Controlling back-end-of-line dimensions of semiconductor devices
Grant 10727120 - | 2020-07-28 |
Gate contact structure for a transistor
Grant 10727308 - | 2020-07-28 |
Integrated gate contact and cross-coupling contact formation
Grant 10727136 - | 2020-07-28 |
Dielectric Isolation For Nanosheet Devices
App 20200227305A1 - | 2020-07-16 |
Fin Structures With Bottom Dielectric Isolation
App 20200227306A1 - | 2020-07-16 |
Isolation Structures Of Finfet Semiconductor Devices
App 20200227323A1 - | 2020-07-16 |
Vertical Resistor Adjacent Inactive Gate Over Trench Isolation
App 20200227404A1 - | 2020-07-16 |
Method and apparatus of forming high voltage varactor and vertical transistor on a substrate
Grant 10714470 - | 2020-07-14 |
Gate structure for a transistor device with a novel pillar structure positioned thereabove
Grant 10714591 - | 2020-07-14 |
Method Of Forming A Buried Interconnect And The Resulting Devices
App 20200219813A1 - | 2020-07-09 |
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