| Patent | Date |
|---|
Reversible Resistive Memory Logic Gate Device
App 20220310908 - Chen; Hsueh-Chung ; et al. | 2022-09-29 |
Bulk nanosheet with dielectric isolation
Grant 11,456,354 - Cheng , et al. September 27, 2 | 2022-09-27 |
Gate-all-around FETs having uniform threshold voltage
Grant 11,456,219 - Bao , et al. September 27, 2 | 2022-09-27 |
Interconnects On Multiple Sides Of A Semiconductor Structure
App 20220285259 - Wang; Junli ; et al. | 2022-09-08 |
Wraparound Contact To A Buried Power Rail
App 20220223698 - Xie; Ruilong ; et al. | 2022-07-14 |
Phase change memory cell with second conductive layer
Grant 11,380,842 - Li , et al. July 5, 2 | 2022-07-05 |
Contact Resistance Reduction In Nanosheet Device Structure
App 20220181439 - Wu; Heng ; et al. | 2022-06-09 |
Field effect transistor
Grant 11,355,401 - Leobandung , et al. June 7, 2 | 2022-06-07 |
Nanosheet semiconductor devices with sigma shaped inner spacer
Grant 11,348,999 - Reznicek , et al. May 31, 2 | 2022-05-31 |
Buried Power Rail For Scaled Vertical Transport Field Effect Transistor
App 20220148969 - Xie; Ruilong ; et al. | 2022-05-12 |
Wrap-around Bottom Contact For Bottom Source/drain
App 20220149188 - Wang; Junli ; et al. | 2022-05-12 |
Long Channel And Short Channel Vertical Fet Co-integration For Vertical Fet Vtfet
App 20220139909 - Hook; Terence B. ; et al. | 2022-05-05 |
Vertical Transistor Including Symmetrical Source/drain Extension Junctions
App 20220130980 - Yeh; Chun-Chen ; et al. | 2022-04-28 |
Partial Self-Aligned Contact for MOL
App 20220108923 - Xie; Ruilong ; et al. | 2022-04-07 |
Contact resistance reduction in nanosheet device structure
Grant 11,289,573 - Wu , et al. March 29, 2 | 2022-03-29 |
Stacked gate structures
Grant 11,282,838 - Zhang , et al. March 22, 2 | 2022-03-22 |
Gate metal patterning to avoid gate stack attack due to excessive wet etching
Grant 11,276,576 - Wang , et al. March 15, 2 | 2022-03-15 |
Long channel and short channel vertical FET co-integration for vertical FET VTFET
Grant 11,251,179 - Hook , et al. February 15, 2 | 2022-02-15 |
Wrap-around bottom contact for bottom source/drain
Grant 11,251,304 - Wang , et al. February 15, 2 | 2022-02-15 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20220037194 - Li; Juntao ; et al. | 2022-02-03 |
Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy
Grant 11,239,360 - Mochizuki , et al. February 1, 2 | 2022-02-01 |
Vertical transistor including symmetrical source/drain extension junctions
Grant 11,239,343 - Yeh , et al. February 1, 2 | 2022-02-01 |
Partial self-aligned contact for MOL
Grant 11,239,115 - Xie , et al. February 1, 2 | 2022-02-01 |
Stacked Gate Structures
App 20220013521 - Zhang; Chen ; et al. | 2022-01-13 |
Trapezoidal Interconnect at Tight BEOL Pitch
App 20220013406 - Lanzillo; Nicholas Anthony ; et al. | 2022-01-13 |
Vtfet With Cell Height Constraints
App 20210399131 - Wu; Heng ; et al. | 2021-12-23 |
Selective source/drain recess for improved performance, isolation, and scaling
Grant 11,205,723 - Rahman , et al. December 21, 2 | 2021-12-21 |
Forming single and double diffusion breaks for fin field-effect transistor structures
Grant 11,195,745 - Li , et al. December 7, 2 | 2021-12-07 |
VTFET with cell height constraints
Grant 11,189,725 - Wu , et al. November 30, 2 | 2021-11-30 |
Transistor having reduced contact resistance
Grant 11,189,693 - Basker , et al. November 30, 2 | 2021-11-30 |
Nanosheet transistor having partially self-limiting bottom isolation extending into the substrate and under the source/drain and gate regions
Grant 11,183,558 - Yeh , et al. November 23, 2 | 2021-11-23 |
Trapezoidal interconnect at tight BEOL pitch
Grant 11,177,162 - Lanzillo , et al. November 16, 2 | 2021-11-16 |
Self aligned block masks for implantation control
Grant 11,177,132 - Wang , et al. November 16, 2 | 2021-11-16 |
Barrier-less Prefilled Via Formation
App 20210343589 - Lanzillo; Nicholas Anthony ; et al. | 2021-11-04 |
Barrier-free vertical interconnect structure
Grant 11,164,778 - Wang , et al. November 2, 2 | 2021-11-02 |
Complementary field-effect transistors
Grant 11,164,792 - Xie , et al. November 2, 2 | 2021-11-02 |
Wrap-around Bottom Contact For Bottom Source/drain
App 20210336046 - Wang; Junli ; et al. | 2021-10-28 |
Dummy Fin Template To Form A Self-aligned Metal Contact For Output Of Vertical Transport Field Effect Transistor
App 20210327766 - Wang; Junli ; et al. | 2021-10-21 |
Barrier-less prefilled via formation
Grant 11,152,257 - Lanzillo , et al. October 19, 2 | 2021-10-19 |
Buried local interconnect
Grant 11,152,307 - Cheng , et al. October 19, 2 | 2021-10-19 |
Semiconductor via structure with lower electrical resistance
Grant 11,145,543 - Clevenger , et al. October 12, 2 | 2021-10-12 |
Dummy fin template to form a self-aligned metal contact for output of vertical transport field effect transistor
Grant 11,145,550 - Wang , et al. October 12, 2 | 2021-10-12 |
FinFET devices
Grant 11,145,551 - Basker , et al. October 12, 2 | 2021-10-12 |
Interface-less contacts to source/drain regions and gate electrode over active portion of device
Grant 11,139,385 - Wang , et al. October 5, 2 | 2021-10-05 |
Nanosheet Semiconductor Devices With Sigma Shaped Inner Spacer
App 20210288141 - Reznicek; Alexander ; et al. | 2021-09-16 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 11,121,032 - Basker , et al. September 14, 2 | 2021-09-14 |
Dummy Fin Template To Form A Self-aligned Metal Contact For Output Of Vertical Transport Field Effect Transistor
App 20210280474 - Wang; Junli ; et al. | 2021-09-09 |
Contacts Having A Geometry To Reduce Resistance
App 20210272902 - Clevenger; Lawrence A. ; et al. | 2021-09-02 |
Vertical fin field effect transistor devices with a replacement metal gate
Grant 11,107,814 - Bao , et al. August 31, 2 | 2021-08-31 |
Vertical Transistor Including Symmetrical Source/drain Extension Junctions
App 20210265488 - Yeh; Chun-Chen ; et al. | 2021-08-26 |
Buried power rail for transistor devices
Grant 11,101,217 - Xie , et al. August 24, 2 | 2021-08-24 |
Nanosheet Transistor Having Partially Self-limiting Bottom Isolation Extending Into The Substrate And Under The Source/drain And Gate Regions
App 20210249506 - Yeh; Chun-Chen ; et al. | 2021-08-12 |
Precise junction placement in vertical semiconductor devices using etch stop layers
Grant 11,088,278 - Bu , et al. August 10, 2 | 2021-08-10 |
Large via buffer
Grant 11,075,161 - Mignot , et al. July 27, 2 | 2021-07-27 |
Barrier-less Prefilled Via Formation
App 20210225700 - Lanzillo; Nicholas Anthony ; et al. | 2021-07-22 |
Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
Grant 11,062,960 - Wu , et al. July 13, 2 | 2021-07-13 |
Contacts having a geometry to reduce resistance
Grant 11,062,993 - Clevenger , et al. July 13, 2 | 2021-07-13 |
Vtfet With Cell Height Constraints
App 20210210633 - Wu; Heng ; et al. | 2021-07-08 |
Complementary Field-effect Transistors
App 20210210349 - Xie; Ruilong ; et al. | 2021-07-08 |
Two-dimensional (2D) self-aligned contact (or via) to enable further device scaling
Grant 11,056,386 - Wang , et al. July 6, 2 | 2021-07-06 |
Vertical fin field effect transistor devices with a replacement metal gate
Grant 11,049,858 - Bao , et al. June 29, 2 | 2021-06-29 |
Static Random-access Memory Cell Design
App 20210166754 - Yu; Lan ; et al. | 2021-06-03 |
Static random-access memory cell design
Grant 11,024,369 - Yu , et al. June 1, 2 | 2021-06-01 |
Barrier-free Vertical Interconnect Structure
App 20210159117 - Wang; Junli ; et al. | 2021-05-27 |
Static Random-access Memory Cell Design
App 20210151096 - Yu; Lan ; et al. | 2021-05-20 |
Integrating a junction field effect transistor into a vertical field effect transistor
Grant 11,011,513 - Anderson , et al. May 18, 2 | 2021-05-18 |
Semiconductor structure including first FinFET devices for low power applications and second FinFET devices for high power applications
Grant 11,011,517 - Yu , et al. May 18, 2 | 2021-05-18 |
Integrated circuit having a single damascene wiring network
Grant 11,004,736 - Chen , et al. May 11, 2 | 2021-05-11 |
Vertical fin field effect transistor devices with a replacement metal gate
Grant 11,004,850 - Bao , et al. May 11, 2 | 2021-05-11 |
Partial Self-Aligned Contact for MOL
App 20210134671 - Xie; Ruilong ; et al. | 2021-05-06 |
Semiconductor device including dual trench epitaxial dual-liner contacts
Grant 10,998,242 - Basker , et al. May 4, 2 | 2021-05-04 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 10,998,230 - Basker , et al. May 4, 2 | 2021-05-04 |
Semiconductor device with local connection
Grant 10,985,063 - Cheng , et al. April 20, 2 | 2021-04-20 |
Oxygen-free Replacment Liner For Improved Transistor Performance
App 20210111068 - Wu; Heng ; et al. | 2021-04-15 |
Replacement metal gate structures
Grant 10,971,601 - Basker , et al. April 6, 2 | 2021-04-06 |
Oxygen-free replacement liner for improved transistor performance
Grant 10,971,399 - Wu , et al. April 6, 2 | 2021-04-06 |
Integration of input/output device in vertical field-effect transistor technology
Grant 10,964,812 - Liu , et al. March 30, 2 | 2021-03-30 |
Vertical transistor contact for cross-coupling in a memory cell
Grant 10,957,794 - Anderson , et al. March 23, 2 | 2021-03-23 |
Integrating extra gate VFET with single gate VFET
Grant 10,957,599 - Bi , et al. March 23, 2 | 2021-03-23 |
Electrical isolation for nanosheet transistor devices
Grant 10,957,761 - Yeh , et al. March 23, 2 | 2021-03-23 |
Trapezoidal Interconnect at Tight BEOL Pitch
App 20210082744 - Lanzillo; Nicholas Anthony ; et al. | 2021-03-18 |
Forming single and double diffusion breaks
Grant 10,950,506 - Xie , et al. March 16, 2 | 2021-03-16 |
Precision BEOL resistors
Grant 10,943,972 - Li , et al. March 9, 2 | 2021-03-09 |
Gate to source/drain leakage reduction in nanosheet transistors via inner spacer optimization
Grant 10,943,989 - Wu , et al. March 9, 2 | 2021-03-09 |
Gate contact over active enabled by alternative spacer scheme and claw-shaped cap
Grant 10,943,990 - Greene , et al. March 9, 2 | 2021-03-09 |
Vertical transport devices with greater density through modified well shapes
Grant 10,943,911 - Anderson , et al. March 9, 2 | 2021-03-09 |
Vertical transistor contact for a memory cell with increased density
Grant 10,937,793 - Anderson , et al. March 2, 2 | 2021-03-02 |
Replacement metal gate structures
Grant 10,930,754 - Basker , et al. February 23, 2 | 2021-02-23 |
Low resistance contact for transistors
Grant 10,923,575 - Clevenger , et al. February 16, 2 | 2021-02-16 |
Vertical transistor with a body contact for back-biasing
Grant 10,916,660 - Basker , et al. February 9, 2 | 2021-02-09 |
Vertical FET with shaped spacer to reduce parasitic capacitance
Grant 10,903,338 - Wang , et al. January 26, 2 | 2021-01-26 |
Integrated Circuit Having A Single Damascene Wiring Network
App 20210020507 - Chen; Hsueh-Chung ; et al. | 2021-01-21 |
Phase Change Memory Cell With Second Conductive Layer
App 20210020833 - LI; JUNTAO ; et al. | 2021-01-21 |
Self-aligned contact for vertical field effect transistor
Grant 10,896,972 - Anderson , et al. January 19, 2 | 2021-01-19 |
Self Aligned Block Masks For Implantation Control
App 20210005459 - Wang; Junli ; et al. | 2021-01-07 |
Metal-insulator-metal capacitor structure
Grant 10,886,363 - Basker , et al. January 5, 2 | 2021-01-05 |
Selective Source/drain Recess For Improved Performance, Isolation, And Scaling
App 20200411682 - Rahman; Ardasheir ; et al. | 2020-12-31 |
Two-dimensional (2d) Self-aligned Contact (or Via) To Enable Further Device Scaling
App 20200411376 - Wang; Junli ; et al. | 2020-12-31 |
Buried Power Rail For Transistor Devices
App 20200411436 - Xie; Ruilong ; et al. | 2020-12-31 |
Large Via Buffer
App 20200395293 - MIGNOT; YANN ; et al. | 2020-12-17 |
Forming Single And Double Diffusion Breaks
App 20200381307 - Xie; Ruilong ; et al. | 2020-12-03 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20200373196 - Li; Juntao ; et al. | 2020-11-26 |
Fin cut forming single and double diffusion breaks
Grant 10,840,147 - Li , et al. November 17, 2 | 2020-11-17 |
Integration of input/output device in vertical field-effect transistor technology
Grant 10,840,373 - Liu , et al. November 17, 2 | 2020-11-17 |
Metal-insulator-metal capacitor structure
Grant 10,833,147 - Basker , et al. November 10, 2 | 2020-11-10 |
Capacitors
Grant 10,833,149 - Basker , et al. November 10, 2 | 2020-11-10 |
Multiple width nanosheet devices
Grant 10,833,204 - Cheng , et al. November 10, 2 | 2020-11-10 |
Self-aligned tunneling field effect transistors
Grant 10,833,180 - Song , et al. November 10, 2 | 2020-11-10 |
Vertical field effect transistor with top and bottom airgap spacers
Grant 10,833,155 - Yeh , et al. November 10, 2 | 2020-11-10 |
Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement
Grant 10,832,975 - Bao , et al. November 10, 2 | 2020-11-10 |
Transistor Having Reduced Contact Resistance
App 20200350403 - Basker; Veeraraghavan S. ; et al. | 2020-11-05 |
Metal-insulator-metal capacitor structure
Grant 10,825,890 - Basker , et al. November 3, 2 | 2020-11-03 |
Metal-insulator-metal capacitor structure
Grant 10,825,891 - Basker , et al. November 3, 2 | 2020-11-03 |
Leakage Control For Gate-all-around Field-effect Transistor Devices
App 20200343372 - Yu; Lan ; et al. | 2020-10-29 |
Fin Cut Forming Single And Double Diffusion Breaks
App 20200343144 - Li; Juntao ; et al. | 2020-10-29 |
Vertical transistors having multiple gate thicknesses for optimizing performance and device density
Grant 10,811,507 - Anderson , et al. October 20, 2 | 2020-10-20 |
Two step fin etch and reveal for VTFETs and high breakdown LDVTFETs
Grant 10,811,528 - Ebrish , et al. October 20, 2 | 2020-10-20 |
Vertical transistors having multiple gate thicknesses for optimizing performance and device density
Grant 10,811,508 - Anderson , et al. October 20, 2 | 2020-10-20 |
Finfet Devices
App 20200328124 - Basker; Veeraraghavan S. ; et al. | 2020-10-15 |
Semiconductor device having two-part spacer
Grant 10,804,368 - Bao , et al. October 13, 2 | 2020-10-13 |
Leakage control for gate-all-around field-effect transistor devices
Grant 10,797,163 - Yu , et al. October 6, 2 | 2020-10-06 |
Electrical Isolation For Nanosheet Transistor Devices
App 20200312956 - Yeh; Chun-chen ; et al. | 2020-10-01 |
Vertical Field Effect Transistor With Top And Bottom Airgap Spacers
App 20200303497 - Yeh; Chun-Chen ; et al. | 2020-09-24 |
Semiconductor device and method of forming the semiconductor device
Grant 10,784,159 - Clevenger , et al. Sept | 2020-09-22 |
Self-aligned top spacers for vertical FETs with in situ solid state doping
Grant 10,777,469 - Bao , et al. Sept | 2020-09-15 |
Gate To Source/drain Leakage Reduction In Nanosheet Transistors Via Inner Spacer Optimization
App 20200287021 - Wu; Heng ; et al. | 2020-09-10 |
Contact Resistance Reduction In Nanosheet Device Structure
App 20200279918 - Wu; Heng ; et al. | 2020-09-03 |
Gate metal patterning for tight pitch applications
Grant 10,755,985 - Mochizuki , et al. A | 2020-08-25 |
Integration of electrostatic discharge protection into vertical fin technology
Grant 10,741,544 - Anderson , et al. A | 2020-08-11 |
Vertical transport static random-access memory cells with transistors of active regions arranged in linear rows
Grant 10,734,372 - Anderson , et al. | 2020-08-04 |
Method for forming strained fin channel devices
Grant 10,734,289 - Cheng , et al. | 2020-08-04 |
Integration of strained silicon germanium PFET device and silicon NFET device for finFET structures
Grant 10,734,504 - Doris , et al. | 2020-08-04 |
Gate-all-around Fets Having Uniform Threshold Voltage
App 20200243399 - BAO; RUQIANG ; et al. | 2020-07-30 |
Vertical Fin Field Effect Transistor Devices With A Replacement Metal Gate
App 20200243526 - Bao; Ruqiang ; et al. | 2020-07-30 |
Vertical Fin Field Effect Transistor Devices With A Replacement Metal Gate
App 20200243525 - Bao; Ruqiang ; et al. | 2020-07-30 |
Vertical Fin Field Effect Transistor Devices With A Replacement Metal Gate
App 20200243527 - Bao; Ruqiang ; et al. | 2020-07-30 |
Oxygen-free Replacement Liner For Improved Transistor Performance
App 20200235008 - Wu; Heng ; et al. | 2020-07-23 |
Directional deposition of protection layer
Grant 10,714,596 - He , et al. | 2020-07-14 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 10,707,128 - Basker , et al. | 2020-07-07 |
Minimum Width Device For Power Saving
App 20200212037 - Yu; Lan ; et al. | 2020-07-02 |
FinFET devices
Grant 10,699,962 - Basker , et al. | 2020-06-30 |
Replacement metal gate structures
Grant 10,692,989 - Basker , et al. | 2020-06-23 |
Gate-all-around FETs having uniform threshold voltage
Grant 10,692,778 - Bao , et al. | 2020-06-23 |
Buried Local Interconnect
App 20200194372 - CHENG; Kangguo ; et al. | 2020-06-18 |
Contacts Having A Geometry To Reduce Resistance
App 20200194371 - Clevenger; Lawrence A. ; et al. | 2020-06-18 |
Vertical fin field effect transistor devices with a replacement metal gate
Grant 10,679,993 - Bao , et al. | 2020-06-09 |
Method of forming a straight via profile with precise critical dimension control
Grant 10,672,705 - Xu , et al. | 2020-06-02 |
Vertical FET with shaped spacer to reduce parasitic capacitance
Grant 10,672,887 - Wang , et al. | 2020-06-02 |
Vertical Transistor And Method Of Forming The Vertical Transistor
App 20200167331 - LIE; Fee Li ; et al. | 2020-05-28 |
Vertical Transistor Contact For Cross-coupling In A Memory Cell
App 20200161472 - Anderson; Brent A. ; et al. | 2020-05-21 |
Vertical Transport Field Effect Transistor Structure With Self-aligned Top Junction Through Early Top Source/drain Epitaxy
App 20200152791 - Mochizuki; Shogo ; et al. | 2020-05-14 |
Integration Of Electrostatic Discharge Protection Into Vertical Fin Technology
App 20200152619 - Anderson; Brent A. ; et al. | 2020-05-14 |
Vertical Fin Field Effect Transistor Devices With A Replacement Metal Gate
App 20200144265 - Bao; Ruqiang ; et al. | 2020-05-07 |
Integrating Extra Gate Vfet With Single Gate Vfet
App 20200144124 - BI; ZHENXING ; et al. | 2020-05-07 |
Gate Contact Over Active Enabled by Alternative Spacer Scheme and Claw-Shaped Cap
App 20200135886 - Greene; Andrew ; et al. | 2020-04-30 |
Contacts having a geometry to reduce resistance
Grant 10,636,738 - Clevenger , et al. | 2020-04-28 |
Bottom source/drain silicidation for vertical field-effect transistor (FET)
Grant 10,629,443 - Anderson , et al. | 2020-04-21 |
Vertical transistor and method of forming the vertical transistor
Grant 10,628,404 - Lie , et al. | 2020-04-21 |
Self-aligned Top Spacers For Vertical Fets With In Situ Solid State Doping
App 20200118890 - Bao; Ruqiang ; et al. | 2020-04-16 |
Self-aligned Tunneling Field Effect Transistors
App 20200119168 - Song; Yi ; et al. | 2020-04-16 |
Self-aligned contact for vertical field effect transistor
Grant 10,622,458 - Anderson , et al. | 2020-04-14 |
Method of forming a straight via profile with precise critical dimension control
Grant 10,622,301 - Xu , et al. | 2020-04-14 |
Integration of input/output device in vertical field-effect transistor technology
Grant 10,615,276 - Liu , et al. | 2020-04-07 |
VFET metal gate patterning for vertical transport field effect transistor
Grant 10,615,082 - Anderson , et al. | 2020-04-07 |
Vertical Transistor Contact For A Memory Cell With Increased Density
App 20200105769 - Anderson; Brent A. ; et al. | 2020-04-02 |
Gate metal patterning for tight pitch applications
Grant 10,600,694 - Mochizuki , et al. | 2020-03-24 |
Replacement Metal Gate Structures
App 20200091314 - BASKER; Veeraraghavan S. ; et al. | 2020-03-19 |
Static random access memory (SRAM) density scaling by using middle of line (MOL) flow
Grant 10,593,679 - Basker , et al. | 2020-03-17 |
Self-aligned shallow trench isolation and doping for vertical fin transistors
Grant 10,593,803 - Anderson , et al. | 2020-03-17 |
Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy
Grant 10,593,797 - Mochizuki , et al. | 2020-03-17 |
Replacement metal gate structures
Grant 10,593,779 - Basker , et al. | 2020-03-17 |
Gate Metal Patterning To Avoid Gate Stack Attack Due To Excessive Wet Etching
App 20200083051 - Wang; Junli ; et al. | 2020-03-12 |
Vertical Fet With Shaped Spacer To Reduce Parasitic Capacitance
App 20200083347 - Wang; Junli ; et al. | 2020-03-12 |
Replacement metal gate structures
Grant 10,586,857 - Basker , et al. | 2020-03-10 |
Self-aligned punch through stopper liner for bulk FinFET
Grant 10,586,739 - Basker , et al. | 2020-03-10 |
Strained FinFET source drain isloation
Grant 10,586,867 - Cheng , et al. | 2020-03-10 |
Replacement metal gate structures
Grant 10,580,880 - Basker , et al. | 2020-03-03 |
Integrating A Junction Field Effect Transistor Into A Vertical Field Effect Transistor
App 20200066711 - Anderson; Brent A. ; et al. | 2020-02-27 |
Integration Of Input/output Device In Vertical Field-effect Transistor Technology
App 20200066906 - Liu; Xuefeng ; et al. | 2020-02-27 |
Method Of Forming A Straight Via Profile With Precise Critical Dimension Control
App 20200066632 - Xu; Yongan ; et al. | 2020-02-27 |
Replacement metal gate structures
Grant 10,573,726 - Basker , et al. Feb | 2020-02-25 |
Gate metal patterning to avoid gate stack attack due to excessive wet etching
Grant 10,573,521 - Wang , et al. Feb | 2020-02-25 |
Vertical transistor device
Grant 10,573,727 - Anderson , et al. Feb | 2020-02-25 |
Shared Contact Trench Comprising Dual Silicide Layers And Dual Epitaxial Layers For Source/drain Layers Of Nfet And Pfet Devices
App 20200058562 - Wu; Heng ; et al. | 2020-02-20 |
Shared Contact Trench Comprising Dual Silicide Layers And Dual Epitaxial Layers For Source/drain Layers Of Nfet And Pfet Devices
App 20200058563 - Wu; Heng ; et al. | 2020-02-20 |
Multiple Width Nanosheet Devices
App 20200058801 - Cheng; Kangguo ; et al. | 2020-02-20 |
Method Of Forming A Straight Via Profile With Precise Critical Dimension Control
App 20200058585 - Xu; Yongan ; et al. | 2020-02-20 |
Vertical transistor contact for cross-coupling in a memory cell
Grant 10,566,453 - Anderson , et al. Feb | 2020-02-18 |
Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
Grant 10,566,246 - Wu , et al. Feb | 2020-02-18 |
Self-aligned Contact For Vertical Field Effect Transistor
App 20200052096 - Anderson; Brent A. ; et al. | 2020-02-13 |
Vertical transistor contact for a memory cell with increased density
Grant 10,559,572 - Anderson , et al. Feb | 2020-02-11 |
Gate-all-around Fets Having Uniform Threshold Voltage
App 20200043808 - BAO; Ruqiang ; et al. | 2020-02-06 |
Formation of a bottom source-drain for vertical field-effect transistors
Grant 10,553,716 - Bergendahl , et al. Fe | 2020-02-04 |
Semiconductor Device Having Two-part Spacer
App 20200035808 - Bao; Ruqiang ; et al. | 2020-01-30 |
Semiconductor Device With Local Connection
App 20200027787 - Cheng; Kangguo ; et al. | 2020-01-23 |
Replacement Metal Gate Structures
App 20200027967 - BASKER; Veeraraghavan S. ; et al. | 2020-01-23 |
Air-gap top spacer and self-aligned metal gate for vertical fets
Grant 10,541,312 - Basker , et al. Ja | 2020-01-21 |
Fabrication of a vertical fin field effect transistor with an asymmetric gate structure
Grant 10,541,331 - Mochizuki , et al. Ja | 2020-01-21 |
Replacement Metal Gate Structures
App 20200020787 - BASKER; Veeraraghavan S. ; et al. | 2020-01-16 |
Integration Of Input/output Device In Vertical Field-effect Transistor Technology
App 20200013891 - Liu; Xuefeng ; et al. | 2020-01-09 |
Low Resistance Contact For Transistors
App 20200013868 - CLEVENGER; LAWRENCE A. ; et al. | 2020-01-09 |
FinFET with merge-free fins
Grant 10,529,858 - He , et al. J | 2020-01-07 |
Vertical Transistor Contact For A Memory Cell With Increased Density
App 20200006353 - Anderson; Brent A. ; et al. | 2020-01-02 |
Strained Fin Channel Devices
App 20200006561 - Cheng; Kangguo ; et al. | 2020-01-02 |
Vertical Transistor Contact For Cross-coupling In A Memory Cell
App 20200006552 - Anderson; Brent A. ; et al. | 2020-01-02 |
Vertical Transport Field Effect Transistor Structure With Self-aligned Top Junction Through Early Top Source/drain Epitaxy
App 20190393341 - Mochizuki; Shogo ; et al. | 2019-12-26 |
Multiple width nanosheet devices
Grant 10,516,064 - Cheng , et al. Dec | 2019-12-24 |
Extra gate device for nanosheet
Grant 10,515,859 - Doris , et al. Dec | 2019-12-24 |
Reduced Static Random Access Memory (sram) Device Foot Print Through Controlled Bottom Source/drain Placement
App 20190378767 - Bao; Ruqiang ; et al. | 2019-12-12 |
Integrating a junction field effect transistor into a vertical field effect transistor
Grant 10,504,889 - Anderson , et al. Dec | 2019-12-10 |
Semiconductor Via Structure With Lower Electrical Resistance
App 20190371663 - Clevenger; Lawrence A. ; et al. | 2019-12-05 |
Self-aligned punch through stopper liner for bulk FinFET
Grant 10,497,629 - Basker , et al. De | 2019-12-03 |
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20190363013 - CLEVENGER; Lawrence A. ; et al. | 2019-11-28 |
Interface-less Contacts To Source/drain Regions And Gate Electrode Over Active Portion Of Device
App 20190355829 - Wang; Junli ; et al. | 2019-11-21 |
Metal-insulator-metal Capacitor Structure
App 20190348495 - BASKER; Veeraraghavan S. ; et al. | 2019-11-14 |
Methods of forming merged source/drain regions on integrated circuit products
Grant 10,475,904 - Niimi , et al. Nov | 2019-11-12 |
Fabrication Of Self-aligned Gate Contacts And Source/drain Contacts Directly Above Gate Electrodes And Source/drains
App 20190341309 - Basker; Veeraraghavan S. ; et al. | 2019-11-07 |
Low resistance contact for transistors
Grant 10,468,491 - Clevenger , et al. No | 2019-11-05 |
Semiconductor via structure with lower electrical resistance
Grant 10,460,990 - Clevenger , et al. Oc | 2019-10-29 |
Vertical transport FET devices having air gap top spacer
Grant 10,453,934 - Basker , et al. Oc | 2019-10-22 |
Vertical Transport Devices With Greater Density Through Modified Well Shapes
App 20190319032 - Anderson; Brent A. ; et al. | 2019-10-17 |
Integration of strained silicon germanium PFET device and silicon NFET device for FINFET structures
Grant 10,446,670 - Doris , et al. Oc | 2019-10-15 |
Metal-insulator-metal Capacitor Structure
App 20190312100 - BASKER; Veeraraghavan S. ; et al. | 2019-10-10 |
Bulk Nanosheet with Dielectric Isolation
App 20190312104 - Cheng; Kangguo ; et al. | 2019-10-10 |
Semiconductor device with local connection
Grant 10,438,850 - Cheng , et al. O | 2019-10-08 |
Semiconductor device with local connection
Grant 10,431,495 - Cheng , et al. O | 2019-10-01 |
Two Step Fin Etch and Reveal for VTFETs and High Breakdown LDVTFETs
App 20190296142 - Ebrish; Mona ; et al. | 2019-09-26 |
Vertical Transport Static Random-access Memory Cells With Transistors Of Active Regions Arranged In Linear Rows
App 20190287957 - Anderson; Brent A. ; et al. | 2019-09-19 |
Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process
Grant 10,418,462 - Anderson , et al. Sept | 2019-09-17 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 10,418,280 - Basker , et al. Sept | 2019-09-17 |
Precision Beol Resistors
App 20190280080 - Li; Baozhen ; et al. | 2019-09-12 |
Strained fin channel devices
Grant 10,411,128 - Cheng , et al. Sept | 2019-09-10 |
Semiconductor Device Including Dual Trench Epitaxial Dual-liner Contacts
App 20190273027 - Basker; Veeraraghavan S. ; et al. | 2019-09-05 |
Gate planarity for FinFET using dummy polish stop
Grant 10,403,740 - Basker , et al. Sep | 2019-09-03 |
Integration of strained silicon germanium PFET device and silicon NFET device for finFET structures
Grant 10,396,185 - Doris , et al. A | 2019-08-27 |
Approach to fabrication of an on-chip resistor with a field effect transistor
Grant 10,396,069 - Basker , et al. A | 2019-08-27 |
Semiconductor device including dual trench epitaxial dual-liner contacts
Grant 10,388,576 - Basker , et al. A | 2019-08-20 |
Metal-insulator-metal capacitor structure
Grant 10,388,718 - Basker , et al. A | 2019-08-20 |
Metal-insulator-metal Capacitor Structure
App 20190252490 - BASKER; Veeraraghavan S. ; et al. | 2019-08-15 |
Replacement Metal Gate Structures
App 20190245059 - BASKER; Veeraraghavan S. ; et al. | 2019-08-08 |
Bulk nanosheet with dielectric isolation
Grant 10,374,035 - Cheng , et al. | 2019-08-06 |
Integrating metal-insulator-metal capacitors with air gap process flow
Grant 10,373,905 - Basker , et al. | 2019-08-06 |
Gate Metal Patterning To Avoid Gate Stack Attack Due To Excessive Wet Etching
App 20190237336 - Wang; Junli ; et al. | 2019-08-01 |
Precision BEOL resistors
Grant 10,361,265 - Li , et al. | 2019-07-23 |
Capacitors
App 20190214456 - BASKER; Veeraraghavan S. ; et al. | 2019-07-11 |
SiGe FINS FORMED ON A SUBSTRATE
App 20190214254 - Basker; Veeraraghavan S. ; et al. | 2019-07-11 |
Methods Of Forming Merged Source/drain Regions On Integrated Circuit Products
App 20190214484 - Niimi; Hiroaki ; et al. | 2019-07-11 |
SiGe FINS FORMED ON A SUBSTRATE
App 20190214253 - Basker; Veeraraghavan S. ; et al. | 2019-07-11 |
Vertical FET structure
Grant 10,347,759 - Anderson , et al. July 9, 2 | 2019-07-09 |
Stoplayer
App 20190206864 - He; Hong ; et al. | 2019-07-04 |
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,340,189 - Pranatharthiharan , et al. | 2019-07-02 |
Precision BEOL resistors
Grant 10,340,330 - Li , et al. | 2019-07-02 |
Formation Of A Bottom Source-drain For Vertical Field-effect Transistors
App 20190198670 - Bergendahl; Marc A. ; et al. | 2019-06-27 |
Fabrication Of Self-aligned Gate Contacts And Source/drain Contacts Directly Above Gate Electrodes And Source/drains
App 20190198394 - Basker; Veeraraghavan S. ; et al. | 2019-06-27 |
Fabrication Of Self-aligned Gate Contacts And Source/drain Contacts Directly Above Gate Electrodes And Source/drains
App 20190198393 - Basker; Veeraraghavan S. ; et al. | 2019-06-27 |
Integration Of Input/output Device In Vertical Field-effect Transistor Technology
App 20190198667 - Liu; Xuefeng ; et al. | 2019-06-27 |
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer
Grant 10,332,796 - Basker , et al. | 2019-06-25 |
Precision beol resistors
Grant 10,332,956 - Li , et al. | 2019-06-25 |
Precision BEOL resistors
Grant 10,332,955 - Li , et al. | 2019-06-25 |
Formation of a bottom source-drain for vertical field-effect transistors
Grant 10,326,017 - Bergendahl , et al. | 2019-06-18 |
Contact area to trench silicide resistance reduction by high-resistance interface removal
Grant 10,325,999 - Basker , et al. | 2019-06-18 |
Vfet Metal Gate Patterning For Vertical Transport Field Effect Transistor
App 20190181051 - Anderson; Brent A. ; et al. | 2019-06-13 |
Finfet Devices
App 20190181049 - BASKER; Veeraraghavan S. ; et al. | 2019-06-13 |
Replacement Metal Gate Structures
App 20190181242 - BASKER; Veeraraghavan S. ; et al. | 2019-06-13 |
Vertical Fet With Shaped Spacer To Reduce Parasitic Capacitance
App 20190181238 - Wang; Junli ; et al. | 2019-06-13 |
Silicon germanium fin channel formation
Grant 10,319,816 - He , et al. | 2019-06-11 |
FinFET devices
Grant 10,319,640 - Basker , et al. | 2019-06-11 |
Forming eDRAM unit cell with VFET and via capacitance
Grant 10,319,852 - Anderson , et al. | 2019-06-11 |
Bulk nanosheet with dielectric isolation
Grant 10,312,323 - Cheng , et al. | 2019-06-04 |
Metal-insulator-metal capacitor structure
Grant 10,312,318 - Basker , et al. | 2019-06-04 |
Reducing resistance of bottom source/drain in vertical channel devices
Grant 10,312,349 - Mochizuki , et al. | 2019-06-04 |
Self-aligned shallow trench isolation and doping for vertical fin transistors
Grant 10,312,371 - Anderson , et al. | 2019-06-04 |
Vertical transistor with variable gate length
Grant 10,312,346 - Anderson , et al. | 2019-06-04 |
Replacement metal gate structures
Grant 10,304,941 - Basker , et al. | 2019-05-28 |
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,304,741 - Pranatharthiharan , et al. | 2019-05-28 |
Precise control of vertical transistor gate length
Grant 10,297,689 - Basker , et al. | 2019-05-21 |
SiGe fins formed on a substrate
Grant 10,297,448 - Basker , et al. | 2019-05-21 |
Precise Junction Placement In Vertical Semiconductor Devices Using Etch Stop Layers
App 20190148545 - Bu; Huiming ; et al. | 2019-05-16 |
Replacement Metal Gate Structures
App 20190148554 - BASKER; Veeraraghavan S. ; et al. | 2019-05-16 |
CMOS compatible fuse or resistor using self-aligned contacts
Grant 10,290,633 - Basker , et al. | 2019-05-14 |
Replacement Metal Gate Structures
App 20190140098 - BASKER; Veeraraghavan S. ; et al. | 2019-05-09 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 10,283,406 - Basker , et al. | 2019-05-07 |
Vertical FET with strained channel
Grant 10,283,636 - Mochizuki , et al. | 2019-05-07 |
Method of forming silicon germanium and silicon fins on oxide from bulk wafer
Grant 10,283,418 - He , et al. | 2019-05-07 |
Capacitors
Grant 10,283,586 - Basker , et al. | 2019-05-07 |
Electrostatic Discharge Protection Using Vertical Fin Cmos Technology
App 20190131292 - Anderson; Brent A. ; et al. | 2019-05-02 |
FinFET devices
Grant 10,276,658 - Basker , et al. | 2019-04-30 |
Electrostatic discharge protection using vertical fin CMOS technology
Grant 10,276,558 - Anderson , et al. | 2019-04-30 |
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer
Grant 10,269,644 - Basker , et al. | 2019-04-23 |
Precision Beol Resistors
App 20190115419 - Li; Baozhen ; et al. | 2019-04-18 |
Precision Beol Resistors
App 20190115418 - Li; Baozhen ; et al. | 2019-04-18 |
Precision Beol Resistors
App 20190115421 - Li; Baozhen ; et al. | 2019-04-18 |
Precision Beol Resistors
App 20190115420 - Li; Baozhen ; et al. | 2019-04-18 |
Uniform shallow trench isolation
Grant 10,256,154 - Cheng , et al. | 2019-04-09 |
Semiconductor device and method of forming the semiconductor device
Grant 10,256,145 - Clevenger , et al. | 2019-04-09 |
Method and structure for forming FinFET CMOS with dual doped STI regions
Grant 10,249,537 - Basker , et al. | 2019-04-02 |
Precise junction placement in vertical semiconductor devices using etch stop layers
Grant 10,249,754 - Bu , et al. | 2019-04-02 |
Gate cut on a vertical field effect transistor with a defined-width inorganic mask
Grant 10,249,753 - Anderson , et al. | 2019-04-02 |
Self-aligned air gap spacer for nanosheet CMOS devices
Grant 10,243,043 - Mochizuki , et al. | 2019-03-26 |
Vertical channel field-effect transistor (FET) process compatible long channel transistors
Grant 10,243,073 - Anderson , et al. | 2019-03-26 |
Vertical Transistors Having Multiple Gate Thicknesses
App 20190088754 - Anderson; Brent A. ; et al. | 2019-03-21 |
Vertical Transistors Having Multiple Gate Thicknesses
App 20190088755 - Anderson; Brent A. ; et al. | 2019-03-21 |
VFET metal gate patterning for vertical transport field effect transistor
Grant 10,236,219 - Anderson , et al. | 2019-03-19 |
Replacement metal gate structures
Grant 10,236,359 - Basker , et al. | 2019-03-19 |
Approach to fabrication of an on-chip resistor with a field effect transistor
Grant 10,236,289 - Basker , et al. | 2019-03-19 |
Precise control of vertical transistor gate length
Grant 10,236,380 - Basker , et al. | 2019-03-19 |
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,236,212 - Pranatharthiharan , et al. | 2019-03-19 |
FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET
Grant 10,236,293 - Basker , et al. | 2019-03-19 |
Contact having self-aligned air gap spacers
Grant 10,236,255 - Li , et al. | 2019-03-19 |
Merged gate for vertical transistors
Grant 10,224,249 - Anderson , et al. | 2019-03-05 |
Precise junction placement in vertical semiconductor devices using etch stop layers
Grant 10,224,429 - Bu , et al. | 2019-03-05 |
FinFET devices
Grant 10,224,247 - Basker , et al. | 2019-03-05 |
Fabrication of a vertical fin field effect transistor with an asymmetric gate structure
Grant 10,217,863 - Mochizuki , et al. Feb | 2019-02-26 |
Replacement metal gate structures
Grant 10,217,840 - Basker , et al. Feb | 2019-02-26 |
Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process
Grant 10,211,316 - Anderson , et al. Feb | 2019-02-19 |
Fabrication Of A Vertical Fin Field Effect Transistor With An Asymmetric Gate Structure
App 20190019889 - Mochizuki; Shogo ; et al. | 2019-01-17 |
Protective Liner Between A Gate Dielectric And A Gate Contact
App 20190013238 - Clevenger; Lawrence A. ; et al. | 2019-01-10 |
Finfet Devices
App 20190013247 - BASKER; Veeraraghavan S. ; et al. | 2019-01-10 |
Replacement metal gate structures
Grant 10,177,256 - Basker , et al. J | 2019-01-08 |
Capacitors
Grant 10,170,540 - Basker , et al. J | 2019-01-01 |
Microstructure of metal interconnect layer
Grant 10,170,425 - He , et al. J | 2019-01-01 |
Finfet Devices
App 20180374756 - BASKER; Veeraraghavan S. ; et al. | 2018-12-27 |
Work function metal fill for replacement gate fin field effect transistor process
Grant 10,164,060 - He , et al. Dec | 2018-12-25 |
FinFET devices
Grant 10,157,797 - Basker , et al. Dec | 2018-12-18 |
CMOS compatible fuse or resistor using self-aligned contacts
Grant 10,157,912 - Basker , et al. Dec | 2018-12-18 |
Self-aligned Air Gap Spacer For Nanosheet Cmos Devices
App 20180358435 - Mochizuki; Shogo ; et al. | 2018-12-13 |
Self-aligned Shallow Trench Isolation And Doping For Vertical Fin Transistors
App 20180358459 - Anderson; Brent A. ; et al. | 2018-12-13 |
Air-gap Top Spacer And Self-aligned Metal Gate For Vertical Fets
App 20180350939 - Basker; Veeraraghavan S. ; et al. | 2018-12-06 |
Work function metal fill for replacement gate fin field effect transistor process
Grant 10,147,803 - He , et al. De | 2018-12-04 |
FinFET devices
Grant 10,141,402 - Basker , et al. Nov | 2018-11-27 |
Vertical transistor device
Grant 10,141,426 - Anderson , et al. Nov | 2018-11-27 |
Self-aligned Contact For Vertical Field Effect Transistor
App 20180337256 - Anderson; Brent A. ; et al. | 2018-11-22 |
Vertical Transistor With A Body Contact For Back-biasing
App 20180337059 - Basker; Veeraraghavan S. ; et al. | 2018-11-22 |
Integration Of Strained Silicon Germanium Pfet Device And Silicon Nfet Device For Finfet Structures
App 20180323278 - Doris; Bruce B. ; et al. | 2018-11-08 |
Silicon Germanium And Silicon Fins On Oxide From Bulk Wafer
App 20180315668 - He; Hong ; et al. | 2018-11-01 |
Gate Metal Patterning For Tight Pitch Applications
App 20180308767 - Mochizuki; Shogo ; et al. | 2018-10-25 |
Gate Metal Patterning For Tight Pitch Applications
App 20180308768 - Mochizuki; Shogo ; et al. | 2018-10-25 |
Gate Metal Patterning For Tight Pitch Applications
App 20180308766 - Mochizuki; Shogo ; et al. | 2018-10-25 |
Silicon Germanium Fin Channel Formation
App 20180301534 - He; Hong ; et al. | 2018-10-18 |
Gate metal patterning for tight pitch applications
Grant 10,103,065 - Mochizuki , et al. October 16, 2 | 2018-10-16 |
Vertical transistor with a body contact for back-biasing
Grant 10,096,484 - Basker , et al. October 9, 2 | 2018-10-09 |
Cmos Compatible Fuse Or Resistor Using Self-aligned Contacts
App 20180286856 - Basker; Veeraraghavan S. ; et al. | 2018-10-04 |
Precise Control Of Vertical Transistor Gate Length
App 20180277676 - Basker; Veeraraghavan S. ; et al. | 2018-09-27 |
Replacement Metal Gate Structures
App 20180269326 - BASKER; Veeraraghavan S. ; et al. | 2018-09-20 |
Replacement Metal Gate Structures
App 20180269309 - BASKER; Veeraraghavan S. ; et al. | 2018-09-20 |
Reducing Resistance Of Bottom Source/drain In Vertical Channel Devices
App 20180269310 - Mochizuki; Shogo ; et al. | 2018-09-20 |
Contacts Having A Geometry To Reduce Resistance
App 20180261543 - Clevenger; Lawrence A. ; et al. | 2018-09-13 |
Reducing Resistance Of Bottom Source/drain In Vertical Channel Devices
App 20180261685 - Mochizuki; Shogo ; et al. | 2018-09-13 |
Vertical Fet Structure
App 20180248037 - ANDERSON; Brent A. ; et al. | 2018-08-30 |
Integrating Metal-insulator-metal Capacitors With Air Gap Process Flow
App 20180233446 - Basker; Veeraraghavan S. ; et al. | 2018-08-16 |
Replacement Metal Gate Structures
App 20180233581 - BASKER; Veeraraghavan S. ; et al. | 2018-08-16 |
Fabrication Of Self-aligned Gate Contacts And Source/drain Contacts Directly Above Gate Electrodes And Source/drains
App 20180211875 - Basker; Veeraraghavan S. ; et al. | 2018-07-26 |
FORMING eDRAM UNIT CELL WITH VFET AND VIA CAPACITANCE
App 20180211963 - Anderson; Brent A. ; et al. | 2018-07-26 |
Fabrication Of Self-aligned Gate Contacts And Source/drain Contacts Directly Above Gate Electrodes And Source/drains
App 20180211874 - Basker; Veeraraghavan S. ; et al. | 2018-07-26 |
Uniform Shallow Trench Isolation
App 20180204775 - Cheng; Kangguo ; et al. | 2018-07-19 |
Uniform Shallow Trench Isolation
App 20180204774 - Cheng; Kangguo ; et al. | 2018-07-19 |
Approach To Fabrication Of An On-chip Resistor With A Field Effect Transistor
App 20180204832 - Basker; Veeraraghavan S. ; et al. | 2018-07-19 |
Approach To Fabrication Of An On-chip Resistor With A Field Effect Transistor
App 20180204834 - Basker; Veeraraghavan S. ; et al. | 2018-07-19 |
FinFET CMOS WITH SILICON FIN N-CHANNEL FET AND SILICON GERMANIUM FIN P-CHANNEL FET
App 20180197860 - Basker; Veeraraghavan S ; et al. | 2018-07-12 |
Finfet With Merge-free Fins
App 20180197980 - He; Hong ; et al. | 2018-07-12 |
Precise Junction Placement In Vertical Semiconductor Devices Using Etch Stop Layers
App 20180182892 - Bu; Huiming ; et al. | 2018-06-28 |
Contact Area To Trench Silicide Resistance Reduction By High-resistance Interface Removal
App 20180158923 - Basker; Veeraraghavan S. ; et al. | 2018-06-07 |
Strained Finfet Source Drain Isolation
App 20180145178 - Cheng; Kangguo ; et al. | 2018-05-24 |
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20180122697 - Clevenger; Lawrence A. ; et al. | 2018-05-03 |
Static Random Access Memory (sram) Density Scaling By Using Middle Of Line (mol) Flow
App 20180114792 - Basker; Veeraraghavan S. ; et al. | 2018-04-26 |
Vertical Transistor With Variable Gate Length
App 20180108754 - Anderson; Brent A. ; et al. | 2018-04-19 |
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20180096890 - CLEVENGER; Lawrence A. ; et al. | 2018-04-05 |
Gate Cut On A Vertical Field Effect Transistor With A Defined-width Inorganic Mask
App 20180097107 - Anderson; Brent A. ; et al. | 2018-04-05 |
Finfet Devices
App 20180090567 - BASKER; Veeraraghavan S. ; et al. | 2018-03-29 |
Method And Structure For Forming Finfet Cmos With Dual Doped Sti Regions
App 20180082904 - Basker; Veeraraghavan S. ; et al. | 2018-03-22 |
Contact Having Self-aligned Air Gap Spacers
App 20180082951 - Li; Juntao ; et al. | 2018-03-22 |
Vertical Fet With Strained Channel
App 20180083139 - Mochizuki; Shogo ; et al. | 2018-03-22 |
FinFET CMOS WITH SILICON FIN N-CHANNEL FET AND SILICON GERMANIUM FIN P-CHANNEL FET
App 20180076202 - Basker; Veeraraghavan S. ; et al. | 2018-03-15 |
Protective Liner Between A Gate Dielectric And A Gate Contact
App 20180076086 - Clevenger; Lawrence A. ; et al. | 2018-03-15 |
FinFET CMOS WITH SILICON FIN N-CHANNEL FET AND SILICON GERMANIUM FIN P-CHANNEL FET
App 20180076200 - Basker; Veeraraghavan S. ; et al. | 2018-03-15 |
Finfet Devices
App 20180076094 - BASKER; Veeraraghavan S. ; et al. | 2018-03-15 |
Vertical Fuse Structures
App 20180061757 - Li; Juntao ; et al. | 2018-03-01 |
Semiconductor Via Structure With Lower Electrical Resistance
App 20180061707 - Clevenger; Lawrence A. ; et al. | 2018-03-01 |
Replacement Metal Gate Structures
App 20180061965 - BASKER; Veeraraghavan S. ; et al. | 2018-03-01 |
Vertical Fuse Structures
App 20180061758 - Li; Juntao ; et al. | 2018-03-01 |
Vertical Fuse Structures
App 20180061759 - Li; Juntao ; et al. | 2018-03-01 |
Vertical Channel Field-effect Transistor (fet) Process Compatible Long Channel Transistors
App 20180053843 - Anderson; Brent A. ; et al. | 2018-02-22 |
Replacement Metal Gate Structures
App 20180053854 - BASKER; Veeraraghavan S. ; et al. | 2018-02-22 |
Replacement Metal Gate Structures
App 20180047827 - BASKER; Veeraraghavan S. ; et al. | 2018-02-15 |
Self-aligned Punch Through Stopper Liner For Bulk Finfet
App 20180047637 - Basker; Veeraraghavan ; et al. | 2018-02-15 |
Self-aligned Shallow Trench Isolation And Doping For Vertical Fin Transistors
App 20180040727 - Anderson; Brent A. ; et al. | 2018-02-08 |
Silicidation Of Bottom Source/drain Sheet Using Pinch-off Sacrificial Spacer Process
App 20180033868 - ANDERSON; Brent A. ; et al. | 2018-02-01 |
Integrating Metal-insulator-metal Capacitors With Air Gap Process Flow
App 20180025974 - Basker; Veeraraghavan S. ; et al. | 2018-01-25 |
Silicidation Of Bottom Source/drain Sheet Using Pinch-off Sacrificial Spacer Process
App 20180019323 - ANDERSON; Brent A. ; et al. | 2018-01-18 |
Formation Of A Bottom Source-drain For Vertical Field-effect Transistors
App 20180006151 - Bergendahl; Marc A. ; et al. | 2018-01-04 |
Gate Cut On A Vertical Field Effect Transistor With A Defined-width Inorganic Mask
App 20180006150 - Anderson; Brent A. ; et al. | 2018-01-04 |
Semiconductor Device Including Dual Trench Epitaxial Dual-liner Contacts
App 20180005903 - Basker; Veeraraghavan S. ; et al. | 2018-01-04 |
Merged Gate For Vertical Transistors
App 20180005902 - Anderson; Brent A. ; et al. | 2018-01-04 |
Long Channel And Short Channel Vertical Fet Co-integration For Vertical Fet Vtfet
App 20180006025 - Hook; Terence B. ; et al. | 2018-01-04 |
Fabrication Of A Vertical Fin Field Effect Transistor With An Asymmetric Gate Structure
App 20170373188 - Mochizuki; Shogo ; et al. | 2017-12-28 |
Silicidation Of Bottom Source/drain Sheet Using Pinch-off Sacrificial Spacer Process
App 20170373170 - ANDERSON; Brent A. ; et al. | 2017-12-28 |
Fin Pitch Scaling For High Voltage Devices And Low Voltage Devices On The Same Wafer
App 20170372968 - Basker; Veeraraghavan S. ; et al. | 2017-12-28 |
Source And Drain Epitaxial Semiconductor Material Integration For High Voltage Semiconductor Devices
App 20170365521 - Pranatharthiharan; Balasubramanian ; et al. | 2017-12-21 |
Precise Junction Placement In Vertical Semiconductor Devices Using Etch Stop Layers
App 20170365714 - Bu; Huiming ; et al. | 2017-12-21 |
Integration Of Strained Silicon Germanium Pfet Device And Silicon Nfet Device For Finfet Structures
App 20170365685 - Doris; Bruce B. ; et al. | 2017-12-21 |
Finfet Devices
App 20160379892A1 - | 2016-12-29 |
Finfet Devices
App 20160379887A1 - | 2016-12-29 |
| 