name:-0.14330410957336
name:-0.12878108024597
name:-0.10062384605408
Wang; Haiting Patent Filings

Wang; Haiting

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Haiting.The latest application filed is for "electrical isolation structure using reverse dopant implantation from source/drain region in semiconductor fin".

Company Profile
93.105.113
  • Wang; Haiting - Clifton Park NY
  • Wang; Haiting - Beijing CN
  • Wang; Haiting - Malta NY
  • Wang; Haiting - Hsinchu TW
  • Wang; Haiting - Hsinchu City TW
  • Wang; Haiting - Hsin-Chu N/A TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
Transistor comprising an air gap positioned adjacent a gate electrode
Grant 11,456,382 - Economikos , et al. September 27, 2
2022-09-27
Electrical Isolation Structure Using Reverse Dopant Implantation From Source/drain Region In Semiconductor Fin
App 20220285523 - Malinowski; Arkadiusz ;   et al.
2022-09-08
Memory device and methods of making such a memory device
Grant 11,437,568 - Shen , et al. September 6, 2
2022-09-06
Methods of forming a replacement gate structure for a transistor device
Grant 11,437,490 - Gu , et al. September 6, 2
2022-09-06
A Floor Determination Method For Terminal Devices
App 20220268962 - Yang; Congan ;   et al.
2022-08-25
An Application Preference Text Classification Method Based On Textrank
App 20220261431 - Wang; Haiting ;   et al.
2022-08-18
Ip Positioning Method And Unit, Computer Storage Medium And Computing Device
App 20220264250 - Yang; Congan ;   et al.
2022-08-18
Lateral Bipolar Junction Transistor Device And Method Of Making Such A Device
App 20220199810 - Malinowski; Arkadiusz ;   et al.
2022-06-23
Methods of forming transistor devices comprising a single semiconductor structure and the resulting devices
Grant 11,349,030 - Shu , et al. May 31, 2
2022-05-31
Field effect transistor with asymmetric gate structure and method
Grant 11,342,453 - Shen , et al. May 24, 2
2022-05-24
Active and dummy fin structures
Grant 11,264,504 - Shen , et al. March 1, 2
2022-03-01
Lateral bipolar junction transistor device and method of making such a device
Grant 11,264,470 - Wang , et al. March 1, 2
2022-03-01
Field Effect Transistor With Asymmetric Gate Structure And Method
App 20220059691 - Shen; Yanping ;   et al.
2022-02-24
Single Diffusion Breaks Including Stacked Dielectric Layers
App 20220052193 - Wang; Haiting ;   et al.
2022-02-17
Via structures for use in semiconductor devices
Grant 11,222,844 - Lian , et al. January 11, 2
2022-01-11
Methods Of Protecting Semiconductor Materials In The Active Region Of A Transistor Device And The Resulting Transistor Device
App 20210399126 - Gu; Sipeng ;   et al.
2021-12-23
Via Structures For Use In Semiconductor Devices
App 20210391250 - LIAN; JUN ;   et al.
2021-12-16
Semiconductor Devices Having Late-formed Isolation Structures
App 20210391323 - Shen; Yanping ;   et al.
2021-12-16
IC structure with short channel gate structure having shorter gate height than long channel gate structure
Grant 11,195,761 - Wang , et al. December 7, 2
2021-12-07
Gate Structures
App 20210376106 - SHU; Jiehui ;   et al.
2021-12-02
Single Fin Structures
App 20210367060 - Wang; Haiting ;   et al.
2021-11-25
Transistors with a hybrid source or drain
Grant 11,177,385 - Wang , et al. November 16, 2
2021-11-16
Novel Gate Structure For An Ldmos Transistor Device
App 20210351293 - Gu; Man ;   et al.
2021-11-11
Transistors with source/drain regions having sections of epitaxial semiconductor material
Grant 11,164,795 - Gu , et al. November 2, 2
2021-11-02
Memory Device Comprising A Top Via Electrode And Methods Of Making Such A Memory Device
App 20210336126 - Shen; Yanping ;   et al.
2021-10-28
Multi-level isolation structure
Grant 11,158,633 - Wang , et al. October 26, 2
2021-10-26
Passive devices over polycrystalline semiconductor fins
App 20210327872 - Gu; Man ;   et al.
2021-10-21
Methods Of Forming A Replacement Gate Structure For A Transistor Device
App 20210320189 - Gu; Sipeng ;   et al.
2021-10-14
Top Electrode For A Memory Device And Methods Of Making Such A Memory Device
App 20210320244 - Gu; Sipeng ;   et al.
2021-10-14
Three Part Source/drain Region Structure For Transistor
App 20210320207 - Wang; Haiting ;   et al.
2021-10-14
Multi-level Isolation Structure
App 20210313321 - Wang; Haiting ;   et al.
2021-10-07
Transistors With Source/drain Regions Having Sections Of Epitaxial Semiconductor Material
App 20210305103 - Gu; Sipeng ;   et al.
2021-09-30
Memory Device And Methods Of Making Such A Memory Device
App 20210305495 - Shen; Yanping ;   et al.
2021-09-30
Single fin structures
Grant 11,127,842 - Wang , et al. September 21, 2
2021-09-21
Transistors With A Sectioned Epitaxial Semiconductor Layer
App 20210288182 - Gu; Sipeng ;   et al.
2021-09-16
IC products formed on a substrate having localized regions of high resistivity and methods of making such IC products
Grant 11,114,466 - Gu , et al. September 7, 2
2021-09-07
Ic Structure With Short Channel Gate Structure Having Shorter Gate Height Than Long Channel Gate Structure
App 20210272851 - Wang; Haiting ;   et al.
2021-09-02
Lateral Bipolar Junction Transistor Device And Method Of Making Such A Device
App 20210273061 - Wang; Haiting ;   et al.
2021-09-02
Air spacer structures
Grant 11,094,794 - Frougier , et al. August 17, 2
2021-08-17
Transistors With Separately-formed Source And Drain
App 20210249508 - Shu; Jiehui ;   et al.
2021-08-12
Self-aligned Contact
App 20210242317 - GU; Sipeng ;   et al.
2021-08-05
Transistors With A Hybrid Source Or Drain
App 20210242344 - Wang; Haiting ;   et al.
2021-08-05
Ic Products Formed On A Substrate Having Localized Regions Of High Resistivity And Methods Of Making Such Ic Products
App 20210233934 - Gu; Sipeng ;   et al.
2021-07-29
Active And Dummy Fin Structures
App 20210234034 - SHEN; Yanping ;   et al.
2021-07-29
Transistors with separately-formed source and drain
Grant 11,075,268 - Shu , et al. July 27, 2
2021-07-27
Video Acquisition Method And Device, Terminal And Medium
App 20210225406 - HAN; Xu ;   et al.
2021-07-22
Methods Of Forming Transistor Devices Comprising A Single Semiconductor Structure And The Resulting Devices
App 20210217887 - Shu; Jiehui ;   et al.
2021-07-15
Semiconductor structures in a wide gate pitch region of semiconductor devices
Grant 11,043,566 - Shu , et al. June 22, 2
2021-06-22
Video processing method and apparatus, terminal and medium
Grant 11,037,600 - Han , et al. June 15, 2
2021-06-15
Multiple patterning with self-alignment provided by spacers
Grant 11,037,821 - Yang , et al. June 15, 2
2021-06-15
Air gap regions of a semiconductor device
Grant 11,018,221 - Wong , et al. May 25, 2
2021-05-25
Single Fin Structures
App 20210151581 - WANG; Haiting ;   et al.
2021-05-20
Semiconductor devices with wide gate-to-gate spacing
Grant 11,004,748 - Gu , et al. May 11, 2
2021-05-11
Semiconductor Structures In A Wide Gate Pitch Region Of Semiconductor Devices
App 20210111261 - SHU; JIEHUI ;   et al.
2021-04-15
Preventing Dielectric Void Over Trench Isolation Region
App 20210111065 - Shi; Yongjun ;   et al.
2021-04-15
Gate Structures
App 20210111264 - SHU; Jiehui ;   et al.
2021-04-15
Epitaxial structures of a semiconductor device having a wide gate pitch
Grant 10,971,625 - Aquilino , et al. April 6, 2
2021-04-06
Air Spacer Structures
App 20210098591 - FROUGIER; Julien ;   et al.
2021-04-01
Methods, apparatus and system for a local interconnect feature over an active region in a finFET device
Grant 10,937,693 - Xie , et al. March 2, 2
2021-03-02
Diffusion break structures in semiconductor devices
Grant 10,937,685 - Gu , et al. March 2, 2
2021-03-02
Air Gap Regions Of A Semiconductor Device
App 20210050412 - WONG; Chun Yu ;   et al.
2021-02-18
Transistors With Separately-formed Source And Drain
App 20210050419 - Shu; Jiehui ;   et al.
2021-02-18
Structure With Counter Doping Region Between N And P Wells Under Gate Structure
App 20210043766 - Zhu; Baofu ;   et al.
2021-02-11
Method And Apparatus For Capturing Video, Electronic Device And Computer-readable Storage Medium
App 20210014431 - CHEN; Haidong ;   et al.
2021-01-14
Video Processing Method And Apparatus, Terminal And Medium
App 20200411053 - HAN; Xu ;   et al.
2020-12-31
Epitaxial Structures Of A Semiconductor Device Having A Wide Gate Pitch
App 20200411689 - AQUILINO; MICHAEL V. ;   et al.
2020-12-31
Methods Of Forming An Ldmos Device And The Resulting Integrated Circuit Product
App 20200411684 - Shu; Jiehui ;   et al.
2020-12-31
Diffusion Break Structures In Semiconductor Devices And Methods Of Forming The Same
App 20200402838 - GU; SIPENG ;   et al.
2020-12-24
Spacer structures for a transistor device
Grant 10,872,979 - Zang , et al. December 22, 2
2020-12-22
Semiconductor Devices With Wide Gate-to-gate Spacing
App 20200388540 - GU; SIPENG ;   et al.
2020-12-10
Contact Structures Over An Active Region Of A Semiconductor Device
App 20200373410 - LEE; TUNG-HSING ;   et al.
2020-11-26
Semiconductor device with reduced parasitic capacitance
Grant 10,840,245 - Pandey , et al. November 17, 2
2020-11-17
Shaped Gate Caps In Spacer-lined Openings
App 20200357647 - Shen; Yanping ;   et al.
2020-11-12
Metal resistors with a non-planar configuration
Grant 10,832,839 - Beasor , et al. November 10, 2
2020-11-10
Metal gate for a field effect transistor and method
Grant 10,833,169 - Chu , et al. November 10, 2
2020-11-10
Fin reveal forming STI regions having convex shape between fins
Grant 10,832,965 - Xu , et al. November 10, 2
2020-11-10
Metal resistor structure in at least one cavity in dielectric over TS contact and gate structure
Grant 10,833,067 - Wang , et al. November 10, 2
2020-11-10
Methods and structures for a gate cut
Grant 10,832,966 - Park , et al. November 10, 2
2020-11-10
Multiple Patterning With Self-alignment Provided By Spacers
App 20200350202 - Yang; Xiaoming ;   et al.
2020-11-05
Methods, apparatus, and manufacturing system for FinFET devices with reduced parasitic capacitance
Grant 10,825,913 - Zang , et al. November 3, 2
2020-11-03
Integrated circuit structure to reduce soft-fail incidence and method of forming same
Grant 10,818,557 - Gu , et al. October 27, 2
2020-10-27
FinFET having upper spacers adjacent gate and source/drain contacts
Grant 10,818,659 - Wang , et al. October 27, 2
2020-10-27
Shaped gate caps in spacer-lined openings
Grant 10,818,498 - Shen , et al. October 27, 2
2020-10-27
Metal Gate For A Field Effect Transistor And Method
App 20200335602 - Chu; Tao ;   et al.
2020-10-22
Middle Of Line Gate Structures
App 20200335619 - SHEN; Yanping ;   et al.
2020-10-22
FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming same
Grant 10,797,049 - Zang , et al. October 6, 2
2020-10-06
Trench isolation preservation during transistor fabrication
Grant 10,784,143 - Wang , et al. Sept
2020-09-22
Transistor with a gate structure comprising a tapered upper surface
Grant 10,763,176 - Zang , et al. Sep
2020-09-01
Trench Isolation Preservation During Transistor Fabrication
App 20200251377 - Kind Code
2020-08-06
Method of forming gate structure with undercut region and resulting device
Grant 10,727,133 - Gao , et al.
2020-07-28
Method of forming semiconductor material in trenches having different widths, and related structures
Grant 10,714,376 - Chang , et al.
2020-07-14
Asymmetric overlay mark for overlay measurement
Grant 10,707,175 - Zhao , et al.
2020-07-07
Method, apparatus, and system for improving scaling of isolation structures for gate, source, and/or drain contacts
Grant 10,707,303 - Wang , et al.
2020-07-07
FinFET device with a wrap-around silicide source/drain contact structure
Grant 10,700,173 - Qi , et al.
2020-06-30
IC structure with air gap adjacent to gate structure and methods of forming same
Grant 10,692,987 - Wang , et al.
2020-06-23
Methods, apparatus, and manufacturing system for self-aligned patterning of contacts in a semiconductor device
Grant 10,685,881 - Zang , et al.
2020-06-16
Single Diffusion Cut For Gate Structures
App 20200176444 - XU; Guowei ;   et al.
2020-06-04
Novel Spacer Structures For A Transistor Device
App 20200168731 - Zang; Hui ;   et al.
2020-05-28
Single diffusion cut for gate structures
Grant 10,651,173 - Xu , et al.
2020-05-12
Finfet Structure With Dielectric Bar Containing Gate To Reduce Effective Capacitance, And Method Of Forming Same
App 20200135723 - Zang; Hui ;   et al.
2020-04-30
Chamfered replacement gate structures
Grant 10,636,890 - Wang , et al.
2020-04-28
Ic Structure With Air Gap Adjacent To Gate Structure And Methods Of Forming Same
App 20200127109 - Wang; Haiting ;   et al.
2020-04-23
Transistor With A Gate Structure Comprising A Tapered Upper Surface
App 20200126863 - Zang; Hui ;   et al.
2020-04-23
Methods of forming spacers adjacent gate structures of a transistor device
Grant 10,629,739 - Zang , et al.
2020-04-21
Gate contact and cross-coupling contact formation
Grant 10,629,694 - Zang , et al.
2020-04-21
Finfet Having Upper Spacers Adjacent Gate And Source/drain Contacts
App 20200119000 - Wang; Haiting ;   et al.
2020-04-16
Methods, Apparatus And System For A Local Interconnect Feature Over An Active Region In A Finfet Device
App 20200105597 - Xie; Ruilong ;   et al.
2020-04-02
Methods, Apparatus, And Manufacturing System For Finfet Devices With Reduced Parasitic Capacitance
App 20200105905 - Zang; Hui ;   et al.
2020-04-02
Isolation pillar first gate structures and methods of forming same
Grant 10,600,914 - Zhao , et al.
2020-03-24
Method Of Forming Gate Structure With Undercut Region And Resulting Device
App 20200091005 - Gao; Qun ;   et al.
2020-03-19
Integrated circuits having converted self-aligned epitaxial etch stop
Grant 10,593,757 - Shu , et al.
2020-03-17
Method of manufacturing finfet devices using narrow and wide gate cut openings in conjunction with a replacement metal gate process
Grant 10,586,860 - Shu , et al.
2020-03-10
Hybrid fin cut with improved fin profiles
Grant 10,586,736 - Wang , et al.
2020-03-10
Methods of making a self-aligned gate contact structure and source/drain metallization structures on integrated circuit products
Grant 10,580,701 - Zang , et al.
2020-03-03
Integrated single diffusion break
Grant 10,580,685 - Zang , et al.
2020-03-03
Methods, Apparatus, And Manufacturing System For Self-aligned Patterning Of Contacts In A Semiconductor Device
App 20200066588 - Zang; Hui ;   et al.
2020-02-27
Transistor Comprising An Air Gap Positioned Adjacent A Gate Electrode
App 20200066899 - Economikos; Laertis ;   et al.
2020-02-27
Integrated Single Diffusion Break
App 20200035543 - ZANG; Hui ;   et al.
2020-01-30
Methods Of Forming Spacers Adjacent Gate Structures Of A Transistor Device
App 20200027979 - Zang; Hui ;   et al.
2020-01-23
Using Source/drain Contact Cap During Gate Cut
App 20200020687 - Wang; Haiting ;   et al.
2020-01-16
Method for forming replacement air gap
Grant 10,535,771 - Economikos , et al. Ja
2020-01-14
Integrated Circuit Structure To Reduce Soft-fail Incidence And Method Of Forming Same
App 20200013678 - Gu; Sipeng ;   et al.
2020-01-09
Performing concurrent diffusion break, gate and source/drain contact cut etch processes
Grant 10,522,410 - Economikos , et al. Dec
2019-12-31
Different upper and lower spacers for contact
Grant 10,522,644 - Xu , et al. Dec
2019-12-31
Using source/drain contact cap during gate cut
Grant 10,522,538 - Wang , et al. Dec
2019-12-31
Different Upper And Lower Spacers For Contact
App 20190393321 - Xu; Guowei ;   et al.
2019-12-26
Method For Forming Replacement Air Gap
App 20190393335 - Economikos; Laertis ;   et al.
2019-12-26
Method Of Forming Semiconductor Material In Trenches Having Different Widths, And Related Structures
App 20190393077 - Chang; Chih-Chiang ;   et al.
2019-12-26
Hybrid Fin Cut With Improved Fin Profiles
App 20190378763 - WANG; Haiting ;   et al.
2019-12-12
Asymmetric Overlay Mark For Overlay Measurement
App 20190363053 - Zhao; Wei ;   et al.
2019-11-28
Chamfered Replacement Gate Structures
App 20190348517 - WANG; Haiting ;   et al.
2019-11-14
Scaled memory structures or other logic devices with middle of the line cuts
Grant 10,475,890 - Wang , et al. Nov
2019-11-12
A Method Of Manufacturing Finfet Devices Using Narrow And Wide Gate Cut Openings In Conjuction With A Replacement Metal Gate Pro
App 20190341475 - Shu; Jiehui ;   et al.
2019-11-07
Self-aligned single diffusion break isolation with reduction of strain loss
Grant 10,468,481 - Wang , et al. No
2019-11-05
Integrated Circuits Having Converted Self-aligned Epitaxial Etch Stop
App 20190333993 - Shu; Jiehui ;   et al.
2019-10-31
Performing Concurrent Diffusion Break, Gate And Source/drain Contact Cut Etch Processes
App 20190326177 - Economikos; Laertis ;   et al.
2019-10-24
Finfet Device With A Wrap-around Silicide Source/drain Contact Structure
App 20190312117 - Qi; Yi ;   et al.
2019-10-10
Insulating gate separation structure
Grant 10,431,499 - Xu , et al. O
2019-10-01
Contacts Formed With Self-aligned Cuts
App 20190295898 - Xie; Ruilong ;   et al.
2019-09-26
Field-effect Transistors With Fins Formed By A Damascene-like Process
App 20190273148 - Zhao; Wei ;   et al.
2019-09-05
Field-effect transistors with fins formed by a damascene-like process
Grant 10,403,742 - Zhao , et al. Sep
2019-09-03
Gate cut method
Grant 10,396,206 - Jha , et al. A
2019-08-27
Methods And Structures For A Gate Cut
App 20190259668 - Park; Chang Seo ;   et al.
2019-08-22
Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same
Grant 10,388,652 - Shi , et al. A
2019-08-20
Insulating Gate Separation Structure
App 20190244865 - Xu; Guowei ;   et al.
2019-08-08
Contacts formed with self-aligned cuts
Grant 10,373,875 - Xie , et al.
2019-08-06
Methods of forming source/drain contact structures on integrated circuit products
Grant 10,373,877 - Wang , et al.
2019-08-06
Self-aligned Single Diffusion Break Isolation With Reduction Of Strain Loss
App 20190229183 - WANG; Haiting ;   et al.
2019-07-25
Gate oxide formation through hybrid methods of thermal and deposition processes and method for producing the same
Grant 10,361,289 - Zhao , et al.
2019-07-23
Isolation Pillar First Gate Structures And Methods Of Forming Same
App 20190221661 - Zhao; Wei ;   et al.
2019-07-18
Fin Reveal Forming Sti Regions Having Convex Shape Between Fins
App 20190214308 - Xu; Yiheng ;   et al.
2019-07-11
Field-effect transistors with fins having independently-dimensioned sections
Grant 10,325,811 - Brunco , et al.
2019-06-18
Integrated Circuit Structure Including Single Diffusion Break Abutting End Isolation Region, And Methods Of Forming Same
App 20190148373 - Shi; Yongiun ;   et al.
2019-05-16
Field-effect Transistors With Fins Having Independently-dimensioned Sections
App 20190131177 - Brunco; David P. ;   et al.
2019-05-02
Scaled Memory Structures Or Other Logic Devices With Middle Of The Line Cuts
App 20190109197 - WANG; Haiting ;   et al.
2019-04-11
Methods of forming a resistor structure between adjacent transistor gates on an integrated circuit product and the resulting devices
Grant 10,249,616 - Zang , et al.
2019-04-02
Field-effect Transistors With Fins Formed By A Damascene-like Process
App 20190097019 - Zhao; Wei ;   et al.
2019-03-28
Sti Inner Spacer To Mitigate Sdb Loading
App 20190035633 - Jha; Ashish Kumar ;   et al.
2019-01-31
STI inner spacer to mitigate SDB loading
Grant 10,192,746 - Jha , et al. Ja
2019-01-29
Gate Cut Method
App 20190013245 - JHA; Ashish Kumar ;   et al.
2019-01-10
Finfet diffusion break having protective liner in fin insulator
Grant 10,164,010 - Hong , et al. Dec
2018-12-25
Methods Of Forming A Resistor Structure Between Adjacent Transistor Gates On An Integrated Circuit Product And The Resulting Devices
App 20180366461 - Zang; Hui ;   et al.
2018-12-20
Insulating gate separation structure and methods of making same
Grant 10,153,209 - Xu , et al. Dec
2018-12-11
Fin-type Field Effect Transistors With Single-diffusion Breaks And Method
App 20180323191 - WANG; HAITING ;   et al.
2018-11-08
Fin-type field effect transistors with single-diffusion breaks and method
Grant 10,121,788 - Wang , et al. November 6, 2
2018-11-06
Gate Cut Method
App 20180277440 - YU; Hong ;   et al.
2018-09-27
Gate cut method
Grant 10,083,874 - Yu , et al. September 25, 2
2018-09-25
Method For Forming Replacement Metal Gate And Related Device
App 20180190546 - WU; Xusheng ;   et al.
2018-07-05
Enlarged sacrificial gate caps for forming self-aligned contacts
Grant 10,008,385 - Jha , et al. June 26, 2
2018-06-26
Silicon liner for STI CMP stop in FinFET
Grant 9,984,933 - Xu , et al. May 29, 2
2018-05-29
Fin-type field effect transistors with single-diffusion breaks and method
Grant 9,935,104 - Wang , et al. April 3, 2
2018-04-03
Conformal nitridation of one or more fin-type transistor layers
Grant 9,698,269 - Tong , et al. July 4, 2
2017-07-04
Methods of forming diffusion breaks on integrated circuit products comprised of finFET devices
Grant 9,653,583 - Zhao , et al. May 16, 2
2017-05-16
Methods to thin down RMG sidewall layers for scalability of gate-last planar CMOS and FinFET technology
Grant 9,443,771 - Shen , et al. September 13, 2
2016-09-13
Methods of facilitating fabricating transistors
Grant 9,425,100 - Shen , et al. August 23, 2
2016-08-23
Method of multi-WF for multi-Vt and thin sidewall deposition by implantation for gate-last planar CMOS and FinFET technology
Grant 9,418,899 - Shen , et al. August 16, 2
2016-08-16
Method Of Multi-wf For Multi-vt And Thin Sidewall Deposition By Implantation For Gate-last Planar Cmos And Finfet Technology
App 20160225675 - SHEN; Yan Ping ;   et al.
2016-08-04
Conformal Nitridation Of One Or More Fin-type Transistor Layers
App 20160190324 - TONG; Wei Hua ;   et al.
2016-06-30
Fet structure for minimum size length/width devices for performance boost and mismatch reduction
Grant 9,379,186 - Wang , et al. June 28, 2
2016-06-28
Fabricating transistor(s) with raised active regions having angled upper surfaces
Grant 9,331,159 - Jha , et al. May 3, 2
2016-05-03
Conformal nitridation of one or more fin-type transistor layers
Grant 9,312,145 - Tong , et al. April 12, 2
2016-04-12
Lightly doped source/drain last method for dual-epi integration
Grant 9,293,580 - Fung , et al. March 22, 2
2016-03-22
Semiconductor Gate With Wide Top Or Bottom
App 20160049488 - SHEN; Yan Ping ;   et al.
2016-02-18
Depositing an etch stop layer before a dummy cap layer to improve gate performance
Grant 9,209,258 - Zhou , et al. December 8, 2
2015-12-08
Forming a gate by depositing a thin barrier layer on a titanium nitride cap
Grant 9,202,697 - Luo , et al. December 1, 2
2015-12-01
Using sacrificial oxide layer for gate length tuning and resulting device
Grant 9,147,572 - Jha , et al. September 29, 2
2015-09-29
Conformal Nitridation Of One Or More Fin-type Transistor Layers
App 20150255277 - TONG; Wei Hua ;   et al.
2015-09-10
Depositing An Etch Stop Layer Before A Dummy Cap Layer To Improve Gate Performance
App 20150249136 - ZHOU; Feng ;   et al.
2015-09-03
Completing middle of line integration allowing for self-aligned contacts
Grant 9,093,557 - Bouche , et al. July 28, 2
2015-07-28
Completing Middle Of Line Integration Allowing For Self-aligned Contacts
App 20150041909 - Bouche; Guillaume ;   et al.
2015-02-12
Gate structure having lightly doped region
Grant 8,952,459 - Hing , et al. February 10, 2
2015-02-10
Systems And Methods For Fabricating Gate Structures For Semiconductor Devices
App 20150024585 - LUO; Tien-Ying ;   et al.
2015-01-22
Reducing gate height variance during semiconductor device formation
Grant 8,900,940 - Jha , et al. December 2, 2
2014-12-02
Using Sacrificial Oxide Layer For Gate Length Tuning And Resulting Device
App 20140339612 - JHA; Ashish Kumar ;   et al.
2014-11-20
Reducing Gate Height Variance During Semiconductor Device Formation
App 20140193957 - Jha; Ashish K. ;   et al.
2014-07-10
Spacer Divot Sealing Method And Semiconductor Device Incorporating Same
App 20140175562 - Wang; Haiting ;   et al.
2014-06-26
Doped Flowable Pre-metal Dielectric
App 20140151760 - WANG; Haiting ;   et al.
2014-06-05
Integrated circuits having replacement gate structures and methods for fabricating the same
Grant 8,722,485 - Tong , et al. May 13, 2
2014-05-13
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