loadpatents
name:-0.1515531539917
name:-0.12051606178284
name:-0.029505968093872
SHIEH; Ming-Feng Patent Filings

SHIEH; Ming-Feng

Patent Applications and Registrations

Patent applications and USPTO patent grants for SHIEH; Ming-Feng.The latest application filed is for "structure and method for providing line end extensions for fin-type active regions".

Company Profile
25.126.126
  • SHIEH; Ming-Feng - Tainan County TW
  • Shieh; Ming-Feng - Tainan TW
  • SHIEH; Ming-Feng - Hsinchu TW
  • Shieh; Ming-Feng - Yongkang SG
  • Shieh; Ming-Feng - Tainan City TW
  • Shieh; Ming-Feng - Yongkang City TW
  • Shieh; Ming-Feng - Hsin-Chu TW
  • Shieh; Ming-Feng - Taipei Hsien TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Structure And Method For Providing Line End Extensions For Fin-type Active Regions
App 20220223727 - YU; Shao-Ming ;   et al.
2022-07-14
Loading effect reduction through multiple coat-etch processes
Grant 11,387,105 - Chen , et al. July 12, 2
2022-07-12
Semiconductor Device with Backside Power Rail and Method for Forming the Same
App 20220102274 - Chien; Hung-Chung ;   et al.
2022-03-31
System And Method For Overlay Error Reduction
App 20220100103 - CHIEN; Hung-Chung ;   et al.
2022-03-31
System and method for overlay error reduction
Grant 11,287,746 - Chien , et al. March 29, 2
2022-03-29
Structure and method for providing line end extensions for fin-type active regions
Grant 11,239,365 - Yu , et al. February 1, 2
2022-02-01
Overlay Mark And Method Of Making
App 20210272911 - CHEN; Chen-Yu ;   et al.
2021-09-02
Method of making a FinFET device
Grant 11,081,394 - Shieh , et al. August 3, 2
2021-08-03
Overlay mark
Grant 11,037,882 - Chen , et al. June 15, 2
2021-06-15
Loading Effect Reduction Through Multiple Coat-Etch Processes
App 20200388497 - Chen; Jin-Dah ;   et al.
2020-12-10
Spacer Etching Process For Integrated Circuit Design
App 20200286738 - LIU; RU-GUN ;   et al.
2020-09-10
Method of Semiconductor Integrated Circuit Fabrication
App 20200286782 - Shieh; Ming-Feng ;   et al.
2020-09-10
Mechanisms for forming patterns using multiple lithography processes
Grant 10,770,303 - Chang , et al. Sep
2020-09-08
Loading effect reduction through multiple coat-etch processes
Grant 10,755,936 - Chen , et al. A
2020-08-25
Structure And Method For Providing Line End Extensions For Fin-type Active Regions
App 20200212217 - YU; Shao-Ming ;   et al.
2020-07-02
Method of semiconductor integrated circuit fabrication
Grant 10,672,656 - Shieh , et al.
2020-06-02
Spacer etching process for integrated circuit design
Grant 10,665,467 - Liu , et al.
2020-05-26
Structure and method for providing line end extensions for fin-type active regions
Grant 10,573,751 - Yu , et al. Feb
2020-02-25
Systems and methods for a sequential spacer scheme
Grant 10,535,646 - Chang , et al. Ja
2020-01-14
Overlay Mark
App 20190378800 - CHEN; Chen-Yu ;   et al.
2019-12-12
Overlay mark
Grant 10,424,543 - Chen , et al. Sept
2019-09-24
Multi-layer metal contacts
Grant 10,410,913 - Shieh , et al. Sept
2019-09-10
Mechanisms For Forming Patterns Using Multiple Lithography Processes
App 20190259600 - Chang; Shih-Ming ;   et al.
2019-08-22
Loading Effect Reduction Through Multiple Coat-etch Processes
App 20190252193 - Chen; Jin-Dah ;   et al.
2019-08-15
Systems and Methods for a Sequential Spacer Scheme
App 20190131291 - Chang; Shih-Ming ;   et al.
2019-05-02
Mechanisms for forming patterns using multiple lithography processes
Grant 10,276,363 - Chang , et al.
2019-04-30
Loading effect reduction through multiple coat-etch processes
Grant 10,276,392 - Chen , et al.
2019-04-30
Overlay Mark
App 20190115303 - CHEN; Chen-Yu ;   et al.
2019-04-18
Overlay mark
Grant 10,249,570 - Chen , et al.
2019-04-02
Method of Making a FinFET Device
App 20190051564 - Shieh; Ming-Feng ;   et al.
2019-02-14
Systems and methods for a sequential spacer scheme
Grant 10,163,885 - Chang , et al. Dec
2018-12-25
Mechanisms for forming patterns using lithography processes
Grant 10,153,166 - Chang , et al. Dec
2018-12-11
Overlay Mark
App 20180350750 - CHEN; Chen-Yu ;   et al.
2018-12-06
Method of pulling-back sidewall metal layer
Grant 10,115,796 - Chen , et al. October 30, 2
2018-10-30
Method of making a FinFET device
Grant 10,096,519 - Shieh , et al. October 9, 2
2018-10-09
Method and apparatus of patterning a semiconductor device
Grant 10,048,590 - Wang , et al. August 14, 2
2018-08-14
Semiconductor device including a target integrated circuit pattern
Grant 10,049,919 - Wu , et al. August 14, 2
2018-08-14
Method for patterning a plurality of features for fin-like field-effect transistor (FinFET) devices
Grant 10,049,885 - Ng , et al. August 14, 2
2018-08-14
Overlay mark
Grant 10,043,759 - Chen , et al. August 7, 2
2018-08-07
Methods for patterning a target layer through fosse trenches using reverse sacrificial spacer lithography
Grant 10,032,664 - Chang , et al. July 24, 2
2018-07-24
Lithography using high selectivity spacers for pitch reduction
Grant 10,014,175 - Chang , et al. July 3, 2
2018-07-03
Method of making a FinFET device
Grant 9,929,153 - Shieh , et al. March 27, 2
2018-03-27
Structure and method for transistors with line end extension
Grant 9,917,192 - Yu , et al. March 13, 2
2018-03-13
Cut-mask patterning process for FIN-like field effect transistor (FINFET) device
Grant 9,904,163 - Ho , et al. February 27, 2
2018-02-27
Lithography Using High Selectivity Spacers for Pitch Reduction
App 20180012761 - Chang; Yu-Sheng ;   et al.
2018-01-11
Mechanisms for Forming Patterns Using Multiple Lithography Processes
App 20170372891 - Chang; Shih-Ming ;   et al.
2017-12-28
Systems and Methods for a Sequential Spacer Scheme
App 20170358566 - Chang; Shih-Ming ;   et al.
2017-12-14
Loading Effect Reduction Through Multiple Coat-etch Processes
App 20170309718 - Chen; Jin-Dah ;   et al.
2017-10-26
Lithography using high selectivity spacers for pitch reduction
Grant 9,773,676 - Chang , et al. September 26, 2
2017-09-26
Structure And Method For Providing Line End Extensions For Fin-type Active Regions
App 20170271503 - YU; Shao-Ming ;   et al.
2017-09-21
Mechanisms for forming patterns using multiple lithography processes
Grant 9,761,436 - Chang , et al. September 12, 2
2017-09-12
Systems and methods for a sequential spacer scheme
Grant 9,735,140 - Chang , et al. August 15, 2
2017-08-15
Loading effect reduction through multiple coat-etch processes
Grant 9,711,604 - Chen , et al. July 18, 2
2017-07-18
Method of Pulling-Back Sidewall Metal Layer
App 20170200798 - Chen; Jin-Dah ;   et al.
2017-07-13
Loading Effect Reduction Through Multiple Coat-etch Processes
App 20170194443 - Chen; Jin-Dah ;   et al.
2017-07-06
Method Of Spacer Patterning To Form A Target Integrated Circuit Pattern
App 20170162435 - WU; Chieh-Han ;   et al.
2017-06-08
Structure and method for providing line end extensions for fin-type active regions
Grant 9,673,328 - Yu , et al. June 6, 2
2017-06-06
System and methods for converting planar design to FinFET design
Grant 9,634,001 - Wann , et al. April 25, 2
2017-04-25
Method of patterning features of a semiconductor device
Grant 9,627,262 - Chiu , et al. April 18, 2
2017-04-18
Method of using a vaporizing spray system to perform a trimming process
Grant 9,595,440 - Chang , et al. March 14, 2
2017-03-14
Spacer Etching Process for Integrated Circuit Design
App 20170069505 - LIU; RU-GUN ;   et al.
2017-03-09
Self aligned patterning with multiple resist layers
Grant 9,581,900 - Shieh , et al. February 28, 2
2017-02-28
Method of spacer patterning to form a target integrated circuit pattern
Grant 9,576,814 - Wu , et al. February 21, 2
2017-02-21
Method for forming line end space structure using trimmed photo resist
Grant 9,564,327 - Lee , et al. February 7, 2
2017-02-07
Method Of Making A Finfet Device
App 20160379889 - Shieh; Ming-Feng ;   et al.
2016-12-29
Multiple edge enabled patterning
Grant 9,524,939 - Shieh , et al. December 20, 2
2016-12-20
Spacer etching process for integrated circuit design
Grant 9,502,261 - Liu , et al. November 22, 2
2016-11-22
Self-aligned Semiconductor Fabrication With Fosse Features
App 20160284591 - Chang; Shih-Ming ;   et al.
2016-09-29
Systems and Methods for a Sequential Spacer Scheme
App 20160284681 - Chang; Shih-Ming ;   et al.
2016-09-29
Method of making a FinFET device
Grant 9,443,768 - Shieh , et al. September 13, 2
2016-09-13
Layer alignment in FinFET fabrication
Grant 9,437,415 - Shieh , et al. September 6, 2
2016-09-06
Method of making a FinFET device
Grant 9,437,497 - Shieh , et al. September 6, 2
2016-09-06
Multi-Layer Metal Contacts
App 20160254183 - Shieh; Ming-Feng ;   et al.
2016-09-01
Structure And Method For Transistors With Line End Extension
App 20160240675 - Yu; Shao-Ming ;   et al.
2016-08-18
Multiple Edge Enabled Patterning
App 20160190070 - Shieh; Ming-Feng ;   et al.
2016-06-30
Method of forming a fin-like BJT
Grant 9,368,594 - Chang , et al. June 14, 2
2016-06-14
Structure And Method For Providing Line End Extensions For Fin-type Active Regions
App 20160163851 - Yu; Shao-Ming ;   et al.
2016-06-09
Self-aligned semiconductor fabrication with fosse features
Grant 9,362,169 - Chang , et al. June 7, 2
2016-06-07
Systems and methods for a sequential spacer scheme
Grant 9,362,132 - Chang , et al. June 7, 2
2016-06-07
Mechanisms for Forming Patterns Using Lithography Processes
App 20160155639 - Chang; Shih-Ming ;   et al.
2016-06-02
Self-alignment for two or more layers and methods of forming same
Grant 9,356,021 - Chang , et al. May 31, 2
2016-05-31
Method for Patterning a Plurality of Features For Fin-Like Field-Effect Transistor (FINFET) Devices
App 20160148815 - Ng; Hoi-Tou ;   et al.
2016-05-26
Multi-layer metal contacts
Grant 9,337,083 - Shieh , et al. May 10, 2
2016-05-10
Cut-Mask Patterning Process for FIN-Like Field Effect Transistor (FINFET) Device
App 20160124300 - Ho; Wei-De ;   et al.
2016-05-05
Structure and method for transistor with line end extension
Grant 9,324,866 - Yu , et al. April 26, 2
2016-04-26
Method of patterning a feature of a semiconductor device
Grant 9,305,841 - Huang , et al. April 5, 2
2016-04-05
Multiple edge enabled patterning
Grant 9,287,125 - Shieh , et al. March 15, 2
2016-03-15
Patterning method for semiconductor device fabrication
Grant 9,281,193 - Huang , et al. March 8, 2
2016-03-08
Lithography Using High Selectivity Spacers for Pitch Reduction
App 20160035571 - Chang; Yu-Sheng ;   et al.
2016-02-04
Method for patterning a plurality of features for Fin-like field-effect transistor (FinFET) devices
Grant 9,252,021 - Ng , et al. February 2, 2
2016-02-02
Method of Semiconductor Integrated Circuit Fabrication
App 20160027692 - Shieh; Ming-Feng ;   et al.
2016-01-28
Mechanisms for forming patterns using multiple lithography processes
Grant 9,245,763 - Chang , et al. January 26, 2
2016-01-26
Cut-mask patterning process for fin-like field effect transistor (FinFET) device
Grant 9,236,267 - De , et al. January 12, 2
2016-01-12
Spacer Etching Process for Integrated Circuit Design
App 20160005614 - LIU; RU-GUN ;   et al.
2016-01-07
Method For Integrated Circuit Patterning
App 20160005617 - Wu; Chieh-Han ;   et al.
2016-01-07
Mechanisms for Forming Patterns Using Multiple Lithography Processes
App 20150380261 - Chang; Shih-Ming ;   et al.
2015-12-31
Mechanisms for forming patterns
Grant 9,214,356 - Liu , et al. December 15, 2
2015-12-15
Layer alignment in FinFET fabrication
Grant 9,190,261 - Shieh , et al. November 17, 2
2015-11-17
Self-Aligned Semiconductor Fabrication With Fosse Features
App 20150318209 - Chang; Shih-Ming ;   et al.
2015-11-05
Lithography using high selectivity spacers for pitch reduction
Grant 9,177,797 - Chang , et al. November 3, 2
2015-11-03
Systems and Methods for a Sequential Spacer Scheme
App 20150311086 - Chang; Shih-Ming ;   et al.
2015-10-29
Mechanisms For Forming Patterns
App 20150303067 - Liu; Ru-Gun ;   et al.
2015-10-22
Self Aligned Patterning With Multiple Resist Layers
App 20150301447 - Shieh; Ming-Feng ;   et al.
2015-10-22
Method Of Patterning A Feature Of A Semiconductor Device
App 20150287635 - Huang; Yen-Chun ;   et al.
2015-10-08
Spacer etching process for integrated circuit design
Grant 9,153,478 - Liu , et al. October 6, 2
2015-10-06
Photo-resist with floating acid
Grant 9,152,046 - Chang , et al. October 6, 2
2015-10-06
Method of semiconductor integrated circuit fabrication
Grant 9,153,483 - Shieh , et al. October 6, 2
2015-10-06
Patterning Method For Semiconductor Device Fabrication
App 20150270129 - Huang; Yen-Chun ;   et al.
2015-09-24
Mechanisms For Forming Patterns Using Multiple Lithography Processes
App 20150262830 - CHANG; Shih-Ming ;   et al.
2015-09-17
Method and Apparatus of Patterning a Semiconductor Device
App 20150262835 - Wang; Chien-Wei ;   et al.
2015-09-17
Method for integrated circuit patterning
Grant 9,136,106 - Wu , et al. September 15, 2
2015-09-15
Photo Resist Trimmed Line End Space
App 20150255283 - Lee; Chia-Ying ;   et al.
2015-09-10
Method of fabricating a FinFET device
Grant 9,129,839 - Shieh , et al. September 8, 2
2015-09-08
Method of Making a FinFET Device
App 20150249039 - Shieh; Ming-Feng ;   et al.
2015-09-03
Method Of Forming A Fin-like Bjt
App 20150236116 - Chang; Chih-Sheng ;   et al.
2015-08-20
Method Of Patterning Features Of A Semiconductor Device
App 20150228542 - Chiu; Wei-Chao ;   et al.
2015-08-13
Patterning method for semiconductor device fabrication
Grant 9,076,736 - Huang , et al. July 7, 2
2015-07-07
Method Of Using A Vaporizing Spray System To Perform A Trimming Process
App 20150187564 - Chang; Ching-Yu ;   et al.
2015-07-02
Mechanisms for forming patterns
Grant 9,070,630 - Liu , et al. June 30, 2
2015-06-30
Self aligned patterning with multiple resist layers
Grant 9,069,249 - Shieh , et al. June 30, 2
2015-06-30
Method For Integrated Circuit Patterning
App 20150179435 - Wu; Chieh-Han ;   et al.
2015-06-25
Self-Alignment for Two or More Layers and Methods of Forming Same
App 20150171081 - Chang; Shih-Ming ;   et al.
2015-06-18
Method of patterning a feature of a semiconductor device
Grant 9,054,159 - Huang , et al. June 9, 2
2015-06-09
Lithography Using High Selectivity Spacers for Pitch Reduction
App 20150155171 - Chang; Yu-Sheng ;   et al.
2015-06-04
Method and apparatus of patterning a semiconductor device
Grant 9,046,785 - Wang , et al. June 2, 2
2015-06-02
Mechanisms For Forming Patterns
App 20150147887 - Liu; Ru-Gun ;   et al.
2015-05-28
Method Of Making a FinFET Device
App 20150147867 - Shieh; Ming-Feng ;   et al.
2015-05-28
Photo resist trimmed line end space
Grant 9,040,433 - Lee , et al. May 26, 2
2015-05-26
Fin-like BJT
Grant 9,035,426 - Chang , et al. May 19, 2
2015-05-19
Method of making a FinFET device
Grant 9,034,723 - Shieh , et al. May 19, 2
2015-05-19
Photo-Resist with Floating Acid
App 20150132702 - Chang; Ching-Yu ;   et al.
2015-05-14
Method of patterning features of a semiconductor device
Grant 9,023,695 - Chiu , et al. May 5, 2
2015-05-05
Method and device for increasing fin device density for unaligned fins
Grant 9,026,959 - Wang , et al. May 5, 2
2015-05-05
Structure And Method For Providing Line End Extensions For Fin-type Active Regions
App 20150115373 - Yu; Shao-Ming ;   et al.
2015-04-30
Method Of Semiconductor Integrated Circuit Fabrication
App 20150118837 - Shieh; Ming-Feng ;   et al.
2015-04-30
Method Of Making A FinFET Device
App 20150111362 - Shieh; Ming-Feng ;   et al.
2015-04-23
Method Of Making A FinFET Device
App 20150108551 - Shieh; Ming-Feng ;   et al.
2015-04-23
Integrated circuit layout and method with double patterning
Grant 8,987,008 - Shieh , et al. March 24, 2
2015-03-24
Self-Alignment for using Two or More Layers and Methods of Forming Same
App 20150079774 - Chang; Shih-Ming ;   et al.
2015-03-19
Overlay Mark
App 20150076613 - CHEN; Chen-Yu ;   et al.
2015-03-19
Method For Patterning A Plurality Of Features For Fin-like Field-effect Transistor (finfet) Devices
App 20150072527 - Ng; Hoi-Tou ;   et al.
2015-03-12
Method of making a FinFET device
Grant 8,975,129 - Shieh , et al. March 10, 2
2015-03-10
Method For Integrated Circuit Patterning
App 20150064916 - Shieh; Ming-Feng ;   et al.
2015-03-05
Integrated Circuit Layout And Method With Double Patterning
App 20150056724 - Shieh; Ming-Feng ;   et al.
2015-02-26
Self-alignment for using two or more layers and methods of forming same
Grant 8,962,464 - Chang , et al. February 24, 2
2015-02-24
Photo-resist with floating acid
Grant 8,936,903 - Chang , et al. January 20, 2
2015-01-20
Method of fabricating a FinFET device
Grant 8,932,957 - Shieh , et al. January 13, 2
2015-01-13
Photo Resist Trimmed Line End Space
App 20140377962 - Lee; Chia-Ying ;   et al.
2014-12-25
Method of Fabricating a FinFET Device
App 20140367785 - Shieh; Ming-Feng ;   et al.
2014-12-18
Overlay mark and method of measuring the same
Grant 8,908,181 - Chen , et al. December 9, 2
2014-12-09
System And Methods For Converting Planar Design To Finfet Design
App 20140332904 - WANN; Clement Hsingjen ;   et al.
2014-11-13
Method And Device For Increasing Fin Device Density For Unaligned Fins
App 20140331193 - WANG; Chien-Hsun ;   et al.
2014-11-06
Mandrel modification for achieving single fin fin-like field effect transistor (FinFET) device
Grant 8,881,066 - Shieh , et al. November 4, 2
2014-11-04
High gate density devices and methods
Grant 8,871,597 - Shieh , et al. October 28, 2
2014-10-28
Structure and method for fabricating fin devices
Grant 8,847,295 - Shieh , et al. September 30, 2
2014-09-30
Method of fabricating a FinFET device
Grant 8,846,490 - Shieh , et al. September 30, 2
2014-09-30
Method for Integrated Circuit Patterning
App 20140273456 - Shieh; Ming-Feng ;   et al.
2014-09-18
Method Of Patterning Features Of A Semiconductor Device
App 20140273363 - Chiu; Wei-Chao ;   et al.
2014-09-18
Method of Fabricating a FinFET Device
App 20140273464 - Shieh; Ming-Feng ;   et al.
2014-09-18
Method of Patterning a Feature of a Semiconductor Device
App 20140273446 - Huang; Yen-Chun ;   et al.
2014-09-18
Method of Fabricating a FinFET Device
App 20140264717 - Shieh; Ming-Feng ;   et al.
2014-09-18
Patterning Method For Semiconductor Device Fabrication
App 20140273468 - Huang; Yen-Chun ;   et al.
2014-09-18
Spacer Etching Process For Integrated Circuit Design
App 20140273442 - Liu; Ru-Gun ;   et al.
2014-09-18
Method for integrated circuit patterning
Grant 8,835,323 - Shieh , et al. September 16, 2
2014-09-16
Multi-Layer Metal Contacts
App 20140252433 - Shieh; Ming-Feng ;   et al.
2014-09-11
High Gate Density Devices and Methods
App 20140256107 - Shieh; Ming-Feng ;   et al.
2014-09-11
Photo-Resist with Floating Acid
App 20140255850 - Chang; Ching-Yu ;   et al.
2014-09-11
Multiple Edge Enabled Patterning
App 20140252559 - Shieh; Ming-Feng ;   et al.
2014-09-11
Photo resist trimmed line end space
Grant 8,828,885 - Lee , et al. September 9, 2
2014-09-09
System and methods for converting planar design to FinFET design
Grant 8,816,444 - Wann , et al. August 26, 2
2014-08-26
Method of fabricating a semiconductor device
Grant 8,802,569 - Lu , et al. August 12, 2
2014-08-12
Method and device for increasing fin device density for unaligned fins
Grant 8,806,397 - Wang , et al. August 12, 2
2014-08-12
Self Aligned Patterning With Multiple Resist Layers
App 20140220493 - Shieh; Ming-Feng ;   et al.
2014-08-07
Selective bias compensation for patterning steps in CMOS processes
Grant 8,795,540 - Shieh , et al. August 5, 2
2014-08-05
System and methods for converting planar design to FinFET design
Grant 8,799,833 - Wann , et al. August 5, 2
2014-08-05
Cross OD FinFET patterning
Grant 8,796,156 - Shieh , et al. August 5, 2
2014-08-05
Photo Resist Trimmed Line End Space
App 20140193981 - Lee; Chia-Ying ;   et al.
2014-07-10
Method and device for increasing fin device density for unaligned fins
Grant 8,769,446 - Wang , et al. July 1, 2
2014-07-01
Patterning process for fin-like field effect transistor (finFET) device
Grant 8,741,776 - De , et al. June 3, 2
2014-06-03
High gate density devices and methods
Grant 8,735,991 - Shieh , et al. May 27, 2
2014-05-27
Multiple edge enabled patterning
Grant 8,730,473 - Shieh , et al. May 20, 2
2014-05-20
Method And Device For Increasing Fin Device Density For Unaligned Fins
App 20140013288 - WANG; Chien-Hsun ;   et al.
2014-01-09
Overlay Mark And Method Of Measuring The Same
App 20140002822 - CHEN; Chen-Yu ;   et al.
2014-01-02
Structure and Method for Fabricating Fin Devices
App 20130313646 - Shieh; Ming-Feng ;   et al.
2013-11-28
Layer Alignment in FinFET Fabrication
App 20130273750 - Shieh; Ming-Feng ;   et al.
2013-10-17
Method Of Fabricating A Semiconductor Device
App 20130244434 - Lu; Kuei-Liang ;   et al.
2013-09-19
Device and method for forming Fins in integrated circuitry
Grant 8,525,267 - Wang , et al. September 3, 2
2013-09-03
Structure and method for fabricating fin devices
Grant 8,513,078 - Shieh , et al. August 20, 2
2013-08-20
Cut-mask Patterning Process For Fin-like Field Effect Transistor (finfet) Device
App 20130210232 - De; Ho Wei ;   et al.
2013-08-15
Patterning Process For Fin-like Field Effect Transistor (finfet) Device
App 20130203257 - De; Ho Wei ;   et al.
2013-08-08
Structure And Method For Transistor With Line End Extension
App 20130187237 - Yu; Shao-Ming ;   et al.
2013-07-25
Method for forming metrology structures from fins in integrated circuitry
Grant 8,486,769 - Wang , et al. July 16, 2
2013-07-16
Fin-like BJT
App 20130168819 - Chang; Chih-Sheng ;   et al.
2013-07-04
Mandrel Modification For Achieving Single Fin Fin-like Field Effect Transistor (finfet) Device
App 20130174103 - Shieh; Ming-Feng ;   et al.
2013-07-04
Structure and Method for Fabricating Fin Devices
App 20130164924 - Shieh; Ming-Feng ;   et al.
2013-06-27
Selective Bias Compensation for Patterning Steps in CMOS Processes
App 20130164938 - Shieh; Ming-Feng ;   et al.
2013-06-27
High Gate Density Devices And Methods
App 20130140639 - Shieh; Ming-Feng ;   et al.
2013-06-06
Layer Alignment in FinFET Fabrication
App 20130052793 - Shieh; Ming-Feng ;   et al.
2013-02-28
System And Methods For Converting Planar Design To Finfet Design
App 20120278781 - WANN; Clement Hsingjen ;   et al.
2012-11-01
System And Methods For Converting Planar Design To Finfet Design
App 20120273899 - WANN; Clement Hsingjen ;   et al.
2012-11-01
Method of fabrication of a semiconductor device having reduced pitch
Grant 8,241,823 - Shieh , et al. August 14, 2
2012-08-14
Double patterning technology using single-patterning-spacer-technique
Grant 8,211,807 - Chen , et al. July 3, 2
2012-07-03
Method For Forming Metrology Structures From Fins In Integrated Circuitry
App 20120126375 - Wang; Chien-Hsun ;   et al.
2012-05-24
Device And Method For Forming Fins In Integrated Circuitry
App 20120126326 - Wang; Chien-Hsun ;   et al.
2012-05-24
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Method Of Pitch Halving
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Integrated Circuit Layout Design
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Method for designing photomask
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