| Patent | Date |
|---|
Transistor comprising an air gap positioned adjacent a gate electrode
Grant 11,456,382 - Economikos , et al. September 27, 2 | 2022-09-27 |
Split gate (SG) memory device and novel methods of making the SG-memory device
Grant 11,450,678 - Zang , et al. September 20, 2 | 2022-09-20 |
Epi semiconductor structures with increased epi volume in source/drain regions of a transistor device formed on an SOI substrate
Grant 11,393,915 - Pandey , et al. July 19, 2 | 2022-07-19 |
Epi Semiconductor Structures With Increased Epi Volume In Source/drain Regions Of A Transistor Device Formed On An Soi Substrate
App 20220181468 - Pandey; Shesh Mani ; et al. | 2022-06-09 |
Concurrent manufacture of field effect transistors and bipolar junction transistors with gain tuning
Grant 11,322,414 - Pandey May 3, 2 | 2022-05-03 |
Multi-level isolation structure
Grant 11,158,633 - Wang , et al. October 26, 2 | 2021-10-26 |
Multi-level Isolation Structure
App 20210313321 - Wang; Haiting ; et al. | 2021-10-07 |
Semiconductor devices with uniform gate height and method of forming same
Grant 11,094,827 - Shen , et al. August 17, 2 | 2021-08-17 |
Epi semiconductor material structures in source/drain regions of a transistor device formed on an SOI substrate
Grant 11,049,955 - Pandey , et al. June 29, 2 | 2021-06-29 |
Concurrent Manufacture Of Field Effect Transistors And Bipolar Junction Transistors With Gain Tuning
App 20210193526 - Pandey; Shesh Mani | 2021-06-24 |
Novel Split Gate (sg) Memory Device And Novel Methods Of Making The Sg-memory Device
App 20210151451 - Zang; Hui ; et al. | 2021-05-20 |
N-well resistor
Grant 10,985,244 - Pandey , et al. April 20, 2 | 2021-04-20 |
Methods of forming air gaps between source/drain contacts and the resulting devices
Grant 10,950,692 - Xie , et al. March 16, 2 | 2021-03-16 |
Semiconductor Device With Reduced Parasitic Capacitance
App 20210050425 - PANDEY; SHESH MANI ; et al. | 2021-02-18 |
Structure With Counter Doping Region Between N And P Wells Under Gate Structure
App 20210043766 - Zhu; Baofu ; et al. | 2021-02-11 |
N-well Resistor
App 20200411638 - PANDEY; Shesh Mani ; et al. | 2020-12-31 |
Semiconductor Devices With Uniform Gate Height And Method Of Forming Same
App 20200388707 - SHEN; YANPING ; et al. | 2020-12-10 |
Semiconductor device with reduced parasitic capacitance
Grant 10,840,245 - Pandey , et al. November 17, 2 | 2020-11-17 |
Shaped gate caps in dielectric-lined openings
Grant 10,825,910 - Zang , et al. November 3, 2 | 2020-11-03 |
Shaped Gate Caps In Dielectric-lined Openings
App 20200335594 - Zang; Hui ; et al. | 2020-10-22 |
FinFET having insulating layers between gate and source/drain contacts
Grant 10,741,451 - Zang , et al. A | 2020-08-11 |
Method of forming gate structure with undercut region and resulting device
Grant 10,727,133 - Gao , et al. | 2020-07-28 |
Vertical-transport field-effect transistors having gate contacts located over the active region
Grant 10,699,942 - Xie , et al. | 2020-06-30 |
Interconnect structures with reduced capacitance
Grant 10,672,710 - Singh , et al. | 2020-06-02 |
Novel Epi Semiconductor Material Structures In Source/drain Regions Of A Transistor Device Formed On An Soi Substrate
App 20200135895 - Pandey; Shesh Mani ; et al. | 2020-04-30 |
Finfet Having Insulating Layers Between Gate And Source/drain Contacts
App 20200111713 - Zang; Hui ; et al. | 2020-04-09 |
Method Of Forming Gate Structure With Undercut Region And Resulting Device
App 20200091005 - Gao; Qun ; et al. | 2020-03-19 |
Hybrid fin cut with improved fin profiles
Grant 10,586,736 - Wang , et al. | 2020-03-10 |
Methods Of Forming Air Gaps Between Source/drain Contacts And The Resulting Devices
App 20200075715 - Xie; Ruilong ; et al. | 2020-03-05 |
Transistor Comprising An Air Gap Positioned Adjacent A Gate Electrode
App 20200066899 - Economikos; Laertis ; et al. | 2020-02-27 |
Using Source/drain Contact Cap During Gate Cut
App 20200020687 - Wang; Haiting ; et al. | 2020-01-16 |
Method for forming replacement air gap
Grant 10,535,771 - Economikos , et al. Ja | 2020-01-14 |
Using source/drain contact cap during gate cut
Grant 10,522,538 - Wang , et al. Dec | 2019-12-31 |
Method For Forming Replacement Air Gap
App 20190393335 - Economikos; Laertis ; et al. | 2019-12-26 |
Hybrid Fin Cut With Improved Fin Profiles
App 20190378763 - WANG; Haiting ; et al. | 2019-12-12 |
Interconnect Structures With Reduced Capacitance
App 20190371736 - SINGH; Sunil Kumar ; et al. | 2019-12-05 |
Transistor Fins With Different Thickness Gate Dielectric
App 20190371796 - Zang; Hui ; et al. | 2019-12-05 |
Transistors Having Double Spacers At Tops Of Gate Conductors
App 20190363174 - Zang; Hui ; et al. | 2019-11-28 |
Transistor fins with different thickness gate dielectric
Grant 10,475,791 - Zang , et al. Nov | 2019-11-12 |
Vertical-transport Field-effect Transistors Having Gate Contacts Located Over The Active Region
App 20190326165 - Xie; Ruilong ; et al. | 2019-10-24 |
Field-effect Transistors With Fins Formed By A Damascene-like Process
App 20190273148 - Zhao; Wei ; et al. | 2019-09-05 |
Field-effect transistors with fins formed by a damascene-like process
Grant 10,403,742 - Zhao , et al. Sep | 2019-09-03 |
Gate oxide formation through hybrid methods of thermal and deposition processes and method for producing the same
Grant 10,361,289 - Zhao , et al. | 2019-07-23 |
Single-curvature cavity for semiconductor epitaxy
Grant 10,355,104 - Qi , et al. July 16, 2 | 2019-07-16 |
Methods of forming source/drain regions on FinFET devices
Grant 10,347,748 - Pandey , et al. July 9, 2 | 2019-07-09 |
Single-curvature Cavity For Semiconductor Epitaxy
App 20190131432 - Qi; Yi ; et al. | 2019-05-02 |
Field-effect Transistors With Fins Formed By A Damascene-like Process
App 20190097019 - Zhao; Wei ; et al. | 2019-03-28 |
Methods Of Forming Epi Semiconductor Material In Source/drain Regions Of A Transistor Device Formed On An Soi Substrate
App 20190088766 - Pandey; Shesh Mani ; et al. | 2019-03-21 |
Device with diffusion blocking layer in source/drain region
Grant 10,164,099 - Pandey , et al. Dec | 2018-12-25 |
Novel Approach To Improve Sdb Device Performance
App 20180337033 - PANDEY; Shesh Mani ; et al. | 2018-11-22 |
Novel Sti Process For Sdb Devices
App 20180286946 - Pandey; Shesh Mani | 2018-10-04 |
Metholodogy for profile control and capacitance reduction
Grant 10,083,904 - Singh , et al. September 25, 2 | 2018-09-25 |
Low resistance conductive contacts
Grant 10,084,093 - Mishra , et al. September 25, 2 | 2018-09-25 |
Vertical transistor structure with looped channel
Grant 10,079,308 - Pandey , et al. September 18, 2 | 2018-09-18 |
Method to fabricate vertical fin field-effect-transistors
Grant 10,062,689 - Pandey August 28, 2 | 2018-08-28 |
Methods for fin thinning providing improved SCE and S/D EPI growth
Grant 10,056,486 - Pandey , et al. August 21, 2 | 2018-08-21 |
Finfet Device And Method Of Manufacturing
App 20180233415 - PANDEY; Shesh Mani ; et al. | 2018-08-16 |
Device With Diffusion Blocking Layer In Source/drain Region
App 20180175198 - Pandey; Shesh Mani ; et al. | 2018-06-21 |
Sub-fin doping method
Grant 10,002,793 - Shu , et al. June 19, 2 | 2018-06-19 |
Chip integration including vertical field-effect transistors and bipolar junction transistors
Grant 10,002,797 - Pandey June 19, 2 | 2018-06-19 |
Multiple-step epitaxial growth S/D regions for NMOS FinFET
Grant 9,966,433 - Li , et al. May 8, 2 | 2018-05-08 |
FinFET device and method of manufacturing
Grant 9,966,313 - Pandey , et al. May 8, 2 | 2018-05-08 |
Method to fabricate a high performance capacitor in a back end of line (BEOL)
Grant 9,960,113 - Singh , et al. May 1, 2 | 2018-05-01 |
Notched Fin Structures And Methods Of Manufacture
App 20180108732 - Shu; Jiehui ; et al. | 2018-04-19 |
Device with diffusion blocking layer in source/drain region
Grant 9,947,788 - Pandey , et al. April 17, 2 | 2018-04-17 |
Finfet Device And Method Of Manufacturing
App 20180040516 - PANDEY; Shesh Mani ; et al. | 2018-02-08 |
Multiple-step Epitaxial Growth S/d Regions For Nmos Finfet
App 20180040696 - LI; Zhiqing ; et al. | 2018-02-08 |
Novel Sti Process For Sdb Devices
App 20170373144 - Pandey; Shesh Mani | 2017-12-28 |
NOVEL METHOD TO FABRICATE VERTICAL NWs
App 20170330878 - Pandey; Shesh Mani | 2017-11-16 |
Method, Apparatus, And System For Increasing Drive Current Of Finfet Device
App 20170309623 - Pandey; Shesh Mani ; et al. | 2017-10-26 |
Method To Fabricate A High Performance Capacitor In A Back End Of Line (beol)
App 20170294378 - SINGH; Sunil Kumar ; et al. | 2017-10-12 |
Methods Of Forming Source/drain Regions On Finfet Devices
App 20170294522 - Pandey; Shesh Mani ; et al. | 2017-10-12 |
Method For Forming A Doped Region In A Fin Using A Variable Thickness Spacer And The Resulting Device
App 20170288041 - Pandey; Shesh Mani ; et al. | 2017-10-05 |
Methods For Fin Thinning Providing Improved Sce And S/d Epi Growth
App 20170278965 - PANDEY; Shesh Mani ; et al. | 2017-09-28 |
Device With Diffusion Blocking Layer In Source/drain Region
App 20170229578 - Pandey; Shesh Mani ; et al. | 2017-08-10 |
Semiconductor Structure(s) With Extended Source/drain Channel Interfaces And Methods Of Fabrication
App 20170222054 - BANGHART; Edmund Kenneth ; et al. | 2017-08-03 |
Method to fabricate a high performance capacitor in a back end of line (BEOL)
Grant 9,711,346 - Singh , et al. July 18, 2 | 2017-07-18 |
Metholodogy For Profile Control And Capacitance Reduction
App 20170200674 - Singh; Sunil Kumar ; et al. | 2017-07-13 |
On-chip Variable Capacitor With Geometric Cross-section
App 20170194245 - PATIL; Suraj ; et al. | 2017-07-06 |
Semiconductor structure(s) with extended source/drain channel interfaces and methods of fabrication
Grant 9,679,990 - Banghart , et al. June 13, 2 | 2017-06-13 |
Method, apparatus, and system for increasing junction electric field of high current diode
Grant 9,647,145 - Singh , et al. May 9, 2 | 2017-05-09 |
FinFET conformal junction and high epi surface dopant concentration method and device
Grant 9,577,040 - Feng , et al. February 21, 2 | 2017-02-21 |
FinFET conformal junction and abrupt junction with reduced damage method and device
Grant 9,559,176 - Feng , et al. January 31, 2 | 2017-01-31 |
Method To Fabricate A High Performance Capacitor In A Back End Of Line (beol)
App 20170025270 - SINGH; Sunil Kumar ; et al. | 2017-01-26 |
Fin-FET replacement metal gate structure and method of manufacturing the same
Grant 9,543,297 - Wu , et al. January 10, 2 | 2017-01-10 |
Finfet Conformal Junction And High Epi Surface Dopant Concentration Method And Device
App 20160308005 - FENG; Peijie ; et al. | 2016-10-20 |
Finfet Conformal Junction And Abrupt Junction With Reduced Damage Method And Device
App 20160293718 - FENG; Peijie ; et al. | 2016-10-06 |
Source/drain profile engineering for enhanced p-MOSFET
Grant 9,419,082 - Mishra , et al. August 16, 2 | 2016-08-16 |
FinFET conformal junction and high EPI surface dopant concentration method and device
Grant 9,406,752 - Feng , et al. August 2, 2 | 2016-08-02 |
FinFET conformal junction and abrupt junction with reduced damage method and device
Grant 9,397,162 - Feng , et al. July 19, 2 | 2016-07-19 |
Finfet Conformal Junction And High Epi Surface Dopant Concentration Method And Device
App 20160190251 - FENG; Peijie ; et al. | 2016-06-30 |
Finfet Conformal Junction And Abrupt Junction With Reduced Damage Method And Device
App 20160190252 - FENG; Peijie ; et al. | 2016-06-30 |
Semiconductor Structure(s) With Extended Source/drain Channel Interfaces And Methods Of Fabrication
App 20160043190 - BANGHART; Edmund Kenneth ; et al. | 2016-02-11 |
Source/drain Profile Engineering For Enhanced P-mosfet
App 20150311293 - MISHRA; Shiv Kumar ; et al. | 2015-10-29 |
Fabricating fin-type field effect transistor with punch-through stop region
Grant 9,087,860 - Banghart , et al. July 21, 2 | 2015-07-21 |
Polysilicon resistor formation
Grant 8,946,039 - Singh , et al. February 3, 2 | 2015-02-03 |
Methods of tailoring work function of semiconductor devices with high-k/metal layer gate structures by performing a fluorine implant process
Grant 8,828,834 - Pandey , et al. September 9, 2 | 2014-09-09 |
Methods Of Tailoring Work Function Of Semiconductor Devices With High-k/metal Layer Gate Structures By Performing A Fluorine Implant Process
App 20130330900 - Pandey; Shesh Mani ; et al. | 2013-12-12 |
Methods For Fabricating Integrated Circuits With Reduced Electrical Parameter Variation
App 20130244388 - Scheiper; Thilo ; et al. | 2013-09-19 |
Method for fabricating semiconductor devices using stress engineering
Grant 8,153,537 - Yeong , et al. April 10, 2 | 2012-04-10 |
Method For Fabricating Semiconductor Devices Using Stress Engineering
App 20120070971 - YEONG; Sai Hooi ; et al. | 2012-03-22 |
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