Haran; Balasubramanian S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Haran; Balasubramanian S..The latest application filed is for "hybrid orientation fin field effect transistor and planar field effect transistor".

Company Profile

1.122.138

Haran; Balasubramanian S. - Watervliet NY
Haran; Balasubramanian S. - Albany NY
Haran; Balasubramanian S - Watervliet NY
Haran; Balasubramanian S. - Mount Kisco NY
Haran; Balasubramanian S. - Watervilet NY US
Haran; Balasubramanian S. - Watervliert NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Shallow trench isolation structures Grant 9,548,356 - Doris , et al. January 17, 2	2017-01-17
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,478,549 - Cheng , et al. October 25, 2	2016-10-25
Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate Grant 9,406,679 - Edge , et al. August 2, 2	2016-08-02
Suspended ring-shaped nanowire structure Grant 9,406,790 - Cheng , et al. August 2, 2	2016-08-02
FinFET device Grant 9,406,570 - Cheng , et al. August 2, 2	2016-08-02
Silicon-on-insulator transistor with self-aligned borderless source/drain contacts Grant 9,368,590 - Fan , et al. June 14, 2	2016-06-14
Hybrid Orientation Fin Field Effect Transistor And Planar Field Effect Transistor App 20160126352 - Cheng; Kangguo ; et al.	2016-05-05
CMOS with dual raised source and drain for NMOS and PMOS Grant 9,299,719 - Cheng , et al. March 29, 2	2016-03-29
Hybrid orientation fin field effect transistor and planar field effect transistor Grant 9,275,911 - Cheng , et al. March 1, 2	2016-03-01
Dummy fin formation by gas cluster ion beam Grant 9,269,629 - Cheng , et al. February 23, 2	2016-02-23
CMOS with dual raised source and drain for NMOS and PMOS Grant 9,263,466 - Cheng , et al. February 16, 2	2016-02-16
CMOS with dual raised source and drain for NMOS and PMOS Grant 9,263,465 - Cheng , et al. February 16, 2	2016-02-16
Manufacturing process for finFET device Grant 9,257,350 - Cheng , et al. February 9, 2	2016-02-09
Self-aligned contact structure for replacement metal gate Grant 9,257,531 - Seo , et al. February 9, 2	2016-02-09
Uniform finFET gate height Grant 9,245,965 - Haran , et al. January 26, 2	2016-01-26
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,219,068 - Cheng , et al. December 22, 2	2015-12-22
Undercut insulating regions for silicon-on-insulator device Grant 9,214,378 - Cheng , et al. December 15, 2	2015-12-15
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20150340288 - Cheng; Kangguo ; et al.	2015-11-26
Integration Of Multiple Threshold Voltage Devices For Complementary Metal Oxide Semiconductor Using Full Metal Gate App 20150333065 - Edge; Lisa F. ; et al.	2015-11-19
Shallow trench isolation structures Grant 9,190,313 - Doris , et al. November 17, 2	2015-11-17
Fin isolation in multi-gate field effect transistors Grant 9,178,019 - Cheng , et al. November 3, 2	2015-11-03
Shallow Trench Isolation Structures App 20150255538 - Doris; Bruce B. ; et al.	2015-09-10
Finfet Device App 20150235909 - Cheng; Kangguo ; et al.	2015-08-20
Finfet Device App 20150228672 - Cheng; Kangguo ; et al.	2015-08-13
Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate Grant 9,093,558 - Edge , et al. July 28, 2	2015-07-28
CMOS with dual raised source and drain for NMOS and PMOS Grant 9,087,921 - Cheng , et al. July 21, 2	2015-07-21
CMOS with dual raised source and drain for NMOS and PMOS Grant 9,087,741 - Cheng , et al. July 21, 2	2015-07-21
Method and structure for finFET with finely controlled device width Grant 9,082,873 - Yamashita , et al. July 14, 2	2015-07-14
Fin Isolation In Multi-gate Field Effect Transistors App 20150171164 - Cheng; Kangguo ; et al.	2015-06-18
Shallow trench isolation structures Grant 9,059,243 - Doris , et al. June 16, 2	2015-06-16
Replacement gate ETSOI with sharp junction Grant 9,059,209 - Cheng , et al. June 16, 2	2015-06-16
Borderless Contact For Ultra-thin Body Devices App 20150155353 - Fan; Su Chen ; et al.	2015-06-04
Cmos With Dual Raised Source And Drain For Nmos And Pmos App 20150147853 - Cheng; Kangguo ; et al.	2015-05-28
Cmos With Dual Raised Source And Drain For Nmos And Pmos App 20150140744 - Cheng; Kangguo ; et al.	2015-05-21
Cmos With Dual Raised Source And Drain For Nmos And Pmos App 20150140743 - Cheng; Kangguo ; et al.	2015-05-21
Cmos With Dual Raised Source And Drain For Nmos And Pmos App 20150137147 - Cheng; Kangguo ; et al.	2015-05-21
Borderless contact for ultra-thin body devices Grant 9,024,389 - Fan , et al. May 5, 2	2015-05-05
Bulk fin-field effect transistors with well defined isolation Grant 8,999,774 - Cheng , et al. April 7, 2	2015-04-07
FinFET with dielectric isolation by silicon-on-nothing and method of fabrication Grant 9,000,522 - Cheng , et al. April 7, 2	2015-04-07
Bulk fin-field effect transistors with well defined isolation Grant 8,993,382 - Cheng , et al. March 31, 2	2015-03-31
Stress enhanced finFET devices Grant 8,987,837 - Cheng , et al. March 24, 2	2015-03-24
Fin isolation in multi-gate field effect transistors Grant 8,987,790 - Cheng , et al. March 24, 2	2015-03-24
SOI device with embedded liner in box layer to limit STI recess Grant 8,987,070 - Cheng , et al. March 24, 2	2015-03-24
Dummy Fin Formation By Gas Cluster Ion Beam App 20150064874 - Cheng; Kangguo ; et al.	2015-03-05
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20150064855 - Cheng; Kangguo ; et al.	2015-03-05
Suspended Nanowire Structure App 20150053913 - Cheng; Kangguo ; et al.	2015-02-26
Finfet With Self-aligned Punchthrough Stopper App 20150054033 - Cheng; Kangguo ; et al.	2015-02-26
Dummy fin formation by gas cluster ion beam Grant 8,946,792 - Cheng , et al. February 3, 2	2015-02-03
FinFET with self-aligned punchthrough stopper Grant 8,932,918 - Cheng , et al. January 13, 2	2015-01-13
Self-aligned contact structure for replacement metal gate Grant 8,928,090 - Seo , et al. January 6, 2	2015-01-06
Bulk fin-field effect transistors with well defined isolation Grant 8,928,067 - Cheng , et al. January 6, 2	2015-01-06
Robust isolation for thin-box ETSOI MOSFETS Grant 8,927,387 - Cheng , et al. January 6, 2	2015-01-06
Self-aligned Contact Structure For Replacement Metal Gate App 20140377927 - Seo; Soon-Cheon ; et al.	2014-12-25
Suspended nanowire structure Grant 8,889,564 - Cheng , et al. November 18, 2	2014-11-18
Uniform Finfet Gate Height App 20140319611 - Haran; Balasubramanian S. ; et al.	2014-10-30
Stress enhanced finFET devices Grant 8,859,379 - Cheng , et al. October 14, 2	2014-10-14
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140295647 - CHENG; Kangguo ; et al.	2014-10-02
Stress Enhanced Finfet Devices App 20140264496 - CHENG; Kangguo ; et al.	2014-09-18
Stress Enhanced Finfet Devices App 20140264598 - CHENG; Kangguo ; et al.	2014-09-18
Electrical isolation structures for ultra-thin semiconductor-on-insulator devices Grant 8,836,031 - Haran , et al. September 16, 2	2014-09-16
Uniform finFET gate height Grant 8,829,617 - Haran , et al. September 9, 2	2014-09-09
MOSFET including asymmetric source and drain regions Grant 8,828,828 - Cheng , et al. September 9, 2	2014-09-09
Inducing channel stress in semiconductor-on-insulator devices by base substrate oxidation Grant 8,815,694 - Cheng , et al. August 26, 2	2014-08-26
Dual metal fill and dual threshold voltage for replacement gate metal devices Grant 8,796,128 - Edge , et al. August 5, 2	2014-08-05
Method and structure for shallow trench isolation to mitigate active shorts Grant 8,790,991 - Cummings , et al. July 29, 2	2014-07-29
Finfet With Dielectric Isolation By Silicon-on-nothing And Method Of Fabrication App 20140191321 - Cheng; Kangguo ; et al.	2014-07-10
MOSFET including asymmetric source and drain regions Grant 8,772,874 - Cheng , et al. July 8, 2	2014-07-08
Mosfet Including Asymmetric Source And Drain Regions App 20140187007 - Cheng; Kangguo ; et al.	2014-07-03
Finfet Device App 20140175549 - Cheng; Kangguo ; et al.	2014-06-26
Etch Resistant Raised Isolation For Semiconductor Devices App 20140159123 - Cheng; Kangguo ; et al.	2014-06-12
Finfet Hybrid Full Metal Gate With Borderless Contacts App 20140162447 - Edge; Lisa F. ; et al.	2014-06-12
Uniform Finfet Gate Height App 20140151801 - Haran; Balasubramanian S. ; et al.	2014-06-05
Shallow Trench Isolation Structures App 20140154865 - Doris; Bruce B. ; et al.	2014-06-05
Inducing Channel Stress in Semiconductor-on-Insulator Devices by Base Substrate Oxidation App 20140151803 - Cheng; Kangguo ; et al.	2014-06-05
Fin Isolation In Multi-gate Field Effect Transistors App 20140145247 - Cheng; Kangguo ; et al.	2014-05-29
Dummy Fin Formation By Gas Cluster Ion Beam App 20140145248 - Cheng; Kangguo ; et al.	2014-05-29
Self-aligned Contact Structure For Replacement Metal Gate App 20140117421 - Seo; Soon-Cheon ; et al.	2014-05-01
MOS capacitors with a finFET process Grant 8,703,553 - Cheng , et al. April 22, 2	2014-04-22
Hybrid Orientation Fin Field Effect Transistor And Planar Field Effect Transistor App 20140103450 - Cheng; Kangguo ; et al.	2014-04-17
Dual Metal Fill And Dual Threshold Voltage For Replacement Gate Metal Devices App 20140084382 - Berliner; Nathaniel ; et al.	2014-03-27
Method to improve wet etch budget in FEOL integration Grant 8,679,941 - Cummings , et al. March 25, 2	2014-03-25
Method And Structure For Finfet With Finely Controlled Device Width App 20140077296 - Yamashita; Tenko ; et al.	2014-03-20
Shallow trench isolation structures Grant 8,673,738 - Doris , et al. March 18, 2	2014-03-18
Replacement gate ETSOI with sharp junction Grant 8,673,708 - Cheng , et al. March 18, 2	2014-03-18
Soi Device With Embedded Liner In Box Layer To Limit Sti Recess App 20140070357 - Cheng; Kangguo ; et al.	2014-03-13
Electrical Isolation Structures For Ultra-thin Semiconductor-on-insulator Devices App 20140061800 - Haran; Balasubramanian S. ; et al.	2014-03-06
Silicon-on-insulator Transistor With Self-aligned Borderless Source/drain Contacts App 20140061799 - FAN; Susan S. ; et al.	2014-03-06
Suspended Nanowire Structure App 20140061582 - Cheng; Kangguo ; et al.	2014-03-06
Finfet With Self-aligned Punchthrough Stopper App 20140061794 - Cheng; Kangguo ; et al.	2014-03-06
Structure and method to improve ETSOI MOSFETS with back gate Grant 8,664,050 - Cheng , et al. March 4, 2	2014-03-04
Integration Of Multiple Threshold Voltage Devices For Complementary Metal Oxide Semiconductor Using Full Metal Gate App 20140054717 - Edge; Lisa F. ; et al.	2014-02-27
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140048857 - CHENG; Kangguo ; et al.	2014-02-20
Replacement Gate ETSOI With Sharp Junction App 20140051216 - Cheng; Kangguo ; et al.	2014-02-20
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20140045312 - CHENG; Kangguo ; et al.	2014-02-13
Semiconductor substrate with transistors having different threshold voltages Grant 8,642,415 - Adam , et al. February 4, 2	2014-02-04
Post-gate Isolation Area Formation For Fin Field Effect Transistor Device App 20140024198 - Haran; Balasubramanian S. ; et al.	2014-01-23
Dual-depth self-aligned isolation structure for a back gate electrode Grant 8,633,085 - Cheng , et al. January 21, 2	2014-01-21
Method For Fabricating Transistor With Recessed Channel And Raised Source/drain App 20140017859 - CHENG; Kangguo ; et al.	2014-01-16
Electrical isolation structures for ultra-thin semiconductor-on-insulator devices Grant 8,629,008 - Haran , et al. January 14, 2	2014-01-14
Method of improving replacement metal gate fill Grant 8,629,007 - Haran , et al. January 14, 2	2014-01-14
Bulk fin-field effect transistors with well defined isolation Grant 8,623,712 - Cheng , et al. January 7, 2	2014-01-07
Method for fabricating silicon-on-insulator transistor with self-aligned borderless source/drain contacts Grant 8,623,730 - Fan , et al. January 7, 2	2014-01-07
Undercut Insulating Regions For Silicon-on-insulator Device App 20140001555 - Cheng; Kangguo ; et al.	2014-01-02
Post-gate isolation area formation for fin field effect transistor device Grant 8,617,961 - Haran , et al. December 31, 2	2013-12-31
Shallow Trench Isolation Structures App 20130341754 - Doris; Bruce B. ; et al.	2013-12-26
Shallow Trench Isolation Structures App 20130344677 - Doris; Bruce B. ; et al.	2013-12-26
Low resistance source and drain extensions for ETSOI Grant 8,614,486 - Haran , et al. December 24, 2	2013-12-24
Bulk fin-field effect transistors with well defined isolation Grant 8,604,539 - Cheng , et al. December 10, 2	2013-12-10
Borderless Contacts For Metal Gates Through Selective Cap Deposition App 20130320411 - Fan; Su-Chen ; et al.	2013-12-05
Borderless Contacts For Metal Gates Through Selective Cap Deposition App 20130320414 - Fan; Su-Chen ; et al.	2013-12-05
Cut-very-last Dual-epi Flow App 20130319613 - Basker; Veeraraghavan S. ; et al.	2013-12-05
Semiconductor structure having NFET and PFET formed in SOI substrate with underlapped extensions Grant 8,598,663 - Cheng , et al. December 3, 2	2013-12-03
Cut-very-last dual-EPI flow Grant 8,592,290 - Basker , et al. November 26, 2	2013-11-26
FinFET diode with increased junction area Grant 8,592,263 - Standaert , et al. November 26, 2	2013-11-26
Mos Capacitors With A Finfet Process App 20130309832 - CHENG; KANGGUO ; et al.	2013-11-21
Mos Capacitors With A Finfet Process App 20130307043 - CHENG; KANGGUO ; et al.	2013-11-21
MOS capacitors with a finfet process Grant 8,581,320 - Cheng , et al. November 12, 2	2013-11-12
Semiconductor Substrate With Transistors Having Different Threshold Voltages App 20130295730 - Adam; Thomas N. ; et al.	2013-11-07
Semiconductor Substrate With Transistors Having Different Threshold Voltages App 20130292766 - Adam; Thomas N. ; et al.	2013-11-07
Finfet Diode With Increased Junction Area App 20130285208 - Standaert; Theodorus Eduardus ; et al.	2013-10-31
FinFET with improved gate planarity Grant 8,569,125 - Standaert , et al. October 29, 2	2013-10-29
Cut-very-last dual-epi flow Grant 8,569,152 - Basker , et al. October 29, 2	2013-10-29
Robust Isolation For Thin-box Etsoi Mosfets App 20130264641 - Cheng; Kangguo ; et al.	2013-10-10
Low series resistance transistor structure on silicon on insulator layer Grant 8,551,872 - Chen , et al. October 8, 2	2013-10-08
Structure and method to improve etsoi mosfets with back gate App 20130249002 - Cheng; Kangguo ; et al.	2013-09-26
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130210206 - CHENG; Kangguo ; et al.	2013-08-15
Dual Metal Fill And Dual Threshold Voltage For Replacement Gate Metal Devices App 20130200467 - Edge; Lisa F. ; et al.	2013-08-08
Semiconductor Devices Fabricated By Doped Material Layer As Dopant Source App 20130187129 - Cheng; Kangguo ; et al.	2013-07-25
Low resistance source and drain extensions for ETSOI Grant 8,486,778 - Haran , et al. July 16, 2	2013-07-16
Electrical Isolation Structures For Ultra-thin Semiconductor-on-insulator Devices App 20130175622 - Haran; Balasubramanian S. ; et al.	2013-07-11
Silicon-on-insulator Transistor With Self-aligned Borderless Source/drain Contacts App 20130175619 - FAN; Susan S. ; et al.	2013-07-11
Finfet Device App 20130175618 - Cheng; Kangguo ; et al.	2013-07-11
Method For Fabricating Transistor With Recessed Channel And Raised Source/drain App 20130178022 - CHENG; Kangguo ; et al.	2013-07-11
Low Series Resistance Transistor Structure On Silicon On Insulator Layer App 20130175625 - Cheng; Kangguo ; et al.	2013-07-11
Method For Fabricating Silicon-on-insulator Transistor With Self-aligned Borderless Source/drain Contacts App 20130178052 - FAN; Susan S. ; et al.	2013-07-11
Transistor With Recessed Channel And Raised Source/drain App 20130175579 - Cheng; Kangguo ; et al.	2013-07-11
Dual-depth Self-aligned Isolation Structure For A Back Gate Electrode App 20130143371 - Cheng; Kangguo ; et al.	2013-06-06
Local interconnect structure self-aligned to gate structure Grant 8,455,932 - Khakifirooz , et al. June 4, 2	2013-06-04
Finfet With Improved Gate Planarity App 20130134513 - Standaert; Theodorus Eduardus ; et al.	2013-05-30
Cmos Transistors Having Differentially Stressed Spacers App 20130134523 - ADAM; LAHIR S. ; et al.	2013-05-30
Borderless Contact For Ultra-thin Body Devices App 20130134517 - Fan; Su Chen ; et al.	2013-05-30
Method to form low series resistance transistor devices on silicon on insulator layer Grant 8,440,552 - Chen , et al. May 14, 2	2013-05-14
Semiconductor devices with raised extensions Grant 8,435,846 - Cheng , et al. May 7, 2	2013-05-07
Method and structure for low resistive source and drain regions in a replacement metal gate process flow Grant 8,432,002 - Haran , et al. April 30, 2	2013-04-30
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130102130 - CHENG; Kangguo ; et al.	2013-04-25
Bulk Fin-field Effect Transistors With Well Defined Isolation App 20130102119 - CHENG; Kangguo ; et al.	2013-04-25
Bulk fin-field effect transistors with well defined isolation Grant 8,420,459 - Cheng , et al. April 16, 2	2013-04-16
Semiconductor Devices With Raised Extensions App 20130082308 - Cheng; Kangguo ; et al.	2013-04-04
Semiconductor Devices With Raised Extensions App 20130082311 - Cheng; Kangguo ; et al.	2013-04-04
Dual-depth self-aligned isolation structure for a back gate electrode Grant 8,399,957 - Cheng , et al. March 19, 2	2013-03-19
Semiconductor devices fabricated by doped material layer as dopant source Grant 8,394,710 - Cheng , et al. March 12, 2	2013-03-12
Mosfet Including Asymmetric Source And Drain Regions App 20130049115 - CHENG; KANGGUO ; et al.	2013-02-28
Borderless contact for ultra-thin body devices Grant 8,383,490 - Fan , et al. February 26, 2	2013-02-26
Cut first methodology for double exposure double etch integration Grant 8,377,795 - Kanakasabapathy , et al. February 19, 2	2013-02-19
Fabrication of CMOS transistors having differentially stressed spacers Grant 8,372,705 - Adam , et al. February 12, 2	2013-02-12
Replacement Gate ETSOI with Sharp Junction App 20130032876 - CHENG; Kangguo ; et al.	2013-02-07
Replacement Gate Etsoi With Sharp Junction App 20130034938 - Cheng; Kangguo ; et al.	2013-02-07
Borderless Contact For Ultra-thin Body Devices App 20130026570 - Fan; Su Chen ; et al.	2013-01-31
Metal semiconductor alloy structure for low contact resistance Grant 8,358,012 - Haran , et al. January 22, 2	2013-01-22
Low Resistance Source And Drain Extensions For Etsoi App 20130015512 - Haran; Balasubramanian S. ; et al.	2013-01-17
Low Resistance Source And Drain Extensions For Etsoi App 20130015509 - Haran; Balasubramanian S. ; et al.	2013-01-17
Method Of Improving Replacement Metal Gate Fill App 20130017680 - Haran; Balasubramanian S. ; et al.	2013-01-17
Cmos With Dual Raised Source And Drain For Nmos And Pmos App 20130015525 - Cheng; Kangguo ; et al.	2013-01-17
Method and Structure for Low Resistive Source and Drain Regions in a Replacement Metal Gate Process Flow App 20130001706 - Haran; Balasubramanian S. ; et al.	2013-01-03
Metal Semiconductor Alloy Structure For Low Contact Resistance App 20120326241 - Haran; Balasubramanian S. ; et al.	2012-12-27
Semiconductor Structure Having Underlapped Devices App 20120292705 - Cheng; Kangguo ; et al.	2012-11-22
Method for integrating multiple threshold voltage devices for CMOS Grant 8,309,447 - Cheng , et al. November 13, 2	2012-11-13
Local Interconnect Structure Self-aligned To Gate Structure App 20120280290 - Khakifirooz; Ali ; et al.	2012-11-08
Dual-depth Self-aligned Isolation Structure For A Back Gate Electrode App 20120256260 - Cheng; Kangguo ; et al.	2012-10-11
Borderless contact for replacement gate employing selective deposition Grant 8,232,607 - Edge , et al. July 31, 2	2012-07-31
Method to improve wet etch budget in FEOL integration Grant 8,232,179 - Cummings , et al. July 31, 2	2012-07-31
Method And Structure For Shallow Trench Isolation To Mitigate Active Shorts App 20120187523 - Cummings; Jason E. ; et al.	2012-07-26
Fabrication Of Cmos Transistors Having Differentially Stressed Spacers App 20120187482 - Adam; Lahir S. ; et al.	2012-07-26
Method To Improve Wet Etch Budget In Feol Integration App 20120178236 - Cummings; Jason E. ; et al.	2012-07-12
Borderless Contact For Replacement Gate Employing Selective Deposition App 20120126295 - Edge; Lisa F. ; et al.	2012-05-24
Method For Integrating Multiple Threshold Voltage Devices For Cmos App 20120040522 - Cheng; Kangguo ; et al.	2012-02-16
Metal Semiconductor Alloy Structure For Low Contact Resistance App 20120032275 - Haran; Balasubramanian S. ; et al.	2012-02-09
Semiconductor Devices Fabricated By Doped Material Layer As Dopant Source App 20110309333 - Cheng; Kangguo ; et al.	2011-12-22
Method To Improve Wet Etch Budget In Feol Integration App 20110081765 - Cummings; Jason E. ; et al.	2011-04-07
Device With Stressed Channel App 20110031503 - Doris; Bruce B. ; et al.	2011-02-10
Cut First Methodology For Double Exposure Double Etch Integration App 20100203717 - Kanakasabapathy; Sivananda K. ; et al.	2010-08-12