| Patent | Date |
|---|
Phase Change Memory Cell Resistive Liner
App 20220310913 - Cheng; Kangguo ; et al. | 2022-09-29 |
Cross-bar fin formation
Grant 11,456,181 - Cheng , et al. September 27, 2 | 2022-09-27 |
DNA sequencing with stacked nanopores
Grant 11,453,911 - Bi , et al. September 27, 2 | 2022-09-27 |
Bulk nanosheet with dielectric isolation
Grant 11,456,354 - Cheng , et al. September 27, 2 | 2022-09-27 |
Vertical Phase Change Bridge Memory Cell
App 20220302377 - LI; JUNTAO ; et al. | 2022-09-22 |
Substrate Thinning For A Backside Power Distribution Network
App 20220301878 - Xie; Ruilong ; et al. | 2022-09-22 |
Fabrication of fin field effect transistors utilizing different fin channel materials while maintaining consistent fin widths
Grant 11,444,083 - Cheng , et al. September 13, 2 | 2022-09-13 |
Integrated Switch Using Stacked Phase Change Materials
App 20220285614 - LI; JUNTAO ; et al. | 2022-09-08 |
Techniques for forming replacement metal gate for VFET
Grant 11,437,489 - Xie , et al. September 6, 2 | 2022-09-06 |
VFET device with controllable top spacer
Grant 11,430,864 - Xu , et al. August 30, 2 | 2022-08-30 |
Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
Grant 11,430,879 - Cheng , et al. August 30, 2 | 2022-08-30 |
Nanosheet transistors with sharp junctions
Grant 11,430,651 - Cheng , et al. August 30, 2 | 2022-08-30 |
Vertical fin field effect transistor devices with self-aligned source and drain junctions
Grant 11,424,343 - Cheng , et al. August 23, 2 | 2022-08-23 |
Resistive Random-access Memory Cell And Manufacturing Method Thereof
App 20220254996 - Cheng; Kangguo ; et al. | 2022-08-11 |
Replacement Gate Cross-couple For Static Random-access Memory Scaling
App 20220246739 - Xie; Ruilong ; et al. | 2022-08-04 |
Inductor with ferromagnetic cores
Grant 11,398,347 - Cheng , et al. July 26, 2 | 2022-07-26 |
Variable Sheet Forkfet Device
App 20220231020 - Frougier; Julien ; et al. | 2022-07-21 |
Two-dimensional Vertical Fins
App 20220223477 - Cheng; Kangguo | 2022-07-14 |
Phase change memory cell with second conductive layer
Grant 11,380,842 - Li , et al. July 5, 2 | 2022-07-05 |
Selective removal of semiconductor fins
Grant 11,380,589 - Basker , et al. July 5, 2 | 2022-07-05 |
Vertical fin field effect transistor devices with self-aligned source and drain junctions
Grant 11,380,778 - Cheng , et al. July 5, 2 | 2022-07-05 |
Nanofluid sensor with real-time spatial sensing
Grant 11,378,545 - Cheng , et al. July 5, 2 | 2022-07-05 |
Nanosheet Transistors With Wrap Around Contact
App 20220208981 - Frougier; Julien ; et al. | 2022-06-30 |
Transistor having confined source/drain regions with wrap-around source/drain contacts
Grant 11,362,194 - Reznicek , et al. June 14, 2 | 2022-06-14 |
Co-integration of non-volatile memory on gate-all-around field effect transistor
Grant 11,362,093 - Bi , et al. June 14, 2 | 2022-06-14 |
Inverse T-shaped contact structures having air gap spacers
Grant 11,362,193 - Cheng , et al. June 14, 2 | 2022-06-14 |
Piezoelectric vacuum transistor
Grant 11,361,928 - Cao , et al. June 14, 2 | 2022-06-14 |
Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension regions
Grant 11,355,649 - Lee , et al. June 7, 2 | 2022-06-07 |
Vertical field effect transistors with self aligned contacts
Grant 11,355,644 - Song , et al. June 7, 2 | 2022-06-07 |
Strained and unstrained semiconductor device features formed on the same substrate
Grant 11,355,588 - Cheng , et al. June 7, 2 | 2022-06-07 |
Bottom Source/drain For Fin Field Effect Transistors
App 20220173240 - Wu; Heng ; et al. | 2022-06-02 |
Replacement gate cross-couple for static random-access memory scaling
Grant 11,349,001 - Xie , et al. May 31, 2 | 2022-05-31 |
Hybrid Non-volatile Memory Cell
App 20220165944 - Cheng; Kangguo ; et al. | 2022-05-26 |
Homogeneous densification of fill layers for controlled reveal of vertical fins
Grant 11,342,230 - Cheng , et al. May 24, 2 | 2022-05-24 |
Hybrid-channel Nano-sheet Fets
App 20220157666 - Bi; Zhenxing ; et al. | 2022-05-19 |
Transistor Having Wrap-around Source/drain Contacts And Under-contact Spacers
App 20220157985 - Song; Yi ; et al. | 2022-05-19 |
Fin Stack Including Tensile-strained And Compressively Strained Fin Portions
App 20220157816 - Cheng; Kangguo ; et al. | 2022-05-19 |
Trench contact resistance reduction
Grant 11,335,773 - Bi , et al. May 17, 2 | 2022-05-17 |
Nanosheet transistors with thin inner spacers and tight pitch gate
Grant 11,329,143 - Cheng , et al. May 10, 2 | 2022-05-10 |
Embedded chip identification formed by directed self-assembly
Grant 11,329,001 - Cheng , et al. May 10, 2 | 2022-05-10 |
Self-aligned top via scheme
Grant 11,322,402 - Xie , et al. May 3, 2 | 2022-05-03 |
Contact source/drain resistance
Grant 11,322,588 - Lie , et al. May 3, 2 | 2022-05-03 |
Memory Device Having A Ring Heater
App 20220131073 - Cheng; Kangguo | 2022-04-28 |
Mtj-based Analog Memory Device
App 20220130441 - Houssameddine; Dimitri ; et al. | 2022-04-28 |
Back end of line structures with metal lines with alternating patterning and metallization schemes
Grant 11,315,799 - Xie , et al. April 26, 2 | 2022-04-26 |
Two-dimensional vertical fins
Grant 11,315,836 - Cheng April 26, 2 | 2022-04-26 |
Silicon germanium FinFET with low gate induced drain leakage current
Grant 11,316,015 - Mochizuki , et al. April 26, 2 | 2022-04-26 |
Contact over active gate employing a stacked spacer
Grant 11,309,397 - Cheng April 19, 2 | 2022-04-19 |
Method and structure for forming a vertical field-effect transistor
Grant 11,302,799 - Xu , et al. April 12, 2 | 2022-04-12 |
Forming a backside ground or power plane in a stacked vertical transport field effect transistor
Grant 11,295,985 - Zhang , et al. April 5, 2 | 2022-04-05 |
Transistor having wrap-around source/drain contacts and under-contact spacers
Grant 11,296,226 - Song , et al. April 5, 2 | 2022-04-05 |
Enhanced bottom dielectric isolation in gate-all-around devices
Grant 11,282,961 - Frougier , et al. March 22, 2 | 2022-03-22 |
Stacked gate structures
Grant 11,282,838 - Zhang , et al. March 22, 2 | 2022-03-22 |
Bottom source/drain for fin field effect transistors
Grant 11,276,781 - Wu , et al. March 15, 2 | 2022-03-15 |
Hybrid-channel nano-sheet FETS
Grant 11,276,612 - Bi , et al. March 15, 2 | 2022-03-15 |
Metallization layer formation process
Grant 11,270,935 - Cheng , et al. March 8, 2 | 2022-03-08 |
Failure prevention of chip power network
Grant 11,270,768 - Xu , et al. March 8, 2 | 2022-03-08 |
Forming A Sacrificial Liner For Dual Channel Devices
App 20220069118 - Bu; Huiming ; et al. | 2022-03-03 |
Tiered-Profile Contact for Semiconductor
App 20220068713 - Choi; Kisik ; et al. | 2022-03-03 |
Self-aligned source and drain contacts
Grant 11,264,481 - Park , et al. March 1, 2 | 2022-03-01 |
Fin field-effect transistors with enhanced strain and reduced parasitic capacitance
Grant 11,257,934 - Cheng , et al. February 22, 2 | 2022-02-22 |
Field Effect Transistor Devices With Self-aligned Source/drain Contacts And Gate Contacts Positioned Over Active Transistors
App 20220051942 - Cheng; Kangguo ; et al. | 2022-02-17 |
Strained nanowire transistor with embedded epi
Grant 11,251,280 - Wu , et al. February 15, 2 | 2022-02-15 |
Vertical transistors with multiple gate lengths
Grant 11,251,267 - Bi , et al. February 15, 2 | 2022-02-15 |
Nanosheet transistor with asymmetric gate stack
Grant 11,251,288 - Xie , et al. February 15, 2 | 2022-02-15 |
Nanosheet Transistor With Asymmetric Gate Stack
App 20220045193 - Xie; Ruilong ; et al. | 2022-02-10 |
Vertical Stacked Nanosheet Cmos Transistors With Different Work Function Metals
App 20220044973 - CHENG; Kangguo ; et al. | 2022-02-10 |
Uniform Interfacial Layer On Vertical Fin Sidewalls Of Vertical Transport Field-effect Transistors
App 20220045196 - Mochizuki; Shogo ; et al. | 2022-02-10 |
Fabrication of logic devices and power devices on the same substrate
Grant 11,244,869 - Li , et al. February 8, 2 | 2022-02-08 |
Reducing parasitic capacitance within semiconductor devices
Grant 11,244,864 - Xie , et al. February 8, 2 | 2022-02-08 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20220037194 - Li; Juntao ; et al. | 2022-02-03 |
Scalable Device for FINFET Technology
App 20220037212 - Xie; Ruilong ; et al. | 2022-02-03 |
Vertical transistors having improved control of top source or drain junctions
Grant 11,239,342 - Cheng , et al. February 1, 2 | 2022-02-01 |
Method of forming an interconnect structure with enhanced corner connection
Grant 11,239,165 - Xie , et al. February 1, 2 | 2022-02-01 |
Memory device having a ring heater
Grant 11,239,418 - Cheng February 1, 2 | 2022-02-01 |
Nanosheet Transistor With Self-aligned Dielectric Pillar
App 20220028729 - Xie; Ruilong ; et al. | 2022-01-27 |
Resistive memory cell having a single fin
Grant 11,233,091 - Cheng January 25, 2 | 2022-01-25 |
Uniform interfacial layer on vertical fin sidewalls of vertical transport field-effect transistors
Grant 11,227,937 - Mochizuki , et al. January 18, 2 | 2022-01-18 |
Stacked Gate Structures
App 20220013521 - Zhang; Chen ; et al. | 2022-01-13 |
Augmented Semiconductor Lasers With Spontaneous Emissions Blockage
App 20220013986 - FROUGIER; Julien ; et al. | 2022-01-13 |
Cross-bar Fin Formation
App 20220013366 - Cheng; Kangguo ; et al. | 2022-01-13 |
Determining device operability via metal-induced layer exchange
Grant 11,221,359 - Kong , et al. January 11, 2 | 2022-01-11 |
Self-limiting Liners For Increasing Contact Trench Volume In N-type And P-type Transistors
App 20220005735 - Cheng; Kangguo ; et al. | 2022-01-06 |
Self-Aligned Source and Drain Contacts
App 20220005934 - Park; Chanro ; et al. | 2022-01-06 |
Vertical field-effect transistor with T-shaped gate
Grant 11,217,680 - Song , et al. January 4, 2 | 2022-01-04 |
Vertical Field Effect Transistor Including Integrated Antifuse
App 20210408016 - CHENG; Kangguo ; et al. | 2021-12-30 |
Transistor Having Stacked Source/drain Regions With Formation Assistance Regions And Multi-region Wrap-around Source/drain Contacts
App 20210408233 - Xie; Ruilong ; et al. | 2021-12-30 |
Using selectively formed cap layers to form self-aligned contacts to source/drain regions
Grant 11,211,462 - Park , et al. December 28, 2 | 2021-12-28 |
Transistor having stacked source/drain regions with formation assistance regions and multi-region wrap-around source/drain contacts
Grant 11,211,452 - Xie , et al. December 28, 2 | 2021-12-28 |
Via formation with robust hardmask removal
Grant 11,211,291 - Xie , et al. December 28, 2 | 2021-12-28 |
Forming Nanosheet Transistor Using Sacrificial Spacer And Inner Spacers
App 20210399114 - Cheng; Kangguo ; et al. | 2021-12-23 |
Self-aligned top via structure
Grant 11,205,592 - Xie , et al. December 21, 2 | 2021-12-21 |
Self-aligned contacts for MOL
Grant 11,205,590 - Fan , et al. December 21, 2 | 2021-12-21 |
Nanopore Structures
App 20210391223 - Cheng; Kangguo | 2021-12-16 |
Silicon germanium alloy fins with reduced defects
Grant 11,201,231 - Cheng , et al. December 14, 2 | 2021-12-14 |
Robust low-k bottom spacer for VFET
Grant 11,201,089 - Niimi , et al. December 14, 2 | 2021-12-14 |
Transistor Device Having A Comb-shaped Channel Region To Increase The Effective Gate Width
App 20210384320 - Cheng; Kangguo | 2021-12-09 |
Tiered-profile contact for semiconductor
Grant 11,195,753 - Choi , et al. December 7, 2 | 2021-12-07 |
On-chipset certification to prevent spy chip
Grant 11,196,575 - Cheng December 7, 2 | 2021-12-07 |
Inner spacer for nanosheet transistors
Grant 11,195,912 - Cheng , et al. December 7, 2 | 2021-12-07 |
Forming single and double diffusion breaks for fin field-effect transistor structures
Grant 11,195,745 - Li , et al. December 7, 2 | 2021-12-07 |
Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors
Grant 11,195,755 - Cheng , et al. December 7, 2 | 2021-12-07 |
Nanosheet transistor with self-aligned dielectric pillar
Grant 11,195,746 - Xie , et al. December 7, 2 | 2021-12-07 |
3D ReRAM formed by metal-assisted chemical etching with replacement wordline and wordline separation
Grant 11,196,001 - Miao , et al. December 7, 2 | 2021-12-07 |
Transistor with reduced gate resistance and improved process margin of forming self-aligned contact
Grant 11,195,754 - Cheng , et al. December 7, 2 | 2021-12-07 |
Vertical Transistor With Self-aligned Gate
App 20210376140 - Li; Juntao ; et al. | 2021-12-02 |
Transistor having reduced contact resistance
Grant 11,189,693 - Basker , et al. November 30, 2 | 2021-11-30 |
Forming a sacrificial liner for dual channel devices
Grant 11,189,729 - Bu , et al. November 30, 2 | 2021-11-30 |
Nanosheet transistor having wrap-around bottom isolation
Grant 11,189,713 - Xie , et al. November 30, 2 | 2021-11-30 |
Method of forming a top epitaxy source/drain structure for a vertical transistor
Grant 11,189,724 - Kong , et al. November 30, 2 | 2021-11-30 |
Formation of air gap spacers for reducing parasitic capacitance
Grant 11,183,577 - Cheng , et al. November 23, 2 | 2021-11-23 |
Techniques for forming RRAM cells
Grant 11,183,636 - Cheng , et al. November 23, 2 | 2021-11-23 |
Nanosheet transistor with inner spacers
Grant 11,183,561 - Cheng , et al. November 23, 2 | 2021-11-23 |
Self-limiting liners for increasing contact trench volume in n-type and p-type transistors
Grant 11,183,430 - Cheng , et al. November 23, 2 | 2021-11-23 |
Vertical field effect transistor having improved uniformity
Grant 11,183,581 - Cheng , et al. November 23, 2 | 2021-11-23 |
Contact over active gate employing a stacked spacer
Grant 11,183,578 - Cheng November 23, 2 | 2021-11-23 |
Nanosheet Transistor With Asymmetric Gate Stack
App 20210359103 - Xie; Ruilong ; et al. | 2021-11-18 |
Augmented semiconductor lasers with spontaneous emissions blockage
Grant 11,177,632 - Frougier , et al. November 16, 2 | 2021-11-16 |
Stacked vertical field effect transistor with self-aligned junctions
Grant 11,177,369 - Yu , et al. November 16, 2 | 2021-11-16 |
Conductive contacts in semiconductor on insulator substrate
Grant 11,177,285 - Cheng , et al. November 16, 2 | 2021-11-16 |
Scalable device for FINFET technology
Grant 11,177,181 - Xie , et al. November 16, 2 | 2021-11-16 |
Planarization Controllability For Interconnect Structures
App 20210351064 - Xie; Ruilong ; et al. | 2021-11-11 |
Via Interconnects For A Magnetoresistive Random-access Memory Device
App 20210351340 - Frougier; Julien ; et al. | 2021-11-11 |
Vertical Tunneling Field Effect Transistor With Dual Liner Bottom Spacer
App 20210351082 - Miller; Eric ; et al. | 2021-11-11 |
High thermal budget compatible punch through stop integration using doped glass
Grant 11,171,204 - Cheng , et al. November 9, 2 | 2021-11-09 |
Planarization controllability for interconnect structures
Grant 11,171,044 - Xie , et al. November 9, 2 | 2021-11-09 |
Structure And Method To Fabricate Resistive Memory With Vertical Pre-determined Filament
App 20210343938 - PARK; Chanro ; et al. | 2021-11-04 |
VFET devices with ILD protection
Grant 11,164,959 - Bi , et al. November 2, 2 | 2021-11-02 |
Stacked vertical transport field effect transistor contact formation
Grant 11,164,799 - Wu , et al. November 2, 2 | 2021-11-02 |
Method of forming III-V on insulator structure on semiconductor substrate
Grant 11,164,940 - Cheng , et al. November 2, 2 | 2021-11-02 |
Self-sterilizing sensor
Grant 11,154,628 - Cheng , et al. October 26, 2 | 2021-10-26 |
Formation of inner spacer on nanosheet MOSFET
Grant 11,158,730 - Bi , et al. October 26, 2 | 2021-10-26 |
Vertical stacked nanosheet CMOS transistors with different work function metals
Grant 11,158,544 - Cheng , et al. October 26, 2 | 2021-10-26 |
Bottom Source/drain For Fin Field Effect Transistors
App 20210328051 - Wu; Heng ; et al. | 2021-10-21 |
Reducing Parasitic Capacitance Within Semiconductor Devices
App 20210327762 - Xie; Ruilong ; et al. | 2021-10-21 |
Buried local interconnect
Grant 11,152,307 - Cheng , et al. October 19, 2 | 2021-10-19 |
Vertical tunneling field effect transistor with dual liner bottom spacer
Grant 11,152,266 - Miller , et al. October 19, 2 | 2021-10-19 |
Nanosheet SRAM by SIT process
Grant 11,152,377 - Cheng October 19, 2 | 2021-10-19 |
Transistor device with ultra low-k self aligned contact cap and ultra low-k spacer
Grant 11,152,213 - Cheng October 19, 2 | 2021-10-19 |
High thermal budget compatible punch through stop integration using doped glass
Grant 11,152,460 - Cheng , et al. October 19, 2 | 2021-10-19 |
Semiconductor device with reduced contact resistance
Grant 11,152,252 - Cheng , et al. October 19, 2 | 2021-10-19 |
Vertical transistors with buried metal silicide bottom contact
Grant 11,152,478 - Cheng , et al. October 19, 2 | 2021-10-19 |
Sublithography Gate Cut Physical Unclonable Function
App 20210320190 - Cheng; Kangguo ; et al. | 2021-10-14 |
Work Function Metal Patterning For Nanosheet Cfets
App 20210320035 - Xie; Ruilong ; et al. | 2021-10-14 |
Physical Unclonable Function
App 20210320070 - Cheng; Kangguo ; et al. | 2021-10-14 |
FinFET devices
Grant 11,145,551 - Basker , et al. October 12, 2 | 2021-10-12 |
Forming a fin cut in a hardmask
Grant 11,145,508 - Bi , et al. October 12, 2 | 2021-10-12 |
Transistor device having a comb-shaped channel region to increase the effective gate width
Grant 11,145,743 - Cheng October 12, 2 | 2021-10-12 |
Fully-depleted CMOS transistors with u-shaped channel
Grant 11,145,758 - Cheng , et al. October 12, 2 | 2021-10-12 |
Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages
Grant 11,145,677 - Cheng , et al. October 12, 2 | 2021-10-12 |
Interconnects With Tight Pitch And Reduced Resistance
App 20210313224 - Cheng; Kangguo | 2021-10-07 |
Via Formation With Robust Hardmask Removal
App 20210313229 - Xie; Ruilong ; et al. | 2021-10-07 |
Vertical transistor with self-aligned gate
Grant 11,139,399 - Li , et al. October 5, 2 | 2021-10-05 |
Vertical field effect transistor including integrated antifuse
Grant 11,139,307 - Cheng , et al. October 5, 2 | 2021-10-05 |
Via-to-metal tip connections in multi-layer chips
Grant 11,139,242 - Xie , et al. October 5, 2 | 2021-10-05 |
Enhanced Bottom Dielectric Isolation In Gate-all-around Devices
App 20210305420 - FROUGIER; Julien ; et al. | 2021-09-30 |
Isolation Structure For Stacked Vertical Transistors
App 20210305364 - Li; Juntao ; et al. | 2021-09-30 |
Nanosheet Channel-to-source And Drain Isolation
App 20210305405 - Bergendahl; Marc A. ; et al. | 2021-09-30 |
Uniform work function metal recess for vertical transistor complementary metal oxide semiconductor technology
Grant 11,133,308 - Xie , et al. September 28, 2 | 2021-09-28 |
Ion-sensitive field-effect transistor with sawtooth well to enhance sensitivity
Grant 11,131,647 - Park , et al. September 28, 2 | 2021-09-28 |
Vertical Transport Field-effect Transistor Including Replacement Gate
App 20210296494 - Xie; Ruilong ; et al. | 2021-09-23 |
Middle-of-line contacts with varying contact area providing reduced contact resistance
Grant 11,127,825 - Park , et al. September 21, 2 | 2021-09-21 |
Interconnect Structure With Enhanced Corner Connection
App 20210287988 - Xie; Ruilong ; et al. | 2021-09-16 |
Augmented Semiconductor Lasers With Spontaneous Emissions Blockage
App 20210288468 - FROUGIER; Julien ; et al. | 2021-09-16 |
Source And Drain Epitaxy And Isolation For Gate Structures
App 20210288184 - Cheng; Kangguo ; et al. | 2021-09-16 |
Stacked nanosheets with self-aligned inner spacers and metallic source/drain
Grant 11,121,232 - Lee , et al. September 14, 2 | 2021-09-14 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 11,121,032 - Basker , et al. September 14, 2 | 2021-09-14 |
Tunable forming voltage for RRAM device
Grant 11,121,318 - Kong , et al. September 14, 2 | 2021-09-14 |
Vertically stacked nanosheet CMOS transistor
Grant 11,121,044 - Cheng , et al. September 14, 2 | 2021-09-14 |
Forming nanosheet transistor using sacrificial spacer and inner spacers
Grant 11,121,233 - Cheng , et al. September 14, 2 | 2021-09-14 |
Lateral semiconductor nanotube with hexagonal shape
Grant 11,120,991 - Li , et al. September 14, 2 | 2021-09-14 |
iFinFET
Grant 11,121,215 - Li , et al. September 14, 2 | 2021-09-14 |
Reducing Gate Resistance In Stacked Vertical Transport Field Effect Transistors
App 20210280578 - WU; Heng ; et al. | 2021-09-09 |
Failure Prevention Of Chip Power Network
App 20210280514 - Xu; Zheng ; et al. | 2021-09-09 |
Nanosheet Transistor
App 20210280688 - Cheng; Kangguo ; et al. | 2021-09-09 |
Two-dimensional Vertical Fins
App 20210280470 - Cheng; Kangguo | 2021-09-09 |
Using Selectively Formed Cap Layers To Form Self-aligned Contacts To Source/drain Regions
App 20210280690 - Park; Chanro ; et al. | 2021-09-09 |
Fabrication Of A Vertical Fin Field Effect Transistor With Reduced Dimensional Variations
App 20210272854 - Cheng; Kangguo | 2021-09-02 |
Self-aligned repaired top via
Grant 11,107,731 - Xie , et al. August 31, 2 | 2021-08-31 |
Vertical field effect transistors with self aligned source/drain junctions
Grant 11,107,905 - Miao , et al. August 31, 2 | 2021-08-31 |
Nanopore and DNA sensor employing nanopore
Grant 11,105,770 - Cheng August 31, 2 | 2021-08-31 |
Interconnects with tight pitch and reduced resistance
Grant 11,107,728 - Cheng August 31, 2 | 2021-08-31 |
Integration of split gate metal-oxide-nitride-oxide-semiconductor memory with vertical FET
Grant 11,107,827 - Xie , et al. August 31, 2 | 2021-08-31 |
Confining Filament At Pillar Center For Memory Devices
App 20210265566 - Kong; Dexin ; et al. | 2021-08-26 |
RRAM cells in crossbar array architecture
Grant 11,101,323 - Kong , et al. August 24, 2 | 2021-08-24 |
Buried power rail for transistor devices
Grant 11,101,217 - Xie , et al. August 24, 2 | 2021-08-24 |
Nanosheet transistors with different gate dielectrics and workfunction metals
Grant 11,101,182 - Cheng , et al. August 24, 2 | 2021-08-24 |
Junction formation in thick-oxide and thin-oxide vertical FETs on the same chip
Grant 11,101,181 - Miao , et al. August 24, 2 | 2021-08-24 |
RRAM cells in crossbar array architecture
Grant 11,101,322 - Kong , et al. August 24, 2 | 2021-08-24 |
Gain Cell Memory Based Physically Unclonable Function
App 20210258173 - Cheng; Kangguo | 2021-08-19 |
Stress induction in 3D device channel using elastic relaxation of high stress material
Grant 11,094,823 - Cheng , et al. August 17, 2 | 2021-08-17 |
Vertical FET with symmetric junctions
Grant 11,094,798 - Yu , et al. August 17, 2 | 2021-08-17 |
Gate-all-around field effect transistor having stacked U shaped channels configured to improve the effective width of the transistor
Grant 11,094,784 - Cheng , et al. August 17, 2 | 2021-08-17 |
Forming a sacrificial liner for dual channel devices
Grant 11,094,824 - Bu , et al. August 17, 2 | 2021-08-17 |
Staircase surface-enhanced raman scattering substrate
Grant 11,092,551 - Cheng , et al. August 17, 2 | 2021-08-17 |
Structure and method to fabricate resistive memory with vertical pre-determined filament
Grant 11,094,883 - Park , et al. August 17, 2 | 2021-08-17 |
Nanosheet structures having vertically oriented and horizontally stacked nanosheets
Grant 11,094,781 - Xie , et al. August 17, 2 | 2021-08-17 |
Germanium-based Laser Diode
App 20210249845 - Liu; Zuoguang ; et al. | 2021-08-12 |
Stacked Nanosheet Complementary Metal Oxide Semiconductor Field Effect Transistor Devices
App 20210249412 - Bi; Zhenxing ; et al. | 2021-08-12 |
Iii-v Fins By Aspect Ratio Trapping And Self-aligned Etch To Remove Rough Epitaxy Surface
App 20210249410 - Cheng; Kangguo ; et al. | 2021-08-12 |
On-chip integrated temperature protection device based on gel electrolyte
Grant 11,088,260 - Cao , et al. August 10, 2 | 2021-08-10 |
Double replacement metal line patterning
Grant 11,087,993 - Xie , et al. August 10, 2 | 2021-08-10 |
Channel strain formation in vertical transport FETS with dummy stressor materials
Grant 11,088,279 - Lee , et al. August 10, 2 | 2021-08-10 |
Wimpy device by selective laser annealing
Grant 11,088,026 - Cheng , et al. August 10, 2 | 2021-08-10 |
Method of fabrication of a semiconductor device including one or more nanostructures
Grant 11,088,247 - Reboh , et al. August 10, 2 | 2021-08-10 |
On-chip security key with phase change memory
Grant 11,081,172 - Cheng , et al. August 3, 2 | 2021-08-03 |
Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
Grant 11,081,400 - Cheng , et al. August 3, 2 | 2021-08-03 |
Magnetic random access memory bottom electrode self-aligned to underlying interconnect structures
Grant 11,081,640 - Cheng August 3, 2 | 2021-08-03 |
Fabrication of vertical fin field effect transistors having top air spacers and a self aligned top junction
Grant 11,081,482 - Cheng , et al. August 3, 2 | 2021-08-03 |
Isolation structure for stacked vertical transistors
Grant 11,081,546 - Li , et al. August 3, 2 | 2021-08-03 |
Tunable Forming Voltage for RRAM Device
App 20210234094 - Kong; Dexin ; et al. | 2021-07-29 |
Self-aligned gate and junction for VTFET
Grant 11,075,280 - Liu , et al. July 27, 2 | 2021-07-27 |
Integrated device with vertical field-effect transistors and hybrid channels
Grant 11,075,200 - Bi , et al. July 27, 2 | 2021-07-27 |
Transistor gate having tapered segments positioned above the fin channel
Grant 11,075,299 - Miller , et al. July 27, 2 | 2021-07-27 |
Nanosheet Transistor Having Wrap-around Bottom Isolation
App 20210226034 - Xie; Ruilong ; et al. | 2021-07-22 |
Self-aligned Top Via Structure
App 20210225705 - Xie; Ruilong ; et al. | 2021-07-22 |
Transistor Having Confined Source/drain Regions With Wrap-around Source/drain Contacts
App 20210226032 - Reznicek; Alexander ; et al. | 2021-07-22 |
Single electron transistor with gap tunnel barriers
Grant 11,069,800 - Cheng , et al. July 20, 2 | 2021-07-20 |
Nanosheet transistors with different gate dielectrics and workfunction metals
Grant 11,069,577 - Cheng , et al. July 20, 2 | 2021-07-20 |
FinFET-based integrated circuits with reduced parasitic capacitance
Grant 11,069,680 - Xie , et al. July 20, 2 | 2021-07-20 |
Semiconductor device comprising metal-insulator-metal (MIM) capacitor
Grant 11,069,677 - Park , et al. July 20, 2 | 2021-07-20 |
Reducing gate resistance in stacked vertical transport field effect transistors
Grant 11,069,679 - Wu , et al. July 20, 2 | 2021-07-20 |
Substrate Isolated Vtfet Devices
App 20210217669 - Miller; Eric ; et al. | 2021-07-15 |
Nanosheet Transistor With Self-aligned Dielectric Pillar
App 20210217654 - Xie; Ruilong ; et al. | 2021-07-15 |
Controlled Bottom Junctions
App 20210217896 - Anderson; Brent ; et al. | 2021-07-15 |
Scalable Device for FINFET Technology
App 20210217667 - Xie; Ruilong ; et al. | 2021-07-15 |
Flipped vertical field-effect-transistor
Grant 11,062,965 - Cheng , et al. July 13, 2 | 2021-07-13 |
Self-limiting fin spike removal
Grant 11,063,129 - Cheng , et al. July 13, 2 | 2021-07-13 |
Dielectric isolation for nanosheet devices
Grant 11,062,937 - Cheng , et al. July 13, 2 | 2021-07-13 |
Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
Grant 11,062,960 - Wu , et al. July 13, 2 | 2021-07-13 |
Forming bottom source and drain extension on vertical transport FET (VTFET)
Grant 11,063,147 - Mochizuki , et al. July 13, 2 | 2021-07-13 |
Inner spacer and junction formation for integrating extended-gate and standard-gate nanosheet transistors
Grant 11,062,959 - Cheng , et al. July 13, 2 | 2021-07-13 |
Nanosheet Transistor With Inner Spacers
App 20210210598 - Cheng; Kangguo ; et al. | 2021-07-08 |
Memory Device Having A Ring Heater
App 20210210682 - Cheng; Kangguo | 2021-07-08 |
Self-aligned gate contact integration with metal resistor
Grant 11,056,537 - Miao , et al. July 6, 2 | 2021-07-06 |
Source and drain EPI protective spacer during single diffusion break formation
Grant 11,056,399 - Yao , et al. July 6, 2 | 2021-07-06 |
Nanosheet transistor with dual inner airgap spacers
Grant 11,056,570 - Xie , et al. July 6, 2 | 2021-07-06 |
Non-planar field effect transistor devices with low-resistance metallic gate structures
Grant 11,049,935 - Cheng , et al. June 29, 2 | 2021-06-29 |
Nanosheet transistor
Grant 11,049,953 - Cheng , et al. June 29, 2 | 2021-06-29 |
Method and structure for forming silicon germanium finFET
Grant 11,049,940 - Xu , et al. June 29, 2 | 2021-06-29 |
Interleaved structure for molecular manipulation
Grant 11,049,727 - Clevenger , et al. June 29, 2 | 2021-06-29 |
Stacked nanosheet complementary metal oxide semiconductor field effect transistor devices
Grant 11,043,493 - Bi , et al. June 22, 2 | 2021-06-22 |
Integration of air spacer with self-aligned contact in transistor
Grant 11,043,411 - Park , et al. June 22, 2 | 2021-06-22 |
Confining filament at pillar center for memory devices
Grant 11,043,634 - Kong , et al. June 22, 2 | 2021-06-22 |
User access verification
Grant 11,044,606 - Cheng , et al. June 22, 2 | 2021-06-22 |
Fabrication of vertical fin transistor with multiple threshold voltages
Grant 11,043,587 - Balakrishnan , et al. June 22, 2 | 2021-06-22 |
Nanosheet channel-to-source and drain isolation
Grant 11,043,581 - Bergendahl , et al. June 22, 2 | 2021-06-22 |
Semiconductor fins with dielectric isolation at fin bottom
Grant 11,043,429 - Xu , et al. June 22, 2 | 2021-06-22 |
Electrical fuse and/or resistor structures
Grant 11,043,451 - Basker , et al. June 22, 2 | 2021-06-22 |
Minimizing Shorting Between Finfet Epitaxial Regions
App 20210183856 - Cheng; Kangguo ; et al. | 2021-06-17 |
Strained Nanowire Transistor With Embedded Epi
App 20210184002 - Wu; Heng ; et al. | 2021-06-17 |
Manufacturing method for inductor with ferromagnetic cores
Grant 11,037,725 - Cheng , et al. June 15, 2 | 2021-06-15 |
Fin field effect transistor devices with robust gate isolation
Grant 11,038,040 - Cheng June 15, 2 | 2021-06-15 |
Non-planar field effect transistor devices with low-resistance metallic gate structures
Grant 11,038,015 - Cheng , et al. June 15, 2 | 2021-06-15 |
Phase change memory cell with a metal layer
Grant 11,038,106 - Radens , et al. June 15, 2 | 2021-06-15 |
3D Nanochannel Interleaved Devices
App 20210170399 - Clevenger; Lawrence A. ; et al. | 2021-06-10 |
Gate cap last for self-aligned contact
Grant 11,031,295 - Park , et al. June 8, 2 | 2021-06-08 |
Transistor with airgap spacer
Grant 11,031,485 - Cheng , et al. June 8, 2 | 2021-06-08 |
III-V fins by aspect ratio trapping and self-aligned etch to remove rough epitaxy surface
Grant 11,031,393 - Cheng , et al. June 8, 2 | 2021-06-08 |
Multiple gate length vertical field-effect-transistors
Grant 11,031,297 - Balakrishnan , et al. June 8, 2 | 2021-06-08 |
Self-aligned cut process for self-aligned via process window
Grant 11,024,539 - Xie , et al. June 1, 2 | 2021-06-01 |
On-chip hardware random number generator
Grant 11,023,209 - Cheng June 1, 2 | 2021-06-01 |
Nanosheet FET bottom isolation
Grant 11,024,711 - Bao , et al. June 1, 2 | 2021-06-01 |
Non-self aligned contact semiconductor devices
Grant 11,024,720 - Xie , et al. June 1, 2 | 2021-06-01 |
Fin field effect transistor including a single diffusion break with a multi-layer dummy gate
Grant 11,024,739 - Cheng June 1, 2 | 2021-06-01 |
Method and structure for forming vertical transistors with shared gates and separate gates
Grant 11,024,547 - Bi , et al. June 1, 2 | 2021-06-01 |
3D ReRAM FORMED BY METAL-ASSISTED CHEMICAL ETCHING WITH REPLACEMENT WORDLINE AND WORDLINE SEPARATION
App 20210159409 - Miao; Xin ; et al. | 2021-05-27 |
Phase Change Memory Cell With A Metal Layer
App 20210159405 - Radens; Carl ; et al. | 2021-05-27 |
Fabrication of vertical fin transistor with multiple threshold voltages
Grant 11,018,254 - Balakrishnan , et al. May 25, 2 | 2021-05-25 |
Vertical field effect transistor with reduced parasitic capacitance
Grant 11,018,240 - Cheng , et al. May 25, 2 | 2021-05-25 |
Method and structure for forming bulk FinFET with uniform channel height
Grant 11,017,999 - Cheng , et al. May 25, 2 | 2021-05-25 |
Resistive Random-access Memory
App 20210151670 - Cheng; Kangguo ; et al. | 2021-05-20 |
Nanosheet Transistors With Strained Channel Regions
App 20210151601 - Miao; Xin ; et al. | 2021-05-20 |
Nanosheet Transistor Having Abrupt Junctions Between The Channel Nanosheets And The Source/drain Extension Regions
App 20210151608 - Lee; Choonghyun ; et al. | 2021-05-20 |
Fully Depleted Soi Transistor With A Buried Ferroelectric Layer In Back-gate
App 20210151577 - Cheng; Kangguo ; et al. | 2021-05-20 |
Nanosheet Devices With Improved Electrostatic Integrity
App 20210151565 - Xie; Ruilong ; et al. | 2021-05-20 |
Back End Of Line Structures With Metal Lines With Alternating Patterning And Metallization Schemes
App 20210151327 - Xie; Ruilong ; et al. | 2021-05-20 |
Nanosheet Transistor Bottom Isolation
App 20210151558 - Bi; Zhenxing ; et al. | 2021-05-20 |
Semiconductor Device With Improved Contact Resistance And Via Connectivity
App 20210151323 - Park; Chanro ; et al. | 2021-05-20 |
Semiconductor wafer having integrated circuits with bottom local interconnects
Grant 11,011,411 - Zhang , et al. May 18, 2 | 2021-05-18 |
Forming RRAM cell structure with filament confinement
Grant 11,011,704 - Li , et al. May 18, 2 | 2021-05-18 |
Formation of a partial air-gap spacer
Grant 11,011,617 - Lee , et al. May 18, 2 | 2021-05-18 |
Vertical silicon/silicon-germanium transistors with multiple threshold voltages
Grant 11,011,432 - Bi , et al. May 18, 2 | 2021-05-18 |
Closely packed vertical transistors with reduced contact resistance
Grant 11,011,622 - Bi , et al. May 18, 2 | 2021-05-18 |
Fin field-effect transistor with reduced parasitic capacitance and reduced variability
Grant 11,011,626 - Cheng , et al. May 18, 2 | 2021-05-18 |
Transistor having airgap spacer around gate structure
Grant 11,011,638 - Xie , et al. May 18, 2 | 2021-05-18 |
Stacked Vertical Transistor Memory Cell With Epi Connections
App 20210143159 - Zhang; Chen ; et al. | 2021-05-13 |
Field effect device with reduced capacitance and resistance in source/drain contacts at reduced gate pitch
Grant 11,004,737 - Cheng , et al. May 11, 2 | 2021-05-11 |
Gate cut device fabrication with extended height gates
Grant 11,004,944 - Cheng , et al. May 11, 2 | 2021-05-11 |
Stacked vertical transistor memory cell with epi connections
Grant 11004856 - | 2021-05-11 |
Vertical transistor having reduced edge fin variation
Grant 11,004,751 - Cheng , et al. May 11, 2 | 2021-05-11 |
Structure And Method To Fabricate Resistive Memory With Vertical Pre-determined Filament
App 20210135108 - PARK; Chanro ; et al. | 2021-05-06 |
Nanosheet Structures Having Vertically Oriented And Horizontally Stacked Nanosheets
App 20210134949 - XIE; Ruilong ; et al. | 2021-05-06 |
Strained silicon complementary metal oxide semiconductor including a silicon containing tensile n-type fin field effect transistor and silicon containing compressive p-type fin field effect transistor formed using a dual relaxed substrate
Grant 10998441 - | 2021-05-04 |
Semiconductor device including dual trench epitaxial dual-liner contacts
Grant 10998242 - | 2021-05-04 |
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
Grant 10998230 - | 2021-05-04 |
Vertical metal-air transistor
Grant 10998424 - | 2021-05-04 |
Transistor with improved self-aligned contact
Grant 10998229 - | 2021-05-04 |
Fabrication of vertical fin transistor with multiple threshold voltages
Grant 10991823 - | 2021-04-27 |
Replacement sacrificial nanosheets having improved etch selectivity
Grant 10991798 - | 2021-04-27 |
Methods and structures for cutting lines or spaces in a tight pitch structure
Grant 10991584 - | 2021-04-27 |
Bottom Spacer Structure For Vertical Field Effect Transistor And Method Of Forming Same
App 20210119020 - Mochizuki; Shogo ; et al. | 2021-04-22 |
Airgap Vertical Transistor Without Structural Collapse
App 20210118721 - Cheng; Kangguo ; et al. | 2021-04-22 |
Silicon Germanium Finfet With Low Gate Induced Drain Leakage Current
App 20210118998 - Mochizuki; Shogo ; et al. | 2021-04-22 |
Single Diffusion Break Isolation For Gate-all-around Field-effect Transistor Devices
App 20210118878 - Xu; Wenyu ; et al. | 2021-04-22 |
Transistor Having Wrap-around Source/drain Contacts And Under-contact Spacers
App 20210119031 - Song; Yi ; et al. | 2021-04-22 |
Vertical Fin Field Effect Transistor Devices With Reduced Top Source/drain Variability And Lower Resistance
App 20210119019 - Cheng; Kangguo ; et al. | 2021-04-22 |
Vertical Transistor Devices With Composite High-k And Low-k Spacers With A Controlled Top Junction
App 20210119043 - Cheng; Kangguo ; et al. | 2021-04-22 |
Staircase Surface-enhanced Raman Scattering Substrate
App 20210116383 - Cheng; Kangguo ; et al. | 2021-04-22 |
Transistors With Uniform Source/drain Epitaxy
App 20210119051 - Cheng; Kangguo ; et al. | 2021-04-22 |
Tunable on-chip nanosheet resistor
Grant 10985236 - | 2021-04-20 |
Gate cut device fabrication with extended height gates
Grant 10985250 - | 2021-04-20 |
Reduction of top source/drain external resistance and parasitic capacitance in vertical transistors
Grant 10985274 - | 2021-04-20 |
Buried power and ground in stacked vertical transport field effect transistors
Grant 10985064 - | 2021-04-20 |
Resistive random-access memory
Grant 10985315 - | 2021-04-20 |
Source and drain epitaxy and isolation for gate structures
Grant 10985279 - | 2021-04-20 |
Self-aligned contact cap
Grant 10985062 - | 2021-04-20 |
Semiconductor device with local connection
Grant 10985063 - | 2021-04-20 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20210111225 - Frougier; Julien ; et al. | 2021-04-15 |
Contact Source/drain Resistance
App 20210111246 - Lie; Fee Li ; et al. | 2021-04-15 |
Fabrication Of Fins Using Variable Spacers
App 20210111032 - Cheng; Kangguo | 2021-04-15 |
Fabrication Of Silicon Germanium Channel And Silicon/silicon Germanium Dual Channel Field-effect Transistors
App 20210111078 - Lee; ChoongHyun ; et al. | 2021-04-15 |
Replacement Gate Cross-couple For Static Random-access Memory Scaling
App 20210111028 - Xie; Ruilong ; et al. | 2021-04-15 |
High Mobility Complementary Metal-oxide-semiconductor (cmos) Devices With Fins On Insulator
App 20210111195 - Miao; Xin ; et al. | 2021-04-15 |
Self-aligned contact with metal-insulator transition materials
Grant 10978571 - | 2021-04-13 |
Self-aligned contact with metal-insulator transition materials
Grant 10978572 - | 2021-04-13 |
Floating gate prevention and capacitance reduction in semiconductor devices
Grant 10978574 - | 2021-04-13 |
Method And Structure For Forming Dielectric Isolated Finfet With Improved Source/drain Epitaxy
App 20210104620 - Cheng; Kangguo ; et al. | 2021-04-08 |
Vertical Tunneling Field Effect Transistor With Dual Liner Bottom Spacer
App 20210104440 - MILLER; ERIC ; et al. | 2021-04-08 |
High mobility complementary metal-oxide-semiconductor (CMOS) devices with fins on insulator
Grant 10971522 - | 2021-04-06 |
Extreme ultraviolet patterning process with resist hardening
Grant 10971362 - | 2021-04-06 |
Semiconductor memory device having a vertical active region
Grant 10971549 - | 2021-04-06 |
Replacement metal gate structures
Grant 10971601 - | 2021-04-06 |
Techniques for Forming Replacement Metal Gate for VFET
App 20210098602 - Xie; Ruilong ; et al. | 2021-04-01 |
Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
Grant 10964602 - | 2021-03-30 |
Chip security fingerprint
Grant 10964648 - | 2021-03-30 |
Nanoparticle structure and process for manufacture
Grant 10961120 - | 2021-03-30 |
Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
Grant 10964601 - | 2021-03-30 |
Stacked Vertical Field Effect Transistor With Self-aligned Junctions
App 20210091207 - Yu; Lan ; et al. | 2021-03-25 |
Tight Pitch Patterning
App 20210090889 - Cheng; Kangguo | 2021-03-25 |
Self-Aligned Contacts for MOL
App 20210090950 - Fan; Su Chen ; et al. | 2021-03-25 |
Formation of air gap spacers for reducing parasitic capacitance
Grant 10957778 - | 2021-03-23 |
Integrating extra gate VFET with single gate VFET
Grant 10957599 - | 2021-03-23 |
Reduction of multi-threshold voltage patterning damage in nanosheet device structure
Grant 10957698 - | 2021-03-23 |
Self-aligned fin recesses in nanosheet field effect transistors
Grant 10957601 - | 2021-03-23 |
Vertical transistors with different gate lengths
Grant 10957693 - | 2021-03-23 |
Fin cut etch process for vertical transistor devices
Grant 10957783 - | 2021-03-23 |
Nanosheet transistors with transverse strained channel regions
Grant 10957798 - | 2021-03-23 |
FDSOI with on-chip physically unclonable function
Grant 10957586 - | 2021-03-23 |
Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
Grant 10957799 - | 2021-03-23 |
Vertical Metal-air Transistor
App 20210083075 - Li; Juntao ; et al. | 2021-03-18 |
Back End Of Line Structures With Metal Lines With Alternating Patterning And Metallization Schemes
App 20210082714 - Xie; Ruilong ; et al. | 2021-03-18 |
Fabrication of vertical field effect transistor structure with strained channels
Grant 10950711 - | 2021-03-16 |
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap
Grant 10950492 - | 2021-03-16 |
Back end of line structures with metal lines with alternating patterning and metallization schemes
Grant 10950459 - | 2021-03-16 |
Multiple finFET formation with epitaxy separation
Grant 10950505 - | 2021-03-16 |
Forming single and double diffusion breaks
Grant 10950506 - | 2021-03-16 |
Fabrication of silicon germanium channel and silicon/silicon germanium dual channel field-effect transistors
Grant 10943835 - | 2021-03-09 |
Mask removal for tight-pitched nanostructures
Grant 10943816 - | 2021-03-09 |
Transistor having straight bottom spacers
Grant 10943992 - | 2021-03-09 |
Area-efficient inverter using stacked vertical transistors
Grant 10944012 - | 2021-03-09 |
Self-aligned source/drain contact for vertical field effect transistor
Grant 10944013 - | 2021-03-09 |
Forming strained channels for CMOS device fabrication
Grant 10943902 - | 2021-03-09 |
Transistor Having Airgap Spacer
App 20210066489 - Xie; Ruilong ; et al. | 2021-03-04 |
Field-effect transistor having dual channels
Grant 10937703 - | 2021-03-02 |
Ion-sensitive field-effect transistor formed with alternating dielectric stack to enhance sensitivity
Grant 10935516 - | 2021-03-02 |
Method and structure for forming silicon germanium FinFET
Grant 10937866 - | 2021-03-02 |
Dense vertical field effect transistor structure
Grant 10937792 - | 2021-03-02 |
Sub-fin removal for SOI like isolation with uniform active fin height
Grant 10937810 - | 2021-03-02 |
Nanosheet transistor bottom isolation
Grant 10937860 - | 2021-03-02 |
Fabrication of perfectly symmetric gate-all-around FET on suspended nanowire using interface interaction
Grant 10937863 - | 2021-03-02 |
Vertical Transistor With Self-aligned Gate
App 20210057565 - Li; Juntao ; et al. | 2021-02-25 |
Formation of stacked nanosheet semiconductor devices
Grant 10930563 - | 2021-02-23 |
Semiconductor device with improved contact resistance and via connectivity
Grant 10930510 - | 2021-02-23 |
Fabrication of vertical field effect transistor structure with strained channels
Grant 10930760 - | 2021-02-23 |
Vertical transistor devices with composite high-K and low-K spacers with a controlled top junction
Grant 10930778 - | 2021-02-23 |
Method and structure to improve overlay margin of non-self-aligned contact in metallization layer
Grant 10930568 - | 2021-02-23 |
Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates
Grant 10930756 - | 2021-02-23 |
Space deposition between source/drain and sacrificial layers
Grant 10930758 - | 2021-02-23 |
Method of forming a vertical transistor pass gate device
Grant 10930779 - | 2021-02-23 |
Replacement metal gate structures
Grant 10930754 - | 2021-02-23 |
Fabrication of vertical field effect transistor structure with strained channels
Grant 10930759 - | 2021-02-23 |
Nanosheet FET bottom isolation
Grant 10930734 - | 2021-02-23 |
Self-aligned Top Via Scheme
App 20210050259 - Xie; Ruilong ; et al. | 2021-02-18 |
Minimizing shorting between FinFET epitaxial regions
Grant 10923471 - | 2021-02-16 |
Wrap-around contact for vertical field effect transistors
Grant 10923590 - | 2021-02-16 |
Double Replacement Metal Line Patterning
App 20210043462 - Xie; Ruilong ; et al. | 2021-02-11 |
Gate-all-around Field Effect Transistors With Robust Inner Spacers And Methods
App 20210043727 - Frougier; Julien ; et al. | 2021-02-11 |
Vertical transistor with a body contact for back-biasing
Grant 10916660 - | 2021-02-09 |
Tensile strain in NFET channel
Grant 10916657 - | 2021-02-09 |
Modified dielectric fill between the contacts of field-effect transistors
Grant 10916470 - | 2021-02-09 |
Silicon germanium FinFET with low gate induced drain leakage current
Grant 10916633 - | 2021-02-09 |
Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance
Grant 10916638 - | 2021-02-09 |
Vertical field effect transistor with reduced external resistance
Grant 10916649 - | 2021-02-09 |
Nanosheet with changing SiGe percentage for SiGe lateral recess
Grant 10910482 - | 2021-02-02 |
Fin field effect transistor devices with modified spacer and gate dielectric thicknesses
Grant 10910372 - | 2021-02-02 |
Method and structure for forming vertical transistors with various gate lengths
Grant 10910494 - | 2021-02-02 |
Co-integration Of Non-volatile Memory On Gate-all-around Field Effect Transistor
App 20210028175 - Bi; Zhenxing ; et al. | 2021-01-28 |
Air gap spacer with wrap-around etch stop layer under gate spacer
Grant 10903337 - | 2021-01-26 |
Vertical FET with shaped spacer to reduce parasitic capacitance
Grant 10903338 - | 2021-01-26 |
Vertical transport FET devices having a sacrificial doped layer
Grant 10903339 - | 2021-01-26 |
Transistors with uniform source/drain epitaxy
Grant 10903365 - | 2021-01-26 |
Fully depleted SOI transistor with a buried ferroelectric layer in back-gate
Grant 10903332 - | 2021-01-26 |
Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
Grant 10903369 - | 2021-01-26 |
Vertical fin field effect transistor with reduced gate length variations
Grant 10903358 - | 2021-01-26 |
Positioning air-gap spacers in a transistor for improved control of parasitic capacitance
Grant 10903331 - | 2021-01-26 |
Sub-fin doped bulk fin field effect transistor (FinFET), Integrated Circuit (IC) and method of manufacture
Grant 10903210 - | 2021-01-26 |
Surface enhanced Raman scattering substrate
Grant 10900906 - | 2021-01-26 |
Phase change memory (PCM) with gradual reset characteristics
Grant 10902910 - | 2021-01-26 |
High threshold voltage FET with the same fin height as regular threshold voltage vertical FET
Grant 10903123 - | 2021-01-26 |
Gate-all-around field effect transistors with robust inner spacers and methods
Grant 10903317 - | 2021-01-26 |
Fin field effect transistor devices with modified spacer and gate dielectric thicknesses
Grant 10903212 - | 2021-01-26 |
Distributed decoupling capacitor
Grant 10903208 - | 2021-01-26 |
Metallization Layer Formation Process
App 20210020565 - Cheng; Kangguo ; et al. | 2021-01-21 |
Phase Change Memory Cell With Second Conductive Layer
App 20210020833 - LI; JUNTAO ; et al. | 2021-01-21 |
Forming fins utilizing alternating pattern of spacers
Grant 10896854 - | 2021-01-19 |
Airgap vertical transistor without structural collapse
Grant 10896845 - | 2021-01-19 |
Vertically stacked transistors
Grant 10896851 - | 2021-01-19 |
Embedded source/drain structure for tall FinFet and method of formation
Grant 10896976 - | 2021-01-19 |
Floating Gate Prevention And Capacitance Reduction In Semiconductor Devices
App 20210013322 - Xie; Ruilong ; et al. | 2021-01-14 |
Method and structure for forming a vertical field-effect transistor using a replacement metal gate process
Grant 10892195 - | 2021-01-12 |
Source/drain extension regions and air spacers for nanosheet field-effect transistor structures
Grant 10892328 - | 2021-01-12 |
Dielectric isolated fin with improved fin profile
Grant 10892364 - | 2021-01-12 |
Vertical field effect transistor with reduced gate to source/drain capacitance
Grant 10892325 - | 2021-01-12 |
Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension regions
Grant 10892368 - | 2021-01-12 |
Vertical field effect transistor with reduced gate to source/drain capacitance
Grant 10892324 - | 2021-01-12 |
Forming nanoscale pores in a semiconductor structure utilizing nanotubes as a sacrificial template
Grant 10890560 - | 2021-01-12 |
Transistor Gate Having Tapered Segments Positioned Above The Fin Channel
App 20210005749 - Miller; Eric ; et al. | 2021-01-07 |
Fabrication of fin field effect transistors for complementary metal oxide semiconductor devices including separate n-type and p-type source/drains using a single spacer deposition
Grant 10886271 - | 2021-01-05 |
Method and structure for forming a vertical field-effect transistor using a replacement metal gate process
Grant 10886183 - | 2021-01-05 |
Metal-insulator-metal capacitor structure
Grant 10886363 - | 2021-01-05 |
Semiconductor structures having increased channel strain using fin release in gate regions
Grant 10886385 - | 2021-01-05 |
Airgap formation in BEOL interconnect structure using sidewall image transfer
Grant 10886169 - | 2021-01-05 |
Fabrication of a vertical fin field effect transistor (vertical finFET) with a self-aligned gate and fin edges
Grant 10886384 - | 2021-01-05 |
Forming FinFET with reduced variability
Grant 10886367 - | 2021-01-05 |
Anti-fuse with reduced programming voltage
Grant 10886284 - | 2021-01-05 |
Single-electron transistor with wrap-around gate
Grant 10886391 - | 2021-01-05 |
Buried Power Rail For Transistor Devices
App 20200411436 - Xie; Ruilong ; et al. | 2020-12-31 |
Phase Change Memory (pcm) With Gradual Reset Characteristics
App 20200411087 - Cheng; Kangguo ; et al. | 2020-12-31 |
Stacked Vertical Transport Field Effect Transistor Contact Formation
App 20200411388 - WU; HENG ; et al. | 2020-12-31 |
Methods, Apparatus And System For Forming On-chip Metal-insulator-meal (mim) Capacitor
App 20200402976 - Park; Chanro ; et al. | 2020-12-24 |
Manipulation Of A Molecule Using Dipole Moments
App 20200399122 - Clevenger; Lawrence A. ; et al. | 2020-12-24 |
Transistors With Uniform Source/drain Epitaxy
App 20200403099 - Cheng; Kangguo ; et al. | 2020-12-24 |
Self-aligned Cut Process For Self-aligned Via Process Window
App 20200402852 - Xie; Ruilong ; et al. | 2020-12-24 |
Airgap Vertical Transistor Without Structural Collapse
App 20200395238 - Cheng; Kangguo ; et al. | 2020-12-17 |
Vertical Fet With Symmetric Junctions
App 20200395467 - Yu; Lan ; et al. | 2020-12-17 |
Surface Enhanced Raman Scattering Substrate
App 20200386685 - Cheng; Kangguo ; et al. | 2020-12-10 |
Transistor With Airgap Spacer
App 20200388694 - Cheng; Kangguo ; et al. | 2020-12-10 |
Buried Power And Ground In Stacked Vertical Transport Field Effect Transistors
App 20200381300 - ZHANG; Chen ; et al. | 2020-12-03 |
Interleaved Structure For Molecular Manipulation
App 20200381259 - Clevenger; Lawrence A. ; et al. | 2020-12-03 |
Gate Cap Last For Self-aligned Contact
App 20200381306 - Park; Chanro ; et al. | 2020-12-03 |
Single Diffusion Break Isolation For Gate-all-around Field-effect Transistor Devices
App 20200381426 - Xu; Wenyu ; et al. | 2020-12-03 |
Forming Single And Double Diffusion Breaks
App 20200381307 - Xie; Ruilong ; et al. | 2020-12-03 |
Forming Rram Cell Structure With Filament Confinement
App 20200381621 - Li; Juntao ; et al. | 2020-12-03 |
Fin Field Effect Transistor Devices With Robust Gate Isolation
App 20200381536 - Cheng; Kangguo | 2020-12-03 |
Combination Of Tensilely Strained N-type Fin Field Effect Transistors And Compressively Strained P-type Fin Field Effect Transistors
App 20200381308 - Cheng; Kangguo | 2020-12-03 |
Uniform fin dimensions using fin cut hardmask
Grant 10854753 - | 2020-12-01 |
Semiconductor Device With Improved Contact Resistance And Via Connectivity
App 20200373165 - Park; Chanro ; et al. | 2020-11-26 |
Forming Single And Double Diffusion Breaks For Fin Field-effect Transistor Structures
App 20200373196 - Li; Juntao ; et al. | 2020-11-26 |
Vertical Field-effect Transistor With T-shaped Gate
App 20200373413 - Song; Yi ; et al. | 2020-11-26 |
Formation Of An Air Gap Spacer Using Sacrificial Spacer Layer
App 20200373204 - Cheng; Kangguo ; et al. | 2020-11-26 |
Interconnects With Tight Pitch And Reduced Resistance
App 20200373199 - Cheng; Kangguo | 2020-11-26 |
Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
Grant 10847639 - | 2020-11-24 |
One-time Programmable Device Compatible With Vertical Transistor Processing
App 20200365607 - Cheng; Kangguo ; et al. | 2020-11-19 |
Embedded Chip Identification Formed By Directed Self-assembly
App 20200365519 - Cheng; Kangguo ; et al. | 2020-11-19 |
Transistor Having Strain-inducing Anchors And A Strain-enhancing Suspended Channel
App 20200365467 - Cheng; Kangguo ; et al. | 2020-11-19 |
Nanosheet and nanowire MOSFET with sharp source/drain junction
Grant 10840381 - | 2020-11-17 |
Vertical field-effect transistor devices with non-uniform thickness bottom spacers
Grant 10840145 - | 2020-11-17 |
Nanosheet transistor having improved bottom isolation
Grant 10840329 - | 2020-11-17 |
Formation of air gap spacers for reducing parasitic capacitance
Grant 10840349 - | 2020-11-17 |
One-time programmable device compatible with vertical transistor processing
Grant 10840148 - | 2020-11-17 |
Fin cut forming single and double diffusion breaks
Grant 10840147 - | 2020-11-17 |
Nanosheet Transistor Having Abrupt Junctions Between The Channel Nanosheets And The Source/drain Extension Regions
App 20200357931 - Lee; Choonghyun ; et al. | 2020-11-12 |
Nanosheet Transistor Having Improved Bottom Isolation
App 20200357884 - Xie; Ruilong ; et al. | 2020-11-12 |
Fin Field-effect Transistor With Reduced Parasitic Capacitance And Reduced Variability
App 20200357896 - Cheng; Kangguo ; et al. | 2020-11-12 |
Nanosheet Transistor
App 20200357895 - Cheng; Kangguo ; et al. | 2020-11-12 |
Transistor Having Straight Bottom Spacers
App 20200357894 - Cheng; Kangguo ; et al. | 2020-11-12 |
Gate-all-around Field Effect Transistors With Inner Spacers And Methods
App 20200357911 - Frougier; Julien ; et al. | 2020-11-12 |
Transistor Having Reduced Contact Resistance
App 20200350403 - Basker; Veeraraghavan S. ; et al. | 2020-11-05 |
Uniform Work Function Metal Recess For Vertical Transistor Complementary Metal Oxide Semiconductor Technology
App 20200350313 - XIE; RUILONG ; et al. | 2020-11-05 |
Stacked Transistors With Different Channel Widths
App 20200350211 - CHENG; Kangguo ; et al. | 2020-11-05 |
Via-to-metal Tip Connections In Multi-layer Chips
App 20200343186 - Xie; Ruilong ; et al. | 2020-10-29 |
Transistor Device Having A Comb-shaped Channel Region To Increase The Effective Gate Width
App 20200343361 - Cheng; Kangguo | 2020-10-29 |
Fin Cut Forming Single And Double Diffusion Breaks
App 20200343144 - Li; Juntao ; et al. | 2020-10-29 |
Nanosheet Sram By Sit Process
App 20200343247 - Cheng; Kangguo | 2020-10-29 |
Nanosheet Devices With Improved Electrostatic Integrity
App 20200343342 - Xie; Ruilong ; et al. | 2020-10-29 |
Formation Of Multi-segment Channel Transistor Devices
App 20200343146 - Cheng; Kangguo | 2020-10-29 |
On-chipset Certification To Prevent Spy Chip
App 20200344077 - Cheng; Kangguo | 2020-10-29 |
Reducing Gate Resistance In Stacked Vertical Transport Field Effect Transistors
App 20200343241 - WU; Heng ; et al. | 2020-10-29 |
Self-Aligned Gate and Junction for VTFET
App 20200335601 - Liu; Zuoguang ; et al. | 2020-10-22 |
Isolation Structure For Stacked Vertical Transistors
App 20200335581 - Li; Juntao ; et al. | 2020-10-22 |
Confining Filament At Pillar Center For Memory Devices
App 20200328346 - Kong; Dexin ; et al. | 2020-10-15 |
Source And Drain Epi Protective Spacer During Single Diffusion Break Formation
App 20200328121 - Yao; Yao ; et al. | 2020-10-15 |
Ion-sensitive Field-effect Transistor With Micro-pillar Well To Enhance Sensitivity
App 20200328088 - Li; Juntao ; et al. | 2020-10-15 |
Stacked Vertical Transport Field Effect Transistors With Anchors
App 20200328206 - Zhang; Chen ; et al. | 2020-10-15 |
Different Gate Widths For Upper And Lower Transistors In A Stacked Vertical Transport Field-effect Transistor Structure
App 20200328120 - Wu; Heng ; et al. | 2020-10-15 |
Field-effect Transistor Having Dual Channels
App 20200328211 - BI; Zhenxing ; et al. | 2020-10-15 |
Bulk Finfet With Fin Channel Height Uniformity And Isolation
App 20200328289 - Cheng; Kangguo | 2020-10-15 |
Finfet Devices
App 20200328124 - Basker; Veeraraghavan S. ; et al. | 2020-10-15 |
Gate-all-around Field Effect Transistor Having Stacked U Shaped Channels Configured To Improve The Effective Width Of The Transistor
App 20200321434 - Cheng; Kangguo ; et al. | 2020-10-08 |
Mask Removal For Tight-pitched Nanostructures
App 20200321245 - Li; Juntao ; et al. | 2020-10-08 |
Gate Contact Over Active Region With Self-aligned Source/drain Contact
App 20200321244 - Fan; Su Chen ; et al. | 2020-10-08 |
Self-aligned Gate Contact Integration With Metal Resistor
App 20200312909 - Miao; Xin ; et al. | 2020-10-01 |
FinFET-BASED INTEGRATED CIRCUITS WITH REDUCED PARASITIC CAPACITANCE
App 20200312843 - Xie; Ruilong ; et al. | 2020-10-01 |
Forming A Reliable Wrap-around Contact Without Source/drain Sacrifical Regions
App 20200312980 - Frougier; Julien ; et al. | 2020-10-01 |
Positioning Air-gap Spacers In A Transistor For Improved Control Of Parasitic Capacitance
App 20200312977 - Loubet; Nicolas ; et al. | 2020-10-01 |
Gate Recess Uniformity In Vertical Field Effect Transistor
App 20200312849 - Cheng; Kangguo | 2020-10-01 |
Stacked Vertical Field-effect Transistors With Sacrificial Layer Patterning
App 20200303263 - Zhang; Chen ; et al. | 2020-09-24 |
Middle-of-line Contacts With Varying Contact Area Providing Reduced Contact Resistance
App 20200303264 - Park; Chanro ; et al. | 2020-09-24 |
Wrap-Around Contact for Vertical Field Effect Transistors
App 20200303543 - Cheng; Kangguo ; et al. | 2020-09-24 |
Semiconductor Wafer Having Integrated Circuits With Bottom Local Interconnects
App 20200303244 - Zhang; Chen ; et al. | 2020-09-24 |
Ion-sensitive Field-effect Transistor With Sawtooth Well To Enhance Sensitivity
App 20200292491 - Park; Chanro ; et al. | 2020-09-17 |
Ion-sensitive Field-effect Transistor Formed With Alternating Dielectric Stack To Enhance Sensitivity
App 20200292490 - Cheng; Kangguo ; et al. | 2020-09-17 |
Determining Device Operability Via Metal-induced Layer Exchange
App 20200292611 - Kong; Dexin ; et al. | 2020-09-17 |
On-chip Security Circuit
App 20200294997 - Cheng; Kangguo | 2020-09-17 |
Vertical Stacked Nanosheet Cmos Transistors With Different Work Function Metals
App 20200294866 - CHENG; Kangguo ; et al. | 2020-09-17 |
Non-self Aligned Contact Semiconductor Devices
App 20200295151 - Xie; Ruilong ; et al. | 2020-09-17 |
Nanosheet Transistor Bottom Isolation
App 20200295130 - Bi; Zhenxing ; et al. | 2020-09-17 |
Source And Drain Epitaxy And Isolation For Gate Structures
App 20200295198 - Cheng; Kangguo ; et al. | 2020-09-17 |
Integrating Nanosheet Transistors, On-chip Embedded Memory, And Extended-gate Transistors On The Same Substrate
App 20200287046 - Frougier; Julien ; et al. | 2020-09-10 |
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