Circuit board
Yamauchi July 5, 2
U.S. patent number D956,707 [Application Number D/729,267] was granted by the patent office on 2022-07-05 for circuit board. This patent grant is currently assigned to LAPIS SEMICONDUCTOR CO., LTD.. The grantee listed for this patent is LAPIS Semiconductor Co., Ltd.. Invention is credited to Shigeki Yamauchi.
| United States Patent | D956,707 |
| Yamauchi | July 5, 2022 |
Circuit board
Claims
CLAIM The ornamental design for a circuit board, as shown and described.
| Inventors: | Yamauchi; Shigeki (Yokohama, JP) | ||||||||||
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| Applicant: |
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| Assignee: | LAPIS SEMICONDUCTOR CO., LTD.
(Yokohama, JP) |
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| Appl. No.: | D/729,267 | ||||||||||
| Filed: | March 25, 2020 |
Foreign Application Priority Data
| Sep 26, 2019 [JP] | 2019-21604 | |||
| Sep 26, 2019 [JP] | 2019-21605 | |||
| Sep 26, 2019 [JP] | 2019-21606 | |||
| Current U.S. Class: | D13/182 |
| Current International Class: | 1303 |
| Field of Search: | ;D13/182 ;361/748,752,760,761,807,808,736,719,720 ;174/250,253,255,68.1 ;363/144,147 |
References Cited [Referenced By]
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Other References
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Japanese Office Action dated May 12, 2020, for related Japanese Appln. No. 2019-021606 4 Pages. cited by applicant. |
Primary Examiner: Oswecki; Elizabeth J
Attorney, Agent or Firm: Brooks Kushman P.C.
Description
FIG. 1 is a front view of a circuit board showing my new design;
FIG. 2 is a rear view thereof;
FIG. 3 is a right side view thereof;
FIG. 4 is a left side view thereof;
FIG. 5 is a top view thereof; and,
FIG. 6 is a bottom view thereof.
Throughout the drawings, the dash-dash broken lines are for the purpose of illustrating environment only and form no part of the claimed design.
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