Housing for electronic circuitry

Greiser February 28, 2

Patent Grant D780127

U.S. patent number D780,127 [Application Number D/515,930] was granted by the patent office on 2017-02-28 for housing for electronic circuitry. This patent grant is currently assigned to BECKHOFF AUTOMATION GMBH. The grantee listed for this patent is Beckhoff Automation GmbH. Invention is credited to Frank Greiser.


United States Patent D780,127
Greiser February 28, 2017

Housing for electronic circuitry

Claims

CLAIM The ornamental design for a housing for electronic circuitry, as shown and descried.
Inventors: Greiser; Frank (Rheda-Wiedenbrueck, DE)
Applicant:
Name City State Country Type

Beckhoff Automation GmbH

Verl

N/A

DE
Assignee: BECKHOFF AUTOMATION GMBH (Verl, DE)
Appl. No.: D/515,930
Filed: January 28, 2015

Foreign Application Priority Data

Aug 4, 2014 [EM] 002514224-0003
Current U.S. Class: D13/162
Current International Class: 1303
Field of Search: ;D13/110,123,158,162,162.1,184 ;D14/301,302 ;361/728,729,736

References Cited [Referenced By]

U.S. Patent Documents
D307263 April 1990 Ishida
D307741 May 1990 Gilbert
D309446 July 1990 Russell
D309600 July 1990 Backes
5043847 August 1991 Deinhardt
D329844 September 1992 Ishida
5253140 October 1993 Inoue
5323296 June 1994 Gasser
D366244 January 1996 Kurokawa
D394642 May 1998 Bender
5791916 August 1998 Schirbl
D402965 December 1998 Bender
6008985 December 1999 Lake
6104616 August 2000 Benson et al.
6172875 January 2001 Suzuki
6431909 August 2002 Nolden
6456495 September 2002 Wieloch
6519159 February 2003 Weinmeier
D494142 August 2004 Schon
D511137 November 2005 Tuomola
7027296 April 2006 Bock
D563902 March 2008 Radau
D692397 October 2013 Liu
D693776 November 2013 Skowranek
8758061 June 2014 Mische
D721706 January 2015 Rooyakkers
9055688 June 2015 Molnar et al.
D735667 August 2015 Mielnik
D743350 November 2015 Ringer
2014/0118958 May 2014 Hamada
2015/0181758 June 2015 Kang
2015/0223362 August 2015 Izumi
Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Dorsey & Whitney LLP

Description



FIG. 1 is an isometric view of a housing for electronic circuitry, presenting the top, front and left side.

FIG. 2 is an alternate isometric view of the housing for electronic circuitry as shown in FIG. 1, presenting the top, back and right side.

FIG. 3 is a top view of the housing for electronic circuitry as shown in FIG. 1.

FIG. 4 is a bottom view of the housing for electronic circuitry as shown in FIG. 1.

FIG. 5 is a back view of the housing for electronic circuitry as shown in FIG. 1.

FIG. 6 is a left side view of the housing for electronic circuitry as shown in FIG. 1; and,

FIG. 7 is a detail view of the housing for electronic circuitry, presenting portions of the back and right side as shown in FIG. 2.

The broken lines in the drawings show environmental structure and form no part of the claimed design.

* * * * *


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