Semiconductor device

Description

FIG. 1 is a first perspective view of front, bottom and right side of a semiconductor device showing our new design;

FIG. 2 is a perspective view of rear, bottom and right side thereof;

FIG. 3 is a second perspective view of front, bottom and right side thereof;

FIG. 4 is a front view thereof;

FIG. 5 is a rear view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a right side view thereof;

FIG. 8 is a top plan view thereof; and,

FIG. 9 is a bottom view thereof.

The portions of the article in broken lines are shown for illustrative purposes only and form no part of the claimed design.

Claims

CLAIM The ornamental design for a semiconductor device, as shown and described.

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Inventors:	Soyano; Shin (Kanagawa, JP)
Applicant:	Name City State Country Type Soyano; Shin Kanagawa N/A JP
Assignee:	Fuji Electric Co., Ltd (Kanagawa, JP)
Appl. No.:	D/408,443
Filed:	December 13, 2011

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Foreign Application Priority Data

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Aug 12, 2011 [JP]			2011-018510

Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/110,182 ;257/690 ;361/728,736,775

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References Cited [Referenced By]

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U.S. Patent Documents

D357672	April 1995	Terasawa et al.
D389808	January 1998	Yamada et al.
D396450	July 1998	Nishiura et al.
6521983	February 2003	Yoshimatsu et al.
D476959	July 2003	Yamada et al.
D587662	March 2009	Soutome et al.
D589012	March 2009	Soyano et al.
8107255	January 2012	Sakamoto et al.
D653633	February 2012	Soyano
D653634	February 2012	Soyano
2001/0038143	November 2001	Sonobe et al.
2002/0093352	July 2002	Min et al.

Foreign Patent Documents

	1411990		Mar 2011		JP

Other References

JP Office Action dated Jan. 10, 2012, with English partial translation. cited by applicant.

Primary Examiner: Sikder; Selina
Attorney, Agent or Firm: Young & Thompson