Semiconductor carrier

Description

FIG. 1 is a top plan view of a semiconductor carrier of our new design in its entirety;

FIG. 2 is a bottom plan view of our new design;

FIG. 3 is a right end view of our new design;

FIG. 4 is a left end view of our new design;

FIG. 5 is a front view of our new design;

FIG. 6 is a rear view our new design; and,

FIG. 7 is a left, front perspective view of our new design.

Claims

The ornamental design for a semiconductor carrier, as shown and described.

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Inventors:	Hisaishi; Minoru (Tokyo, JP), Matsuoka; Noriyuki (Tokyo, JP), Suzuki; Takeyuki (Tokyo, JP)
Assignee:	Yamaichi Electronics Co., Ltd. (Tokyo, JP)
Appl. No.:	D/210,045
Filed:	July 27, 2004

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Current U.S. Class:	D13/182
Current International Class:	1303
Field of Search:	;D13/182 ;257/666,669,675,676 ;324/755

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References Cited [Referenced By]

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U.S. Patent Documents

D359028	June 1995	Siegel et al.
5451165	September 1995	Cearley-Cabbiness et al.
5519332	May 1996	Wood et al.
5541525	July 1996	Wood et al.
D401567	November 1998	Farnworth et al.
2001/0043074	November 2001	Hembree et al.
2004/0016993	January 2004	Ham et al.

Primary Examiner: Reid; Stella
Assistant Examiner: Sikder; Selina
Attorney, Agent or Firm: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP