Liquid Crystal Display Circuit

Walton September 18, 1

Patent Grant 3760406

U.S. patent number 3,760,406 [Application Number 05/217,592] was granted by the patent office on 1973-09-18 for liquid crystal display circuit. This patent grant is currently assigned to HMW Industries, Inc.. Invention is credited to Richard S. Walton.


United States Patent 3,760,406
Walton September 18, 1973

LIQUID CRYSTAL DISPLAY CIRCUIT

Abstract

A circuit for multiplexing or energizing the crystals of a nematic liquid crystal display in timed sequence. Complementary MOS transistor logic circuits are used to create an equal potential at the opposite ends of these liquid crystals that are to be deenergized. The remaining liquid crystals are energized through direct paths or through paths in series with other energized crystals.


Inventors: Walton; Richard S. (Lancaster, PA)
Assignee: HMW Industries, Inc. (Lancaster, PA)
Family ID: 22811709
Appl. No.: 05/217,592
Filed: January 13, 1972

Current U.S. Class: 368/204; 345/51; 368/242; 968/963
Current CPC Class: G04G 9/122 (20130101)
Current International Class: G04G 9/12 (20060101); G04G 9/00 (20060101); G08b 005/36 ()
Field of Search: ;58/23R,5R,23A ;350/16LC ;340/324R,336

References Cited [Referenced By]

U.S. Patent Documents
3653745 April 1972 Mao
3637291 January 1972 Kessler et al.
3646544 February 1972 Yamaguchi
3505804 April 1970 Hofstein
3580421 May 1971 Bickford
3575492 April 1971 Nester et al.
Primary Examiner: Trafton; David L.

Claims



What is claimed and desired to be secured by United States Letters Patent is:

1. A solid state wristwatch comprising a liquid crystal display, a frequency standard, a frequency converter and a display actuator coupling said standard to said display, said display actuator including first means coupled to said display for applying a potential difference to the elements of said display whereby said display elements are energized when no information is to be displayed, and second means coupled to said display for applying an equal potential to the opposite ends of selective elements of said display in accordance with the information to be displayed whereby said selected elements are de-energized while the other elements of said display remain energized, said display including a plurality of stations with liquid crystals at each station physically oriented to display time in numbers to the base ten, the liquid crystals at each station having one end connected in common with the other liquid crystals at that station, means coupled to said stations for applying time signals to the other ends of said crystals, and means coupled to said stations for applying multiplex signals to said common ends of said liquid crystals.

2. A wristwatch according to claim 1 including four stations.

3. A wristwatch according to claim 1 including means coupled to both ends of said liquid crystals for applying polarity reversing signals to said crystals.

4. A wristwatch according to claim 3 wherein said polarity reversing signal applying means comprise complementary MOS inverters.

5. A wrist watch according to claim 4 wherein said means for applying time signals and multiplex signals comprise transmission gates.

6. A solid state wristwatch comprising a liquid crystal display, a source of constant frequency electrical signals, a frequency converter coupled to the output of said frequency source of lowering the frequency of the signals from said frequency source, and a display actuator coupling the output of said frequency converter to said display, said display including a plurality of display stations with liquid crystals at each station physically oriented to display timing information to the base 10, the liquid crystals at each station having one end connected in common with the other liquid crystals at that station, said actuator including means coupled to said stations for applying timing information electrical signals to the other ends of said crystals, and means coupled to said stations for applying multiplex signals to said common ends of said liquid crystals.

7. A wristwatch according to claim 6 wherein said crystals are physically arranged in a seven bar segment array.

8. A wristwatch according to claim 6 including means coupled to said crystals for reversing the polarity across the energized ones of said crystals.

9. A wristwatch according to claim 6 including a first set of solid state switches coupled to said stations and corresponding in number to the maximum number of crystals at any one station, a second set of switches coupled to said stations and corresponding in number to the number of stations, said first set of switches being coupled to said other ends of said crystals for applying said timing information electrical signals to said crystals, and said second set of switches being coupled to said common ends of said crystals for applying said multiplex signals to said crystals.

10. A wristwatch according to claim 9 wherein said first set of switches comprise transmission gates.

11. A wristwatch according to claim 9 including a reversing frequency terminal coupled to both said first and second set of switches.
Description



This invention relates to an electrical circuit for actuating a plurality of display elements in the form of liquid crystals and more particularly is directed to a circuit for actuating the digital liquid crystal display of an electronic clock or wristwatch.

In recent years, considerable effort has been directed toward the development of a wristwatch which does not employ an electromechanical oscillator as the master time reference. In many instances, these constructions have utilized a crystal controlled high frequency oscillator as a frequency standard in conjunction with frequency conversion circuitry to produce a drive signal at a suitable timekeeping rate. For example, in assignee's copending application Ser. No. 35,196, filed May 6, 1970, now U.S. Pat. No. 3,672,155, there is disclosed a completely solid state wristwatch incorporating no moving parts. The watch of that application consists of only three major components, namely, a quartz crystal time base, a miniature digital time computer, and a digital optical display in the form of a plurality of light-emitting diodes. A tiny quartz slab is precisely cut to predetermined dimensions so that it vibrates at 32,768 Hz when properly stimulated by pulses from an electronic oscillator. The high frequency from the crystal time base is divided down to 1 pulse per second by utilizing a multi-stage integrated circuit binary counter. The time computer module counts the input pulse train, encodes it into binary form, and then decodes and processes the results so as to provide the appropriate signals at the display stations. A watch construction of this general type is also disclosed in assignee's copending United States application Ser. No. 143,492, filed May 14, 1971, in which the light-emitting diode display stations are sequentially energized to conserve power and to minimize the number of connections between the logic and displays. The sequential energization also makes it possible to use common decoder logic for all displays.

However, when using liquid crystal displays, it is not practical or possible to use the same system of sequential energization as is used with light-emitting diodes because liquid crystals do not provide the isolation exhibited by light-emitting diodes. Whereas light-emitting diodes will only pass current in one direction, the liquid crystal segments appear electrically as high value resistors and thereby provide leakage paths. These leakage paths cause unwanted segments to be activated, resulting in the display of an improper or untrue number.

The present invention is directed to an improved circuit for energizing liquid crystal displays and particularly to a circuit which makes it possible to energize the display stations in sequence so that they are in effect multiplexed or subjected to time sharing. In the present invention, advantageous use is made of the leakage paths through the liquid crystals which heretofore have caused difficulties in sequencing liquid crystal displays. It is based upon the proposition that instead of trying to turn on the desired segments individually, the circuit is used to allow the segments to be activated through direct or leakage paths and the desired segments are turned off. This turnoff is accomplished by placing a voltage of the same potential at both ends of a liquid crystal segment. In the preferred embodiment, the liquid crystal circuit is used in a transmissive display with a contrasting background. That is, when the desired segment is deactivated, the liquid crystal material becomes clear and the contrasting background is visible. An additional feature of the circuit of the present invention is that it provides for applying a reversing voltage to the liquid crystals so as to increase their life. It is a known feature of nematic liquid crystal material that its life is extended if the polarity of the voltage across the material is periodically reversed and the present circuit, in addition to sequential energization, also provides for voltage polarity reversal across the liquid crystals. An additional feature of the circuit of the present invention is that it allows the use of colored backgrounds to provide additional styling.

It is therefore one object of the present invention to provide an improved circuit for actuating a liquid crystal display.

Another object of the present invention is to provide a multiplex circuit for the display stations of a liquid crystal display.

Another object of the present invention is to provide a circuit for actuating the individual liquid crystals of a liquid crystal display in timed sequence.

Another object of the present invention is to provide a solid state timepiece having an improved liquid crystal display.

Another object of the present invention is to provide an improved liquid crystal display for timepieces and particularly for electronic clocks and wristwatches.

Another object of the present invention is to provide an improved display circuit for liquid crystal displays which incorporates polarity reversal in addition to liquid crystal multiplexing.

These and further objects and advantages of the invention will be more apparent upon reference to the following specification, claims, and appended drawings, wherein:

FIG. 1 is a simplified block diagram of an electronic wristwatch incorporating the liquid crystal display circuit of the present invention;

FIG. 2 is a view of one of the wristwatch display stations incorporating a 7 segment digital display;

FIG. 3 is a simplified liquid crystal display multiplex circuit constructed in accordance with the present invention; and

FIG. 4 is a circuit similar to that of FIG. 3 particularly adapted for incorporation in the wristwatch of FIG. 1.

Referring to the drawings, the novel watch of the present invention is generally indicated at 10 in FIG. 1. The watch comprises a wristwatch case 12 to which is attached a wristband or bracelet 14. Watch case 12 is provided with a display window 16 beneath which is positioned a digital electro-optical display 18 which is indicated as displaying the time 10:10, i.e., ten minutes after ten o'clock.

Mounted within wristwatch case 12, but shown in block form for simplifity in FIG. 1, is a frequency standard 26 provided by a crystal oscillator operating at a frequency of, for example, 32,768 Hz. This relatively high frequency is supplied by lead 28 to a frequency converter 30 in the form of a divider which divides down the frequency from the standard so that the output from the converter 30 appearing on lead 32 is at a frequency of 1 Hz. This signal is applied to a display actuator 34 which, in turn, drives the display 18 of the watch by way of electrical lead 36.

The details of the frequency standard 26, frequency converter 30, and a major portion of the display actuator 34 will not be described in detail since they are in all respects identical to those shown and described in assignee's copending United States application Ser. No. 35,196, filed May 6, 1970, now U.S. Pat. No. 3,672,155, the disclosure of which is incorporated herein by reference. Briefly, these components are made of complementary MOS transistors and are formed as integrated circuits so as to require minimum power for operation and so as to withstand the reduction in size necessary for incorporation in a conventional sized man's wristwatch.

Each display station of the display 18 of FIG. 1, such as station 20 shown in FIG. 2, preferably takes the form illustrated in that FIGURE. That is, each displayed digital number from 0 through 9 is produced by a 7 bar segment array of liquid crystals.

FIG. 2 shows 7 liquid crystal segments 38, 40, 42, 44, 46, 48, and 50 of elongated shape and arranged so that by energizing an appropriate combination of the bar segments, any of the numbers 0 through 9 may be displayed. Each individual segment of the display may be of the type shown and described in assignee's copending United States application, Ser. No. 123,672, filed Mar. 12, 1971, now U.S. Pat. No. 3,701,249, the disclosure of which is incorporated herein by reference. Briefly, the display is formed by a pair of spaced glass plates with the liquid crystal material disposed between and preferably coextensive with the glass plates. The front surface of the rear glass plate and the rear surface of the front glass plate are coated with transparent electrode material with portions of the surface uncoated to form electrodes. Thus, each of the bar segments of each display is formed by electrode pairs across a liquid crystal material.

The term "liquid crystal" is used to mean a substance whose rheological behavior is similar to that of fluids, but whose optical behavior is similar to the crystalline state over a given temperature range. These substances exhibit mesomorphic behavior and of the three states of mesomorphic behavior, the nematic state exhibits the electromagnetic optic effect utilized in the present digital time display. A preferred nematic liquid crystal having the required properties is p-azoxyanisole. This material exhibits the desired mesomorphic behavior within the desired temperature range for watches and it is characteristic of this liquid crystal under these temperature conditions that with no electric or magnetic field applied, it is substantially transparent. However, when a field, either electric or magnetic, is applied across the crystal electrodes, the liquid crystal becomes turbulent and scatters light, the effect of which is to reflect light which appears white. An additional characteristic of the liquid crystal is the fact that the greater the incident light on the energized liquid crystal, the greater the reflectivity of brightness and, hence, contrast with the surrounding environment.

FIG. 3 shows the novel circuit 52 of the present invention for driving a liquid crystal display. For the sake of clarity, the circuit of FIG. 3 has been simplified to show only three display stations and three liquid crystal segments at each station. A complete display circuit having four display stations with seven liquid crystal bar segments at each station and suitable for use in the wristwatch 10 of FIG. 1 is illustrated in FIG. 4.

Referring to FIG. 3, the circuit components illustrated therein may be energized in a conventional manner from a suitable watch battery incorporated in a case 12, such as a conventional single cell, 11/2 volt wristwatch battery, and a higher voltage source to energize the liquid crystals. The circuit comprises a first display station 54 having liquid crystal segments 56, 58, and 60, these three liquid crystals being illustrated to show their internal resistance and identified respectively by the letters a, b, and c. A second display station 62 is provided with the three bar segments or three liquid crystals 64, 66, and 68, labeled a', b', and c', respectively. Finally, a third display station 70 is made up of the liquid crystal segments 72, 74, and 76, labeled respectively a", b", and c". Each of the display stations 54, 62, and 70 is connected through its respective transmission gate 78, 80, and 82, to the output 84 of a complementary MOS integrated circuit inverter 86. The input of the inverter is connected to one terminal 88 of a plurality reversing source (not shown). By way of example only, the source connected to terminal 88 may be the output of one stage of the frequency converter or divider 30 of FIG. 1 and, by way of example only, this divider may provide a squarewave input at terminal 88 to the inverter 86 at a frequency of 32 Hz, which input changes between a 0 level, i.e., ground, and a positive level, with the 0 level identified through the remainder of the circuit with a logic 0 and the respective value identified throughout the remainder of the circuit as a logic 1.

Each of transmission gates 78, 80, and 82 has a control input connected to the respective control input terminals 90, 92, and 94, which terminals are respectively labeled A, B, and C. With the input to the control terminal of the transmission gate at one level, the gate is turned on and signals are passed through the gate, whereas with a second level signal at the control terminal, the gate is turned off, signals are blocked, and the gate appears as an open circuit.

The transmission gate 78 connects the output of inverter 86 to one end 96 of each of the liquid crystals 56, 64, and 72, labeled a, a', and a", respectively. The other side of each of these liquid crystals are connected to the common points or common terminals 98, 100, and 102. That is, these terminals are common to the other two liquid crystals of each station. The output of inverter 86 is connected by the second transmission gate 80 through junction 104 to the other ends of the b liquid crystals 58, 66, and 74. Similarly, the inverter is connected through the third transmission gate 82 by way of a lead 103 to the other end of the c liquid crystals 60, 68, and 76. Junciton 98 is connected by a lead 105 to the output of a logic circuit 107 comprising transmission gates 106 and 108, inverter 110, and two complementary MOS inverter pairs 112 and 114. The inverter pair gates are interconnected by a further inverter 116. Transmission gates 106 and 108 are interconnected by a lead 118 and inverter 110 is connected by a lead 120 to a switch terminal 122, labeled S.sub.1. This switch terminal is also connected to transmission gate 108 by way of a lead 124.

Similarly, the common liquid crystal junction point 100 of station 62 is connected by a lead 126 to a second logic logic circuit 128, in all respects identical to the logic circuit 107 previously described. This logic circuit will not be described in detail since it is identical to the other and is connected to a multiplexing switch terminal 130, labeled S.sub.2. In a similar fashion, common point 102 for the liquid crystals of station 70 is connected by a lead 132 to a third logic circuit 134, identical to the logic circuits 107 and 128, and in turn connected to switch terminal 136, labeled S.sub.3. The inverter of each of the logic circuits 107, 128 and 134 corresponding to inverter 116 of logic circuit 107 are connected by respective leads 138, 140, and 142 to terminal 144 of the reversing frequency signal source. Terminal 144 receives the same signal as terminal 88, previously described.

FIG. 4 is a diagram similar to FIG. 3 and particularly adapted for use in an electronic wristwatch. In FIG. 4, like parts bear like reference numerals. In FIG. 4, there are seven transmission gates 146, 148, 150, 152, 154, 156, and 158, and these gates are connected to respective control terminals 160, 162, 164, 166, 168, 170, and 172, labeled A, B, C, D, E, F, and G, respectively. Each of the transmission gates are connected to one of the seven liquid crystals at each of the display stations 174, 176, 178, and 180. The seven liquid crystals at each station are arranged in a seven bar segment display configuration of the type illustrated in FIG. 2. By way of example only, stations 174 and 176 may display the hours of time and stations 178 and 180 may display the minutes of time. It is apparent that portions of the circuit in FIG. 4 could be further duplicated to provide two additional stations, if desired, for the display of time in seconds. The common junctions of the displays are connected by respective leads 182, 184, 186, and 188 to the logic circuits 190, 192, 194, and 196 and each of these logic circuits are identical to the logic circuits 107, 128, and 134 of FIG. 3. These logic circuits are connected to the switch terminals 198, 200, 202, and 204, labeled S.sub.1, S.sub.2, S.sub.3, and S.sub.4, respectively. The reversing frequency terminals are illustrated at 88 and 144 and terminal 88 is connected through complementary MOS inverter 86 to each of the transmission gates. As can be seen, there is a transmission gate for each set of bar segments, the transmission gate 146 connected to the A control terminal 160 being provided for the liquid crystals labeled a, a', a", a'" , and so on. There is a logic circuit 190, 192, 194, and 196 for each of the display stations.

The operation of the circuit of the present invention will be described in conjunction with the simpler display circuit of FIG. 3, it being understood that the description is equally applicable to the larger circuit of FIG. 4. As previously stated, the present invention is based on the proposition that instead of trying to turn on the desired segment individually, the segments are activated through direct or leakage paths and the selected segments are turned off. This turnoff is accomplished by placing a voltage of the same potential at both ends of the segment. It is accomplished by using a form of three-state logic. Points on the liquid crystal display are either positive, negative, or neutral.

The liquid crystals are operated in a time shared or multiplexed mode and the circuit uses complementary MOS transistor pairs throughout. It incorporates current reversal in order to prolong the life of the liquid crystal material, it being understood that elimination of the need for current reversal would make possible a simpler circuit.

In FIG. 3, the following assumptions are made.

1. The digit switch outputs at the terminals labeled S.sub.1, S.sub.2, and S.sub.3, are "one" when a digit is active and are "zero" at all other times.

2. The segment control at terminals A, B, and C is "one" when that segment is to be controlled.

3. A "one" on the control input of a transmission gate allows current to flow through that gate in either direction.

4. A logic "one" is defined as a positive potential in FIG. 3 and a logic "zero" is defined as a reference or ground potential.

In order to demonstrate how the circuit operates, it will be shown that segment b, i.e., segment 58, in FIG. 3 can be controlled. Control means that segment b can be selectively turned off while all others are on. In order to do this, the output of the control logic must be A = "zero," B = "one," C = "zero," S.sub.1 = "one," S.sub.2 = "zero," and S.sub.3 = "zero." This is the normal output for positive logic. It is also assumed that the reversing frequency output at terminals 88 and 144 is a logic "zero."

With the output of the reversing frequency source a logic "zero," the output of the inverter 86 at junction 84 is "one" and the upper side of each of the transmission gates 78, 80, and 82 is "one." Since the A input of transmission gate 78 is "zero," it does not pass the signal and looks like an open circuit (neutral) from its lower side at junction 96. The same is true of transmission gate 82 where input or control terminal C is "zero." However, since B = "one," transmission gate 80 passes the signal from inverter 86 so that junction 104 is a "one." This means that one end of segment b (segment 58) is "one" at point 206. The other end of liquid crystal segment b at junction 98 is common to liquid crystal segments a and c and is controlled by the input S.sub.1 at terminal 122. Since S.sub.1 is "one," transmission gate 108 gasses a signal. At the same time, transmission gate 106 will not pass a signal because the "one" at S.sub.1 is converted to a "zero" by inverter 110. Since a reversing frequency input signal was assumed to be "zero," the output of the inverter pair 208 is "one." This is applied through transmission gate 108 by way of lead 105 to junction 98. Therefore, the voltage at junction 98 is also "one" because it is passed by transmission gate 108. With "one" at both ends of segment b, no current can flow through this segment and therefore segment b is in the unactivated (desired) condition.

Immediately above, it was described how junction 98 was "one" when S.sub.1 = "one." It will now be described how common junctions 100 and 102 for the other stations 62 and 70 become "zero" when S.sub.2 and S.sub.3 are "zero." The reversing frequency input is still "zero," therefore inverter pair 210 has a "zero" output on lead 212. This signal passes through transmission gate 214 because a "zero" at S.sub.2 causes transmission gate 214 to pass and transmission gate 216 to block. This makes junction point 100 "zero." The same is true for junction point 102.

Since, as described above, point 104 is "one" and junction 100 is "zero," liquid crystal segment b' (segment 66) is activated. Likewise, liquid crystal segment b" (segment 74) is activated. Current also flows through the series connection of segments a and a' (segments 56 and 64) because junction 98 is "one" and common junction 100 is "zero." Likewise, current flows through the series connection of segment a and a" (segments 56 and 72) because junction 98 is "one" and junction 102 is "zero." For the same reason, current passes through the series connection of liquid crystal segments 60 and 68 from the "one" junction 98 to the "zero" junction 100 and through the series connection of liquid crystal segments 60 and 76. This is possible because transmission gates 78 and 82 are open circuited or made to appear neutral by the "zero" input at A terminal 90 and C terminal 94.

Reverse polarity at the reversing frequency input terminals 88 and 144 has similar results. A "one" at the reversing frequency input terminal 88 causes the output of the inverter of pair 86 at junction 84 to be "zero." This same "one" at the input of inverter pair 208 from terminal 144 causes its output to be "zero." Transmission gate 80 passes the "zero" to point 206 and transmission gate 108 passes the "zero" to junction 98. Therefore, the voltage across segment b (segment 58) is the same and no current flows. The polarities of the other points in the circuit are similarly reversed.

The liquid crystal displays of the present invention can be used in a variety of ways. In the preferred construction, the liquid crystals are used in a transmissive display with a contrasting background of any desired color. When the desired segment is deactivated, the liquid crystal material becomes clear and the contrasting background becomes visible. This system makes possible the use of existing decoders. Alternatively, the liquid crystals can be combined with a special decoder whose output controls the segments not necessary to form a certain numeral. Reflective displays can be used in this system. A third system can be provided utilizing a special liquid crystal material which scatters light when there is no current flow through the liquid crystal.

It is apparent from the above that the present invention provides an improved solid state electronic wristwatch and more particularly an improved circuit for multiplexing the liquid crystals of an electro-optic liquid crystal display. The input signals to the control terminals, such as to the terminals A, B, and C, determine which liquid crystals in the display will be energized, whereas the signals to the switch terminals, such as the switch terminals 122, 130, and 136 in FIG. 3, determine which station is energized. In this way, it is possible to apply to the liquid crystal terminals A-C a suitable code indicative of time and to apply station energizing signals in sequence to the switch terminals S.sub.1 -S.sub.3 so that the various stations are actuated in sequence.

Important features of the present invention include an arrangement for applying an equal potential to the opposite ends or sides of the liquid crystals which are to be deenergized and using the leakage resistance through the crystals to energize others. The circuit disclosed is solid state throughout and preferably employs for all the active components complementary pairs of MOS transistor circuits so that the arrangement is susceptible to production using large-scale integrated circuit techniques and at the same time draws a minimum of power so that it may be incorporated in a wristwatch and driven from a conventional wristwatch battery power supply.

The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiment is therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

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