U.S. patent application number 17/124621 was filed with the patent office on 2022-06-23 for dielectric material change to optimize electrical and mechanical properties of flex circuit.
The applicant listed for this patent is International Business Machines Corporation. Invention is credited to Philipp K. Buchling Rego, James Busby, Edward N. Cohen, John R. Dangler, MATTHEW DOYLE, MICHAEL FISHER, Arthur J. Higby, DAVID CLIFFORD LONG, William Santiago-Fernandez.
Application Number | 20220201839 17/124621 |
Document ID | / |
Family ID | 1000005325827 |
Filed Date | 2022-06-23 |
United States Patent
Application |
20220201839 |
Kind Code |
A1 |
Dangler; John R. ; et
al. |
June 23, 2022 |
DIELECTRIC MATERIAL CHANGE TO OPTIMIZE ELECTRICAL AND MECHANICAL
PROPERTIES OF FLEX CIRCUIT
Abstract
A uniform thickness flex circuit is taught that uses more than
one dielectric layer. A first dielectric layer is more flexible and
capable of reliably bending at a radius of curvature at which a
second dielectric layer cannot be reliably bent. The second
dielectric layer has at least one more desirable electrical
characteristic than the first dielectric area, for example leakage.
Use of the uniform thickness flex circuit to protect sensitive
material in an electronic enclosure is also described.
Inventors: |
Dangler; John R.;
(Rochester, MN) ; Higby; Arthur J.; (Cottekill,
NY) ; Buchling Rego; Philipp K.; (Wappingers Falls,
NY) ; LONG; DAVID CLIFFORD; (WAPPINGERS FALLS,
NY) ; Busby; James; (New Paltz, NY) ; DOYLE;
MATTHEW; (Chatfield, MN) ; Cohen; Edward N.;
(Kingston, NY) ; FISHER; MICHAEL; (Poughkquag,
NY) ; Santiago-Fernandez; William; (Hopewell
Junction, NY) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
International Business Machines Corporation |
Armonk |
NY |
US |
|
|
Family ID: |
1000005325827 |
Appl. No.: |
17/124621 |
Filed: |
December 17, 2020 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H05K 1/028 20130101;
H05K 5/0208 20130101; H05K 3/44 20130101; H05K 1/0346 20130101;
H05K 2201/0154 20130101 |
International
Class: |
H05K 1/02 20060101
H05K001/02; H05K 1/03 20060101 H05K001/03; H05K 3/44 20060101
H05K003/44; H05K 5/02 20060101 H05K005/02 |
Claims
1. An apparatus comprising: a flex circuit further comprising: a
core, the core having a polyimide layer having a surface, a pattern
of wires is attached to the surface; a first dielectric area
comprising a first dielectric having a first modulus of elasticity
attached to the surface of the core where a transition zone occurs;
a second dielectric area comprising a second dielectric different
than the first dielectric, the second dielectric having a higher
modulus of elasticity than the first dielectric, attached to the
surface of the core where the first dielectric area is not attached
to the surface of the core; the transition zone is an area
comprising a bend of a specified radius that the first dielectric
area can be reliably bent and the second dielectric area cannot be
reliably bent; and a thickness of the flex circuit is uniform over
a length of the flex circuit.
2. (canceled)
3. The apparatus of claim 1, the first dielectric area is Fire
Retardant acrylic adhesive (FR) and the second dielectric area is
High Temperature laminate material (HT).
4. The apparatus of claim 1, further comprising: one or more
electronic components mechanically and electrically coupled to the
flex circuits.
5. The apparatus of claim 1, further comprising: an electronic
enclosure to house at least a portion of the flex circuit, the
electronic enclosure comprises a depressed area having a transition
zone into which a portion of the flex circuit is formed.
6. The apparatus of claim 5, the electronic enclosure further
comprising: a housing bottom comprising the depressed area, the
flex circuit attached to a surface of the housing bottom by an
adhesive.
7. The apparatus of claim 6, the electronic enclosure further
comprising: a housing top, the flex circuit attached to a surface
of the housing top by the adhesive.
8. The apparatus of claim 7, the pattern of wiring having
overlapping wiring levels to cause breaking at least one wire in
the wiring pattern by a drill in a tempering event.
9. The apparatus of claim 7, the flex circuit further comprising a
first dielectric layer and a second dielectric layer; the first
dielectric layer has a first dielectric area of the first
dielectric to reliably bend over the transition zone, the first
dielectric area having a plurality of shapes extending into a
non-transition zone, a remainder of the first dielectric layer
having a second dielectric area of the second dielectric; the
second dielectric layer has a third dielectric area of the first
dielectric to reliably bend over the transition zone, the third
dielectric area having a plurality of shapes extending into the
non-transition zone that only partially overlap with the plurality
of shapes of the first dielectric area, a remainder of the second
dielectric layer having fourth dielectric area of the second
dielectric; and wiring traces on at least one of the plurality of
shapes extending into the non-transition zone.
10. The apparatus of claim 9, the pattern to tear comprising a
serpentine wiring pattern having a slit from an edge of the
dielectric area to enhance tearing.
11. (canceled)
12. A method of making a flex circuit comprising: selecting a core
material having electrically conducting material on a surface;
selecting a first dielectric layer that supports a bend with a
first radius of curvature, the first bonding layer having a
thickness when laminated with the core material; selecting a second
dielectric layer that has a more desirable electrical
characteristic than the first bonding layer but cannot reliably
support bending at the first radius of curvature. The second
bonding layer having the thickness when laminated with the core
material; determining a first area of the flex circuit that must
bend at the first radius of curvature; determining a second area of
the flex circuit that does not need to bend at the first radius of
curvature; and laminating the core area with the first dielectric
layer in the first area of the flex circuit and laminating the
remainder of the core area with the second dielectric layer.
13. The method of claim 12, further comprising selecting an "AP
core" for the core, where "AP core" is a class of Adhesive-less
high Performance laminate materials.
14. The method of claim 12, further comprising selecting an "FR"
bonding layer as the first dielectric area, where "FR" is a Fire
Retardant modified acrylic adhesive in the flex laminate materials;
and selecting an "HT" bonding layer as the second dielectric area,
where "HT" is a class of High Temperature laminate materials.
15. A method to enclose sensitive material in an electronic
enclosure comprising the steps of: making a bottom housing in the
electronic enclosure, the electronic enclosure having a depressed
area and a transition zone between an edge of the bottom housing
and a bottom of the depression; making a top housing in the
electronic enclosure; adhering flex circuit to cover the inside
surface of the top housing and the bottom housing, the flex circuit
to detect tampering of the electronic enclosure; the flex circuit
having a first dielectric area to reliably traverse the transition
zone; and the flex circuit having a second dielectric area to cover
areas where the flex circuit is not covered by the first dielectric
area.
16. The method of claim 15, further comprising using Fire Retardant
modified acrylic adhesive material, "FR", as the first dielectric
area and High Temperature laminate materials "HT" as the second
dielectric area.
17. The method of claim 15, further comprising using a wiring
pattern in the flex circuit configured to detect tampering of the
electronic enclosure.
18. The method of claim 15, further comprising using a layout
pattern for the first and second dielectric areas to enhance
tearing to break wiring in the flex circuit when the top and bottom
housing are pried apart.
19. The method of claim 15, further comprising placing a printed
circuit board (PCB) between the top housing and the bottom housing,
the PCB further having a semiconductor chip that contains the
sensitive material.
Description
BACKGROUND
[0001] The present disclosure generally relates to an electronic
system having a flex circuit. The flex circuit may be in an
electrical enclosure. The flex circuit in the electrical enclosure
is bent, or formed, at a particular bend with a first radius of
curvature in a first area on the flex circuit. A first dielectric
in the flex circuit is used in the first area and a second
dielectric in the flex circuit is used in a second area on the flex
circuit that has a longer radius of curvature or is a flat
area.
SUMMARY
[0002] Embodiments of the invention provide a flex circuit of
uniform thickness having a first dielectric having properties that
allow the flex circuit to bend without damage to electrical
conductors in the flex circuit and a second dielectric having
properties that provide lower leakage than leakage in the first
dielectric.
[0003] In an embodiment, the first dielectric has a lower modulus
of elasticity than the second dielectric so that the first
dielectric is capable of bending at a smaller radius of curvature
than the second dielectric. The first dielectric has a higher
electrical leakage than the second dielectric.
[0004] In an embodiment of the invention, for nonlimiting example,
the first dielectric is "FR", where FR is in reference to a Fire
Retardant modified acrylic adhesive. The second dielectric is "HT"
in reference to a class of High Temperature laminate materials that
feature favorable material and electrical characteristics. Such
materials may have a higher glass transition temperature (Tg) and
lower loss characteristics than materials such as FR. Both the
first and second dielectric areas may use an AP core upon which
metallization is formed and etched to provide electrical wiring
paths. "AP" is generally used herein, in reference to a class of
Adhesive-less/high-Performance laminate materials that include a
copper-clad laminate and an all-polyimide composite of polyimide
film bonded to copper foil. AP7163E is used as an exemplary "AP"
film herein.
[0005] In an embodiment of the invention, a pattern of conductors
in one or more wiring levels in the flex circuit is formed. The
pattern of conductors may be signal conductors coupling a first
semiconductor chip to a second semiconductor chip. A battery may
supply energy to the first semiconductor chip and to the second
semiconductor chip. The pattern of conductors may be a serpentine
pattern that would be broken by drilling or tearing to show
tampering of electrical enclosure.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0006] FIGS. 1A and 1B show top and cross sectional views of a flex
circuit, with wiring levels and sections having a first dielectric
area and a second dielectric area.
[0007] FIG. 1C shows a cross section of a semiconductor chip and a
semiconductor chip mounted on a flex circuit.
[0008] FIG. 2A shows a cross section of raw materials before
etching and lamination of a cross section where FR is used as a
dielectric.
[0009] FIG. 2B shows a cross section of the materials of FIG. 2A
after etching.
[0010] FIG. 2C shows a cross section of the materials of FIG. 2A
after etching and lamination.
[0011] FIG. 3A shows a cross section of the raw materials before
etching and lamination of a cross section where HR is used as a
dielectric.
[0012] FIG. 3B shows a cross section of raw materials of FIG. 3A
after etching.
[0013] FIG. 3C shows a cross section of the materials of FIG. 3A
after etching and lamination.
[0014] FIG. 3D shows a side by side comparison of an FR section and
an HT section, both sections having the same thickness after
lamination to make a uniform thickness over the length of the flex
circuit.
[0015] FIGS. 4A and 4B show a top and cross sectional view of an
electrical enclosure with FR and HT dielectric areas shown.
[0016] FIG. 4C shows the cross sectional view of the electrical
enclosure including a printed circuit board (PCB) and a chip inside
the electrical enclosure.
[0017] FIG. 5 shows an electronic enclosure having a flex circuit
folded 180 degrees with FR and HT dielectric areas shown.
[0018] FIG. 6 shows sections of two layers, both layers having an
FR section and an HT section partially overlapped to increase
tearing should the electronic enclosure be pried open. The tearing
would break some or all of the wiring in the wiring layers running
through the FR and HR areas.
[0019] FIG. 7 shows a section having alternating FR and HR near an
edge of an electronic enclosure which also promotes tearing to
break wiring in the FR and HR areas near an edge of the electronic
enclosure if the electronic enclosure is pried open.
[0020] FIG. 8 shows a layout of a layer of flex circuit having
partial "gaps" in the flex circuits that would facilitate tearing
if the electronic enclosure is pried open.
[0021] FIG. 9 shows a plot of leakage versus frequency for FR and
HT dielectric areas.
[0022] FIG. 10 shows a method for allowing for using FR sections
where the flex circuit needs to bend more sharply than an HT
section can reliably bend and HT sections where the HT can reliably
be used.
DETAILED DESCRIPTION
[0023] The present disclosure generally relates to an electronic
system having a flex circuit that must be bent or folded sharply.
The flex circuit may be in an electrical enclosure. The flex
circuit in the electrical enclosure is bent, or formed, at a
particular bend with a first radius of curvature in a first area on
the flex circuit. A first dielectric in the flex circuit is used in
the first area and a second dielectric in the flex circuit is used
in a second area on the flex circuit that has one of a longer
radius of curvature and a flat area. The flex circuit is of uniform
thickness.
[0024] The flex circuit herein described may be used when the flex
circuit needs to be bent sharper than a radius of curvature smaller
than is supported by the second dielectric. The second dielectric
has more desired characteristics, such as losses in high frequency
signals, leakage, and coefficient of expansion. In such a bend, the
first dielectric is used to support the necessary bend without
forming cracks in wiring on the flex circuit. Where such a bend is
not required, that is, a "flatter" portion of the flex circuit, the
second dielectric is used, advantageously employing the more
desired characteristics mentioned above.
[0025] Small radius of curvatures may be required in various
applications. For example, a flex circuit may need to be folded
back against itself. In another example, an electronic enclosure
may contain sensitive, perhaps cryptographic, components, and
detection of tampering, such as drilling into the electronic
enclosure or prying the electronic enclosure open is a requirement.
The flex circuit may be "formed" into a concave portion of the
electronic enclosure, typically resulting in a small radius of
curvature. The flex circuit may contain a pattern of wiring on one
or more levels. Drilling or prying open the electronic enclosure
would break one or more of the wires in the pattern of wiring to
expose the tampering. Several drawings will be discussed later of
electronic enclosures having flex circuits.
[0026] In the drawings and the Detailed Description, like numbers
generally refer to like components, parts, steps, and
processes.
[0027] With reference now to FIGS. 1A, 1B, and 1C, a top view of a
flex circuit having embodiments of the invention is shown.
[0028] FIG. 1A is a top view of flex circuit 101. Semiconductor
chips 150 and 151 may be mounted on flex circuit 101 by
conventional means, such as wire bonding or surface mount
connections. A battery 152 may also be mounted on flex circuit 101
to supply energy to one or both semiconductor chips 150 and 151.
Cross section at A-A in FIG. 1B is depicted in FIG. 1A.
[0029] FIG. 1B shows the cross sectional view at A-A. Wiring levels
102, 103, and 104 are shown. More or fewer wiring levels are
contemplated. Areas 110 (one at left; one at right) are areas that
use the dielectric 2 described above, henceforth will be referred
to as HT areas. Area 111 uses dielectric 1, the dielectric that can
reliably bend at a small radius of curvature, henceforth will be
referred to as FR areas. FIG. 1B shows flex circuit 101 bent at
radius of curvature 106. The bend area is called a transition zone.
Wires on wiring levels 103 and 104 are shown to be continuous. A
wire on wiring level 102 is shown as wire 102A and 102B which
would, if area 111 were implemented in the more brittle HT
dielectric would break, shown as gap 105. Therefore, area 111 is
implemented using FR dielectric to prevent such breakage in the
transition zone.
[0030] FIG. 1C shows semiconductor chip 150 mounted on flex circuit
101 and a blow-up of the chip, interconnection, and wiring pattern
is shown. Semiconductor chip 150 is mounted on flex circuit 101
using a surface connect element 161 to plating 170 and dropping
down to an upper level wiring signal via 171. In an electronic
enclosure protecting a sensitive circuit, flex circuit 101 may be
formed against a concave section of the electronic enclosure and
held there using adhesive 465 as shown, e.g., in FIG. 4A, and
described later. An attempt to tamper with the electronic enclosure
by drilling would break one or more of the wiring pattern on the
wiring levels, thereby detecting the tampering attempt.
[0031] FIGS. 4A and 4B show an electronic enclosure 400, a top view
in FIG. 4B and a cross sectional view at B-B in FIG. 4A. Electronic
enclosure 400 comprises a housing top 402, a housing bottom 401 and
a cavity 403. Flex circuits 101A and 101B are shown formed into the
concavities of housing top 402 and housing bottom 401 and adhered
with adhesive 465 to the contours of housing top 402 and housing
bottom 401. HT area 110 and FR area 111 are shown in top view 4B
and in cross sectional view 4A. In cross sectional view 4A, the
double arrow line referenced 110, flex circuits 101A and 101B use
HT area 110; in the two double arrowed lines referenced 111, flex
circuits 101A and 101B use FR area 111 where a transition area
occurs in housing top 402 and housing bottom 401 to accommodate the
bends in the transition areas. In the flat area in the center of
cavity 403, HT area 110 is used to take advantage of the more
desirable dielectric parameters of the HT dielectric. In practice,
the majority of housing top 402 and housing bottom 401 would
typically be covered by HT area, as shown in FIG. 8. Currently,
FIGS. 4A and 4B are drawn to accentuate the curved areas, which in
practice, will typically be small compared to the actual size of
the electronic enclosure (see FIG. 8 for more typical curved
areas). For example, HT area 110 may be 90% or greater of the area
in FIG. 4B and FT area 111 may be 10% or less of the area in FIG.
4B. The concentric rectangle arrangement shown in FIG. 4B
facilitates laminations of the two dissimilar materials (i.e., HT
area 110 and FT area 111) with different lamination temperatures.
HT area 110 is laminated at about 300.degree. C. and FR area 111 is
laminated at about 200.degree. C.
[0032] FIG. 4C shows the electronic enclosure 400, including a
cross section of printed circuit board (PCB) 470 sandwiched between
flex circuit 101A and 101B as shown. PBC 470 may be adhered to flex
circuits 101A and 101B with adhesive 465. PCB 470 may have a
semiconductor chip 471 and a battery 472 electrically and
mechanically attached. Sensitive information such as cryptographic
keys may be stored in semiconductor chip 471. Battery 472 may
supply energy to destroy the sensitive information in semiconductor
chip 471 when tampering with electronic enclosure 400 is
detected.
[0033] FIG. 5 is an example of an electronic enclosure 500. Flex
circuit 101 is shown with a 180 degree bend. Electronic enclosure
500 is shown in cross section and comprises housing bottom 501,
housing top 502, and flex circuit 101. It is understood that
semiconductor chips or other electronic components may be mounted
on flex circuit 101, but for simplicity are not shown in FIG. 5.
Flex circuit 101 is shown having a 180 degree bend and is folded
back against itself at a transition zone where the fold occurs,
resulting in a small radius of curvature at the bend. HT areas 110
are shown used in the flat sections of flex circuit 101 and FR area
111 is shown at the bend. As before, this provides large areas of
flex circuit 101 having the desirable characteristics of HT
dielectric, and a relatively small area of flex circuit 101 that
gives up the desirable characteristics of HT dielectric but gains
the flexibility of the FR dielectric in the bend area. Flex circuit
101 is bonded to housing bottom 501 and housing top 502 using
adhesive 465. Housing top 502 and housing bottom 501 may be
attached where they meet by adhesive, screws, or other known
attachment method.
[0034] Referring now to FIG. 2A, raw materials for area 111 of flex
circuit 101 are shown as raw materials before etching and
lamination. Dielectric area 111 is the "FR" dielectric area which
is used where flex circuit 101 must bend with a small radius of
curvature. A "small radius of curvature" means that area 111 can
reliably bend at that radius of curvature but area 110 cannot be
reliably bend at that radius of curvature. The exemplary flex
circuit 101 used for exemplary purposes in FIGS. 2A, 2B, 2C (for FR
area 111 dielectric) and in FIGS. 3A, 3B, and 3C show three cores,
but more or fewer cores are contemplated.
[0035] FIG. 2A shows referenced numbered layers and thicknesses of
each layer.
[0036] "Core 1" 201 comprises 0.35 mil copper (Cu) metallization
202 and 204, and 1.0 mil polyimide 203. As mentioned earlier, core
201 may be AP7163E.
[0037] "Bonding film 1" 231 comprises 0.50 mil FR adhesive layers
232 and 234, and 0.5 mil polyimide 233.
[0038] "Core 2" 211 comprises 0.35 mil metallization layers 212 and
214, and 1.0 mil polyimide 213. Core 311 may be AP7163E.
[0039] "Bonding film 2" 241 comprises 0.50 mil FR adhesive layers
242 and 244, and 0.5 mil polyimide 243.
[0040] "Core 3" 221 comprises 0.35 mil metallization layers 222 and
224, and 1.0 mil polyimide 223. Core 201 may be AP7163E.
[0041] FIG. 2B shows a cross section of the raw material layers of
FIG. 2A after etching the metallization layers. As shown, a 50%
etching is done to produce a fine line pattern. In an embodiment,
the fine line pattern has wiring going in the same direction, but
alternating wiring layers have wires and spaces alternating as
shown. This may be useful to prevent drilling through the flex
circuit 101 without breaking a wire on a wiring layer. Top
metallization layer 202 and bottom metallization layer 224 are
shown in FIG. 2B as not being etched; however, portions of
metallization layers 202 and 224 may be etched in a pattern to
provide metal connections to circuits such as semiconductor chips
150 and 151.
[0042] FIG. 2C shows a cross section of the raw material layers of
FIG. 2B after lamination. Note that the flex circuit 111 is 6.7
mils thick. Metallization layers 202 and 224 have been removed in
this cross section. Reference numbers refer to the same levels as
shown in FIGS. 2A and 2B.
[0043] With reference now to FIG. 3A, raw materials for area 110 of
flex circuit 101 are shown as raw materials before etching and
lamination. Dielectric area 110 is the "HT" dielectric area which
is used where flex circuit 101 may bend with a relatively large
radius of curvature or a flat area. FIG. 3A shows referenced
numbered layers and thicknesses of each layer.
[0044] "Core 1" 301 in FIG. 3A is the same as "Core 1" 201 in FIG.
2A but will be referenced as "core 1" 301, and comprises 0.35 mill
Cu metallization layers 302, 304, and 1.0 mil polyimide layer 303.
Core 301 may be AP7163E such as Pyralux.RTM.AP (AP7163E,
DuPont).
[0045] "Bonding layer 1" 331 comprises 1.50 mil HT polyimide
333.
[0046] "Core 2" 311 comprises 035 mil Cu layers 312, 314, and 1.0
mil polyimide 313. Core 311 may be AP7163E.
[0047] "Bonding film 2" 341 comprises 1.50 mil HT polyimide
343.
[0048] "Core 3" 321 comprises 0.35 mil Cu layers 322, 324, and 1.0
mil polyimide 323. Core 321 may be AP7163E.
[0049] FIG. 3B shows the raw materials, with same reference
numbers, as FIG. 3A, with patterns etched in metallized layers 304,
312, 314, and 322. As with the FR area cross sections earlier,
metallized layers 302 and 324 may or may not be etched.
[0050] FIG. 3C shows a cross section of flex circuit 101 in a
section 110 "HT" area. Reference numbers are the same as cited
earlier.
[0051] The thickness of flexible circuit HT area 110 after
lamination is 6.7 mils, as shown in FIG. 3C. This is the same
thickness as flexible circuit FR section 111 as shown in FIG. 2C.
The core sections are of the same materials and thickness for the
areas 111 and 110. The adhesive bondply sections for the FR area
111 and the HT area 110 must be specified such that, after
lamination, the thickness of flex circuit 101 is of uniform
thickness.
[0052] While the drawings, for simplicity, show cores separately
(i.e., cores 201, 211, and 221 separate from cores 301, 311, and
321), these cores include all the wiring in flex circuit 101 and
these cores are continuous. For example cores 201 and 301 are the
same core extending the length of flex circuit 101; likewise cores
211 and 311 are the same core extending the length of flex circuit
101; and cores 221 and 321 are the same core extending the length
of flex circuit 101. In contrast the bonding films for the FR areas
111 (references 231 and 241) and the HT areas 110 (references 331
and 341) are separate and must be against each other at junctions
where the FR areas 111 and HT areas 110 join.
[0053] With reference now to FIG. 6, an embodiment is shown that
increases likelihood or tearing and breaking one or more wires on
flex circuit 101 when the electronic enclosure is pried open in a
tampering event. Electronic enclosure 400 (FIGS. 4A, 4B, and 4C),
shown for simplicity as a portion of electronic enclosure 400
beyond dotted line 640, when pried open, will break wiring in at
least one of areas 111 and 110. Adhesive 465, such as an epoxy or
other strong adhesive, will resist the pry and cause wire breakage
in flex circuit 101. FR area 111 is shown in curved area 631 to
accommodate a small radius of curvature of FR area 631 as first
layer 611 and second layer 621. Curved area 631 may occur when flex
circuit 101 is formed into a cavity 403 as shown in FIG. 4A. As
shown in FIG. 6, areas of FR area 111 on first layer 611 overlap
areas of HT area 110 on second layer 621 as shown by dotted line
630, where an FR area 111 on first layer 611 overlaps a boundary
between FR area 111 and HT area 110 on second layer 621. If the
electronic enclosure is pried open, the overlap structure will
greatly increase likelihood of tearing on both FR area 111 and HT
area 110, breaking wiring and thereby detecting a tampering of the
electronic enclosure.
[0054] FIG. 7 shows another embodiment that increases likelihood of
tearing and breaking wiring flex circuit 101 if the electronic
enclosure 400 is pried open. Again, for simplicity, only a portion
of layer 711 is shown, cut at dotted line 740. In this embodiment,
on a single layer of flex circuit 101, portions of FR area 111 and
HT area 110 alternate and extend to an edge of flex circuit 101,
including over curved area 731. It is understood that, in this
embodiment, electronic enclosure 400, the radius of curvature must
accommodate minimum radius of curvature of HT area 110.
[0055] FIG. 8 shows another embodiment that increases likelihood of
tearing and breaking wiring if the electronic enclosure 400 is
pried open. This embodiment may also be included as a variant of
embodiments described previously. A top view of housing bottom 401
(of electronic enclosure 400 of FIGS. 4A and 4B) is shown. An
enlarged section 801 shows a serpentine wiring pattern in HT area
110, in a flat area near the edge of housing bottom 401. Gaps 802
are "slits" in one or more layers having wiring in flex circuit
101. FR area 111 was shown at the edge of flex circuit 101 in FIGS.
4A and 4B to be at the edges of electronic enclosure 400. In the
embodiment of FIG. 8, since the edge of housing bottom 401 is flat
around the periphery, as shown, HT area 110 may be used on the flat
portion to take advantage of his desirable electrical properties,
with FR area 111 used to handle the small radius of curvature to
the flat bottom portion of housing bottom 401 in enclosure 400
(FIGS. 4A, 4B). As shown in FIGS. 4A and 4B, HT area 110 would also
be used for the flat bottom portion. Lamination process would,
again, manage laminating both HR area 110 areas using a temperature
of about 300.degree. C., and the FR Area 111 ring inside the
periphery of housing bottom 401 of electronic enclosure 400 at a
temperature of about 200.degree. C. Different lamination
temperatures may be done by sequentially laminating the HT area 110
which has the hotter temperature of about 300.degree. C. followed
by laminating the FR area 111 which has the cooler temperature of
about 200.degree. C. Alternatively, the two-temperature lamination
may be accomplished by using two plates at different temperatures
that correlate to the pattern between the HR area 110 and FR area
111.
[0056] FIG. 9 shows an exemplary plot of dielectric leakage in
decibels (dB) versus frequency in kilohertz (kHz). By way of
example, a range for the vertical axis can span from approximately
-92 dB, at the bottom, to -70 dB, at the top. Similarly, a range
for the horizontal axis can span from approximately 0 kHz to 1.0
kHz. Wiring in any of the layers of flex circuit 101 may need to
carry relatively high frequency signals or occasional pulses having
high frequency components. The plot shows very significant power
losses in FR areas 111 shown in FR dielectric 902 in FIG. 9 versus
HT 110 areas shown as HT dielectric 904 in FIG. 9. In a tamper
detection application, energy from a battery (e.g., battery 152 in
FIGS. 1A and 1B) inside electronic enclosure 400 may need to
destroy sensitive information on a semiconductor chip (150, 151)
inside electronic enclosure 400. The sensitive information may be,
for example, cryptographic keys. An action that signals a
discontinuity in the wiring may include deleting encryption keys
within the electronic enclosure. In some embodiments, the minimum
operational life of a battery can be specified by a published
cryptosecurity specification such as the U.S. Government Federal
Information Processing Standard (FIPS) 140-2 Security Requirement
for Cryptographic Modules. In such applications, conservation of
energy stored in the battery is important.
[0057] FIG. 10 shows method 1000 which may be used to make a flex
circuit using HT areas where HT dielectric areas can be reliably
used and FR areas where HT dielectric cannot be reliably used.
[0058] In step 1010 a core material is selected having conducing
material on at least one side that can be etched into wiring.
[0059] In step 1012 a first bonding layer is selected that
comprises a dielectric and an adhesive on at least one side of the
dielectric and supports a first radius of curvature. The first
bonding layer has a thickness when laminated to the core
material.
[0060] In step 1014 a second bonding layer is selected. The second
bonding layer has at least one electrical (e.g., leakage) or
mechanical characteristic (e.g., temperature coefficient of
expansion) more desirable than the same electrical or mechanical
characteristic of the first bonding layer. The second bonding layer
cannot reliably be bent at the first radius of curvature. The
second bonding layer has the thickness when laminated to the core
material.
[0061] In step 1016 a determination is made in an electronic
enclosure one or more areas where a bend of the first radius of
curvature is required.
[0062] In step 1018 a determination is made in the electronic
enclosure of areas where the second bonding layer can reliably be
used.
[0063] In step 1020 the first bonding layer is laminated to the
core material in the one or more areas where a bend of the first
radius of curvature is required and the second bonding layer is
laminated to the core material in one or more areas where the
second bonding layer can reliably be used.
* * * * *