U.S. patent application number 16/313272 was filed with the patent office on 2019-05-23 for p-type oxide semiconductor and method for manufacturing same.
This patent application is currently assigned to FLOSFIA INC.. The applicant listed for this patent is FLOSFIA INC., KYOTO UNIVERSITY. Invention is credited to Shizuo FUJITA, Toshimi HITORA, Kentaro KANEKO, Tomochika TANIKAWA.
Application Number | 20190157380 16/313272 |
Document ID | / |
Family ID | 60786019 |
Filed Date | 2019-05-23 |
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United States Patent
Application |
20190157380 |
Kind Code |
A1 |
FUJITA; Shizuo ; et
al. |
May 23, 2019 |
P-TYPE OXIDE SEMICONDUCTOR AND METHOD FOR MANUFACTURING SAME
Abstract
A new and useful p-type oxide semiconductor with a wide band gap
and an enhanced electrical conductivity and the method of
manufacturing the p-type oxide semiconductor are provided. A method
of manufacturing a p-type oxide semiconductor including: generating
atomized droplets by atomizing a raw material solution containing
at least a d-block metal in the periodic table and a metal of Group
13 of the periodic table; carrying the atomized droplets onto a
surface of a base by using a carrier gas; causing a thermal
reaction of the atomized droplets adjacent to the surface of the
base under an atmosphere of oxygen to form the p-type oxide
semiconductor on the base.
Inventors: |
FUJITA; Shizuo; (Kyoto,
JP) ; KANEKO; Kentaro; (Kyoto, JP) ; HITORA;
Toshimi; (Kyoto, JP) ; TANIKAWA; Tomochika;
(Kyoto, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
FLOSFIA INC.
KYOTO UNIVERSITY |
Kyoto
Kyoto |
|
JP
JP |
|
|
Assignee: |
FLOSFIA INC.
Kyoto
JP
KYOTO UNIVERSITY
Kyoto
JP
|
Family ID: |
60786019 |
Appl. No.: |
16/313272 |
Filed: |
June 30, 2017 |
PCT Filed: |
June 30, 2017 |
PCT NO: |
PCT/JP2017/024275 |
371 Date: |
December 26, 2018 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 29/808 20130101;
H01L 29/12 20130101; H01L 29/812 20130101; H01L 21/02579 20130101;
H01L 29/47 20130101; H01L 21/02565 20130101; H01L 21/0242 20130101;
H01L 29/778 20130101; H01L 29/739 20130101; H01L 33/02 20130101;
C23C 16/40 20130101; H01L 29/872 20130101; H01L 29/06 20130101;
H01L 29/78 20130101; H01L 21/02628 20130101; H01L 33/26 20130101;
H02M 3/28 20130101; C23C 16/4481 20130101; H01L 29/24 20130101;
H01L 29/7391 20130101 |
International
Class: |
H01L 29/06 20060101
H01L029/06; H01L 29/47 20060101 H01L029/47; H01L 29/739 20060101
H01L029/739; H01L 29/778 20060101 H01L029/778; H01L 29/78 20060101
H01L029/78; H01L 29/808 20060101 H01L029/808; H01L 29/812 20060101
H01L029/812; H01L 29/872 20060101 H01L029/872; H01L 33/26 20060101
H01L033/26 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 30, 2016 |
JP |
2016-131156 |
Claims
1. A method of manufacturing a p-type oxide semiconductor
comprising: generating atomized droplets by atomizing a raw
material solution comprising at least a d-block metal in the
periodic table and a metal of Group 13 of the periodic table;
carrying the atomized droplets onto a surface of a base by using a
carrier gas; and causing a thermal reaction of the atomized
droplets adjacent to the surface of the base under an atmosphere of
oxygen to form the p-type oxide semiconductor on the base.
2. The method according to claim 1, wherein the d-block metal
comprises a transition metal.
3. The method according to claim 1, wherein the d-block metal
comprises a metal of Group 9 of the periodic table.
4. The method according to claim 3, wherein the metal of Group 9
comprises rhodium, iridium or cobalt.
5. The method according to claim 1, wherein the metal of Group 13
comprises at least one metal selected from among indium, aluminum,
and gallium.
6. The method according to claim 1, wherein the thermal reaction is
conducted at a temperature that is 750.degree. C. or lower.
7. A p-type oxide semiconductor comprising: a metal oxide as a
major component, the metal oxide comprising a d-block metal in the
periodic table and a metal of Group 13 of the periodic table.
8. The p-type oxide semiconductor according to claim 7, wherein the
d-block metal comprises a transition metal.
9. The p-type oxide semiconductor according to claim 7, wherein the
d-block metal comprises a metal of Group 9 of the periodic
table.
10. The p-type oxide semiconductor according to claim 9, wherein
the metal of Group 9 comprises rhodium, iridium, or cobalt.
11. The p-type oxide semiconductor according to claim 7, wherein
the metal of Group 13 comprises at least one metal selected from
among indium, aluminum, and gallium.
12. A semiconductor device comprising: a semiconductor layer
comprising the p-type oxide semiconductor according to claim 7; and
an electrode.
13. The semiconductor device according to claim 12, further
comprising: an n-type semiconductor layer comprising as a major
component an oxide semiconductor that comprises a metal of Group 13
of the periodic table.
14. The semiconductor device according to claim 13, wherein the
metal of Group 13 comprises at least one metal selected from among
indium, aluminum, and gallium.
15. A semiconductor system comprising: the semiconductor device
according to claim 12.
Description
TECHNICAL FIELD
[0001] The present invention relates to a p-type oxide
semiconductor. Also, the present invention relates to a method for
manufacturing a p-type oxide semiconductor. The present invention
also relates to a semiconductor device including a p-type oxide
semiconductor. Furthermore, the present invention relates to a
semiconductor system including a p-type oxide semiconductor.
BACKGROUND ART
[0002] As a switching device of the next generation achieving high
withstand voltage, low losses, and high temperature resistance,
semiconductor devices using gallium oxide (Ga.sub.2O.sub.3) with a
large band gap attract attention and are expected to be applied to
power semiconductor devices including an inverter. Also, gallium
oxide is expected to be applied to a light emitting and receiving
element such as a light emitting diode (LED) and a sensor, since
gallium oxide has a wide band gap. According to NPL 1, such gallium
oxide has a band gap that may be controlled by forming mixed
crystal with indium or aluminum singly or in combination and such a
mixed crystal is extremely attractive materials as InAlGaO-based
semiconductors. Here, InAlGaO-based semiconductors refers to
In.sub.XAl.sub.YGa.sub.ZO.sub.3 (0.ltoreq.X.ltoreq.2,
0.ltoreq.Y.ltoreq.2, 0.ltoreq.Z.ltoreq.2, X+Y+Z=1.5.about.2.5) and
can be viewed as the same material system containing gallium
oxide.
[0003] In recent years, gallium oxide based p-type semiconductors
have been studied. For example, PTL 1 describes a base showing
p-type conductivity to be obtained by forming a
.beta.-Ga.sub.2O.sub.3-based crystal by floating zone method using
MgO (p-type dopant source). Also, PTL 2 discloses to form a p-type
semiconductor by using an ion implantation of a p-type dopant into
.alpha.-(AlxGa.sub.1-X).sub.2O.sub.3 single crystalline film
obtained by Molecular Beam Epitaxy (MBE) method. However, NPL 2
discloses that a p-type semiconductor was not obtained by the
methods disclosed in PTLs 1 and 2 (NPL 2). In fact, there has been
no reports of any success in forming p-type semiconductor by use of
the methods disclosed in PTLs 1 and 2. Therefore, feasible p-type
oxide semiconductor and a method of manufacturing a p-type oxide
semiconductor have been desired.
[0004] Also, NPLs 3 and 4 disclose a use of Rh.sub.2O.sub.3 or
ZnRh.sub.2O.sub.4 as a p-type semiconductor, for example.
Nevertheless, Rh.sub.2O.sub.3 has a problem that the raw material
concentration becomes thin, which affects forming films. It was
difficult to produce a single crystal of Rh.sub.2O.sub.3 even if
using an organic solvent. Also, when Hall effect measurement was
conducted, Rh.sub.2O.sub.3 and ZnRh.sub.2O.sub.4 were not
determined to be p-type or the measurement itself could not be
done. Further, for example, Hall coefficient of these
semiconductors were measurement limit (0.2 cm.sup.3/C) or less and
they were not useful at all. As for ZnRh.sub.2O.sub.4 has a low
mobility and a narrow band gap and thus, cannot be used as LED or
power devices. Therefore, Rh.sub.2O.sub.3 and ZnRh.sub.2O.sub.4
were not necessarily satisfactory.
CITATION LIST
Patent Literature
[0005] PTL 1: JP2005-340308A
[0006] PTL 2: JP2013-58647A
[0007] Non Patent Literature
[0008] NPL 1: Kaneko, Kentaro, "Fabrication and physical properties
of corundum structured alloys based on gallium oxide",
Dissertation, Kyoto Univ., March 2013
[0009] NPL 2: Tatsuya, Takemoto, EE Times, Japan "power device
gallium oxide" Thermal conductivity, p-type . . . overcoming issues
and putting it into practical use. [online], Retrieved Jun. 21,
2016, from http://eetimes.jp/ee/articles/1402/27/news028_2.html
[0010] NPL 3: F. P. KOFFYBERG et al., "optical bandgaps and
electron affinities of semiconducting Rh2O3(I) and Rh2O3(III)", J.
Phys. Chem. Solids Vol. 53, No. 10, pp. 1285-1288, 1992
[0011] NPL 4: Hideo Hosono, "Functional development of oxide
semiconductor" Physics Research, Electronic version, Vol. 3, No. 1,
031211 (Merger issue of September 2013 and February 2014)
SUMMARY OF INVENTION
Technical Field
[0012] It is an object of a present inventive subject matter to
provide a new and useful p-type oxide semiconductor with electrical
conductivity. It is also an object of a present inventive subject
matter to provide a method of manufacturing a p-type oxide
semiconductor.
Solution to Problem
[0013] As a result of keen examination to achieve the object, the
present inventors learned that a method of manufacturing a p-type
oxide semiconductor including: generating atomized droplets by
atomizing a raw material solution containing at least a d-block
metal in the periodic table and a metal of Group 13 of the periodic
table; carrying the atomized droplets onto a surface of a base by
using a carrier gas; and causing a thermal reaction of the atomized
droplets adjacent to the surface of the base under an atmosphere of
oxygen to form the p-type oxide semiconductor on the base can form
a p-type oxide semiconductor with enhanced electrical conductivity.
Furthermore, the obtained p-type oxide semiconductor is useful for
semiconductor device using Ga.sub.2O.sub.3 that has a wide band
gap. They then found that such a p-type oxide semiconductor and the
method of manufacturing the p-type oxide semiconductor are capable
of solving the conventional problem as mentioned above.
[0014] After learning the above findings, the present inventors
have made further research to complete the present invention. That
is, the present invention relates to the followings. [0015] [1] A
method of manufacturing a p-type oxide semiconductor including:
generating atomized droplets by atomizing a raw material solution
including at least a d-block metal in the periodic table and a
metal of Group 13 of the periodic table; carrying the atomized
droplets onto a surface of a base by using a carrier gas; and
causing a thermal reaction of the atomized droplets adjacent to the
surface of the base under an atmosphere of oxygen to form the
p-type oxide semiconductor on the base. [0016] [2] The method of
[1] above, wherein the d-block metal includes a transition metal.
[0017] [3] The method of [1] or [2] above, wherein the d-block
metal includes a metal of Group 9 of the periodic table. [0018] [4]
The method of [3] above, wherein the metal of Group 9 includes
rhodium, iridium or cobalt. [0019] [5] The method of any of [1] to
[4] above, wherein the metal of Group 13 includes at least one
metal selected from among indium, aluminum, and gallium. [0020] [6]
The method any of [1] to [5] above, wherein the thermal reaction is
conducted at a temperature that is 750.degree. C. or lower. [0021]
[7] A p-type oxide semiconductor including: a metal oxide as a
major component, the metal oxide including a d-block metal in the
periodic table and a metal of Group 13 of the periodic table.
[0022] [8] The p-type oxide semiconductor of [7] above, wherein the
d-block metal includes a transition metal. [0023] [9] The p-type
oxide semiconductor of [7] or [8] above, wherein the d-block metal
includes a metal of Group 9 of the periodic table. [0024] [10] The
p-type oxide semiconductor of [9] above, wherein the metal of Group
9 includes rhodium, iridium, or cobalt. [0025] [11] The p-type
oxide semiconductor of any of [7] to [10] above, wherein the metal
of Group 13 includes at least one metal selected from among indium,
aluminum, and gallium. [0026] [12] A semiconductor device
including: a semiconductor layer including the p-type oxide
semiconductor of any of [7] to [11] above; and an electrode. [0027]
[13] The semiconductor device of [12] above, further including: an
n-type semiconductor layer including as a major component an oxide
semiconductor that includes a metal of Group 13 of the periodic
table. [0028] [14] The semiconductor device of [13] above, wherein
the metal of Group 13 includes at least one metal selected from
among indium, aluminum, and gallium. [0029] [15] A semiconductor
system including: the semiconductor device of any of [12] to [14]
above.
Advantageous Effects of Invention
[0030] The p-type oxide semiconductor of a present inventive
subject matter is sufficient in electrical conductivity and in
semiconductor properties as a p-type semiconductor. The method of
manufacturing a p-type oxide semiconductor of the present invention
is capable of producing the above-mentioned p-type oxide
semiconductor industrially advantageously.
BRIEF DESCRIPTION OF THE DRAWINGS
[0031] FIG. 1 shows a schematic diagram of a mist chemical vapor
deposition (CVD) apparatus that may be used according to an
embodiment of the present inventive subject matter.
[0032] FIG. 2 shows a measurement result of an embodiment measured
by an X-ray diffraction (XRD). The horizontal axis indicates an
angle of diffraction (deg.) and the vertical axis indicates an
intensity of diffraction (arb. Unit)
[0033] FIG. 3 shows a schematic view of an embodiment of a Schottky
barrier diode (SBD) according to a present inventive subject
matter.
[0034] FIG. 4 shows a schematic view of an embodiment of a high
electron mobility transistor (HEMT) according to the present
inventive subject matter.
[0035] FIG. 5 shows a schematic view of an embodiment of a metal
oxide semiconductor field effect transistor (MOSFET) according to
the present inventive subject matter.
[0036] FIG. 6 shows a schematic view of an embodiment of junction
field effect transistor (JFET) according to the present inventive
subject matter.
[0037] FIG. 7 shows a schematic view of an embodiment of insulated
gate bipolar transistor (IGBT) according to the present inventive
subject matter.
[0038] FIG. 8 shows a schematic view of an embodiment of light
emitting diode (LED) according to the present inventive subject
matter.
[0039] FIG. 9 shows a schematic view of an embodiment of light
emitting diode (LED) according to the present inventive subject
matter.
[0040] FIG. 10 shows a schematic view of a power system according
to an embodiment of the present inventive subject matter.
[0041] FIG. 11 shows a schematic view of a system device according
to an embodiment of the present inventive subject matter.
[0042] FIG. 12 shows a schematic view of a circuit diagram of power
supply circuit of a power device according to an embodiment of the
present inventive subject matter.
DESCTIPTION EMBODIMENTS
[0043] Hereinafter, embodiments of a present inventive subject
matter will be described in detail.
[0044] A p-type oxide semiconductor of the present inventive
subject matter includes a p-type semiconductor containing a metal
oxide as a major component and the metal oxide contains a d-block
metal in the periodic table and a metal of Group 13 of the periodic
table. The term "p-type oxide semiconductor" herein means an oxide
semiconductor which is a p-type semiconductor. The p-type oxide
semiconductor may be a crystal. Also, the p-type oxide
semiconductor may be an amorphous. The term "metal oxide" herein
means a material including a metal element and oxygen. The term
"major component" herein means that the p-type oxide semiconductor
contains a metal oxide that is 50% or more at atomic ratio in all
the components in the p-type oxide semiconductor. According to an
embodiment of the present inventive subject matter, the p-type
oxide semiconductor may preferably contain the metal oxide that is
70% or more at atomic ratio in all the components in the p-type
oxide semiconductor. For the present inventive subject matter, the
p-type oxide semiconductor may further preferably contain the metal
oxide that is 90% or more at atomic ratio in all the components in
the p-type oxide semiconductor. The p-type oxide semiconductor may
contain the metal oxide that is 100% at atomic ratio in all the
components in the p-type oxide semiconductor. The term "periodic
table" herein means the periodic table defined by the International
Union of Pure and Applied Chemistry (IUPAC). The term "d-block
metal" herein means an element that has electrons that fill the 3d,
4d, 5d, and 6d orbitals.
[0045] Examples of a d-block metal in the periodic table nclude at
least one metal selected from among scandium (Sc), titanium (Ti),
vanadium (V), chromium (Cr), manganese (Mn), iron (Fe), cobalt
(Co), nickel (Ni), copper (Cu), zinc (Zn), yttrium (Y), zirconium
(Zr), niobium (Nb), molybdenum (Mo), technetium (Tc), ruthenium
(Ru), rhodium (Rh), palladium (Pd), silver (Ag), cadmium (Cd),
lutetium (Lu), hafnium (Hf), tantalum (Ta), tungsten (W), rhenium
(Re), osmium (Os), iridium (Ir), platinum (Pt), gold (Au), mercury
(Hg), laurenzium (Lr), rutherfordium (Rf), dobnium (Db), seaborgium
(Sg), bohrium (Bh), hassium (Hs), meitnerium (Mt), darmstadtium
(Ds), roentgenium (Rg), and copernicium (Cn). According to an
embodiment of the present inventive subject matter, the d-block
metal in the periodic table may be a transition metal, may
preferably be a metal of Group 9 of the periodic table, may be
further preferably at least one metal selected from among rhodium,
iridium and cobalt, and may be most preferably iridium. According
to an embodiment of the present inventive subject matter, it is
also preferable that the d-block metal includes Cr or Cu to
increase a band gap of the p-type oxide semiconductor. The d-block
metal is preferably contained to be 10% or more in atomic ratio in
the major component except oxygen of the metal oxide. The d-block
metal is further preferably in a range of 20% to 95% in atomic
ratio in the major component except oxygen of the metal oxide.
[0046] Examples of the metal of Group 13 in the periodic table
include aluminum (Al), gallium (Ga), indium (In), and thallium (Tl)
and a combination of two or more metals thereof. According to an
embodiment of the present inventive subject matter, the metal of
Group 13 may preferably include at least one metal selected from
among indium, aluminum, and gallium. According to an embodiment of
the present inventive subject matter, the metal of Group 9 may
further preferably include gallium or aluminum. According to an
embodiment of the present inventive subject matter, if gallium is
used as the metal of Group 13 of the periodic table, a wider
bandgap is preferable. According to an embodiment of the present
inventive subject matter, the metal of Group 13 may be contained to
be 1% or more in atomic ratio in the major component except oxygen
of the metal oxide, and further preferably to be 5% or more in
atomic ratio in the major component except oxygen of the metal
oxide.
[0047] Also, according to an embodiment of the present inventive
subject matter, in case that the metal of Group 13 is at least one
metal selected from among indium (In), aluminum (Al) and gallium
(Ga), the d-block metal is preferably a metal selected from among
metals of Group 4 to Group 9 for a reason that the p-type oxide
semiconductor would obtain an enhanced p-type semiconductor
property. The metal of Group 9 is further preferable.
[0048] The p-type oxide semiconductor is preferably obtained, by
generating atomized droplets by atomizing a raw material solution
including at least a d-block metal in the periodic table and a
metal of Group 13 of the periodic table at (forming atomized
droplets) as mentioned below, carrying the atomized droplets onto a
surface of a base by using a carrier gas at (carrying atomized
droplets) as mentioned below, and causing a thermal reaction of the
atomized droplets adjacent to the surface of the base under an
atmosphere of oxygen to form a p-type oxide semiconductor at
(film-formation) as mentioned below.
(Forming Atomized Droplets)
[0049] In forming atomized droplets, a raw material solution is
atomized to generate atomized droplets. A raw material solution may
be atomized by a known method, and the method is not particularly
limited, however, according to an embodiment of the present
inventive subject matter, the raw material solution is preferably
atomized by use of ultrasonic vibration. Atomized droplets obtained
by using ultrasonic vibration have an initial velocity that is zero
and floats in the space. Since atomized droplets floating in the
space are carriable as a gas, the atomized droplets floating in the
space are preferable to avoid damage caused by the collision energy
without being blown like a spray. The size of droplets is not
limited to a particular size, and may be a few mm, however, the
size of the atomized droplets is preferably 50 .mu.m or less. The
size of the atomized droplets is preferably in a range of 0.1 .mu.m
to 10 .mu.m.
(Raw Material Solution)
[0050] If the raw material solution contains the d-block metal and
the metal of Group 13, the raw material solution is not
particularly limited, and thus may contain an inorganic material
and/or an organic material. However, according to an embodiment of
the present inventive subject matter, the raw material solution
containing the d-block metal and the metal of Group 13 in the form
of complex or salt, and dissolved or dispersed in an organic
solvent or water may be used. Examples of the form of the complex
include acetylacetonate complexes, carbonyl complexes, ammine
complexes, hydride complexes. Also, examples of the form of salt
include organic metal salts (e.g., metal acetate, metal oxalate,
metal citrate, etc.), metal sulfide salt, metal nitrate salt, metal
phosphate salt, metal halide salt (e.g., metal chloride salt, metal
bromide salt, metal iodide salt, etc.). According to a mist CVD
method of the present inventive subject matter, the film formation
may be preferably performed even when the raw material
concentration is low.
[0051] A solvent of the raw material solution is not particularly
limited, and thus, the solvent may be an inorganic solvent that
includes water. The solvent may be an organic solvent that includes
alcohol. The solvent may be a mixed solvent of the inorganic
solvent and the organic solvent. According to an embodiment of the
present inventive subject matter, unlike the conventional
film-forming methods, the solvent may preferably contain water.
Also, according to an embodiment of the present inventive subject
matter, the solvent may be a mixed solvent of water and acid.
Examples of water include pure water, ultrapure water, tap water,
well water, mineral water, hot spring water, spring water, fresh
water and ocean water. Examples of acid include inorganic acids
such as hydrochloric acid, nitric acid, sulfuric acid, or organic
acid such as acetic acid, propionic acid, and butanoic acid.
(Base)
[0052] The base is not particularly limited if the base is capable
of supporting the p-type oxide semiconductor. The material for the
base is also not particularly limited if an object of the present
inventive subject matter is not interfered with, and the base may
be a base of a known material. Also, the base may contain an
organic compound and/or inorganic compound. Also, the base may be
in any shape and may be valid for all shapes. Examples of the shape
of the base include a plate shape, a flat shape, a disc shape, a
fibrous shape, a rod shape, a cylindrical shape, a prismatic shape,
a tubular shape, a spiral shape, a spherical shape, and a ring
shape. According to an embodiment of the present inventive subject
matter, a base may be preferably a substrate. Also, according to an
embodiment of the present inventive subject matter, the thickness
of the substrate is not particularly limited.
[0053] According to an embodiment of the present inventive subject
matter, the substrate is not particularly limited if the substrate
is capable of supporting the p-type oxide semiconductor and if the
substrate is a plate shape. The substrate may be an
electrically-insulating substrate, a semiconductor substrate or an
electrically-conductive substrate, and also a substrate including
film a metal on its surface. Examples of the substrate include a
base substrate containing a substrate material with a corundum
structure as a major component. The term "major component" herein
means, for example, an atomic ratio of a substrate material with a
certain crystal structure in all the elements in a substrate
material may be 50% or more. According to an embodiment of the
present inventive subject matter, the atomic ratio of the substrate
material with a certain crystal structure in all the metal elements
in the substrate material may be preferably 70% or more. For the
present inventive subject matter, the atomic ratio of the substrate
material with a certain crystal structure in all the metal elements
in the substrate material may be further preferably 90% or more and
may be 100%.
[0054] Furthermore, a material for the substrate is not
particularly limited if an object of the present inventive subject
matter is not interfered with, and also, the material may be a
known one. Preferable examples of a substrate with a corundum
structure include a sapphire substrate (preferably, a c-plane
sapphire substrate), or an .alpha.-Ga.sub.2O.sub.3 substrate.
(Carrying Atomized Droplets)
[0055] In carrying atomized droplet, the atomized droplets are
delivered into the base by carrier gas. The carrier gas is not
particularly limited if an object of the present inventive subject
matter is not interfered with, and thus, the carrier gas may be
oxygen, ozone, an inert gas such as nitrogen and argon. Also, the
carrier gas may be a reducing gas such as hydrogen gas and/or
forming gas. The carrier gas may contain one or two or more gasses.
Also, a diluted carrier gas at a reduced flow rate (e.g., 10-fold
diluted carrier gas) and the like may be used further as a second
carrier gas. The carrier gas may be supplied from one or more
locations. While the flow rate of the carrier gas is not
particularly limited, the flow rate of the carrier gas may be in a
range of 0.01 to 20 L/min. According to an embodiment of the
present inventive subject matter, the flow rate of the carrier gas
may be preferably in a range of 1 to 10 L/min. When a diluted
carrier gas is used, the flow rate of the diluted carrier gas may
be in a range of 0.001 to 2 L/min. Furthermore, according to an
embodiment of the present inventive subject matter, when a diluted
carrier gas is used, the flow rate of the diluted carrier gas may
be preferably in a range of 0.1 to 1 L/min.
(Film-Formation)
[0056] In the film formation, the p-type oxide semiconductor is
formed on at least a part of the base by a thermal reaction of the
atomized droplets adjacent to the surface of the base. The thermal
reaction is not particularly limited if the atomized droplets react
on heating, and reaction conditions are not particularly limited if
an object of the present inventive subject matter is not impaired.
In the film-formation, the thermal reaction is conducted at an
evaporation temperature or higher temperature of the evaporation
temperature of the solvent of the raw material solution. During the
thermal reaction, the temperature should not be too high. For
example, the temperature during the thermal reaction may be
750.degree. C. or less. The temperature during the thermal reaction
may be preferably 500.degree. C. to 750.degree. C. The thermal
reaction may be conducted in any atmosphere of a vacuum, a
non-oxygen atmosphere, a reducing-gas atmosphere, and an atmosphere
of oxygen. Also, the thermal reaction may be conducted in any
condition of under an atmospheric pressure, under an increased
pressure, and under a reduced pressure. According to an embodiment
of the present inventive subject matter, the thermal reaction is
preferably conducted in an atmosphere of oxygen. Also, according to
an embodiment of the present inventive subject matter, the thermal
reaction is preferably conducted under an atmospheric pressure. The
thermal reaction is further preferably conducted in an atmosphere
of oxygen and under an atmospheric pressure. Also, a film thickness
of the p-type oxide semiconductor is able to be set by adjusting a
film formation time. The film thickness of the p-type oxide
semiconductor may be 1 .mu.m or more and may be 1 .mu.m or less.
When the film thickness of the p-type oxide semiconductor is 1
.mu.m or less, the film thickness may be 500 nm or less, and may be
preferably 100 nm or less, and further preferably is 50 nm to 100
nm. Also, when the film thickness is 1 .mu.m or more, the film
thickness may be 3 .mu.m or more and may be preferably 3 .mu.m to
100 .mu.m.
[0057] According to an embodiment of the present inventive subject
matter, the p-type oxide semiconductor may be provided directly on
the base or may be provided via another layer such as a
semiconductor layer (n-type semiconductor layer, n.sup.--type
semiconductor layer, n.sup.--type semiconductor layer, for example)
that is different from a semiconductor layer of the p-type oxide
semiconductor, an insulating layer including a semi-insulating
layer, or a buffer layer on the base. Examples of the semiconductor
layer and the insulating layer include a semiconductor layer
including the metal of Group 13 of the periodic table and an
insulating layer including the metal of Group 9 Group 13 of the
periodic table. Preferable examples of the buffer layer include a
semiconductor layer with a corundum structure, an insulating layer
with a corundum structure, and a conductive layer with a corundum
structure. Examples of the semiconductor layer may include
.alpha.-Fe.sub.2O.sub.3, .alpha.-Ga.sub.2O.sub.3, or
.alpha.-Al.sub.2O.sub.3. A method of forming the buffer layer on
the base is not particularly limited and may be by use of a method
similarly to a method of forming the p-type oxide semiconductor as
mentioned above.
[0058] The p-type oxide semiconductor obtained by above-mentioned
method is able to be used for a semiconductor device as a p-type
semiconductor layer. The p-type oxide semiconductor is particularly
useful for a power device. Semiconductor devices may be categorized
into lateral devices and vertical devices. In a lateral device, a
first electrode and a second electrode may be formed on one side of
a semiconductor layer. In a vertical device, a first electrode may
be formed on a first side of a semiconductor layer, and a second
electrode may be formed on a second side of the semiconductor
layer. The first side may be positioned opposite to the second side
of the semiconductor layer. According to an embodiment of a present
inventive subject matter, the p-type oxide semiconductor may be
used for the lateral devices and also used for vertical devices.
According to an embodiment of the present inventive subject matter,
the p-type oxide semiconductor may be preferably used for vertical
devices. Examples of the semiconductor device include Schottky
barrier diodes (SBDs), metal semiconductor field-effect transistors
(MESFETs), high-electron-mobility transistors (HEMTs), metal oxide
semiconductor field-effect transistors (MOSFETs), static induction
transistors (SITs), junction field-effect transistors (JFETs),
insulated gate bipolar transistors (IGBTs), and light emitting
diodes.
[0059] FIG. 3 to 9 show examples of using the p-type oxide
semiconductor of the present inventive subject matter as a p-type
semiconductor layer. According to an embodiment of the present
inventive subject matter, an n-type semiconductor may be a
semiconductor containing the same major component as the major
component of the p-type semiconductor layer and an n-type dopant.
The n-type semiconductor may be a semiconductor containing a
different major component that is different from the major
component of the p-type oxide semiconductor. Also, the n-type
semiconductor may be used as an n.sup.--type semiconductor layer or
an n.sup.+-type semiconductor layer by using known method such as
adjusting a concentration of n-type dopant in the n-type
semiconductor.
[0060] FIG. 3 shows a schematic view of an embodiment of a Schottky
barrier diode (SBD) according to the present inventive subject
matter including an n.sup.--type semiconductor layer 101a, an
n.sup.+-type semiconductor layer 101b, a p-type semiconductor layer
102, a metal layer 103, an insulating layer 104, a Schottky
electrode 105a and an Ohmic electrode 105b. The metal layer 103 is
comprised of a metal such as aluminum and covers the Schottky
electrode 105a. FIG. 4 shows a schematic view of an embodiment of a
high-electron-mobility transistor (HEMT) according to the present
inventive subject matter including an n-type semiconductor layer
with wide band gap 121a, an n-type semiconductor layer with narrow
band gap 121b, an n.sup.+-type semiconductor layer 121c, a p-type
semiconductor layer 123, a gate electrode 125a, a source electrode
125b, a drain electrode 125c, and a substrate 129.
[0061] The material of the Schottky electrode and the Ohmic
electrode may be a known electrode material. Examples of such an
electrode material include metals, containing Al, Mo, Co, Zr, Sn,
Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd,
Nd, Ag and/or alloys thereof, metal oxide conductive films such as
tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and
indium zinc oxide (IZO), organic conductive compounds such as
polyaniline, polythiophene, and polypyrrole, and mixtures of these
materials.
[0062] Also, the Schottky electrode and the Ohmic electrode can be
formed by a known method such as vacuum evaporation or sputtering.
For more details, when forming the Schottky electrode, a first
layer containing Mo is formed and a second layer containing Al is
formed on the first layer. Then using photolithography, for
example, can form a pattern at the first layer and at the second
layer.
[0063] Examples of the material of the insulating layer include
GaO, AlGaO InAlGaO, AlInZnGaO.sub.4, Al, Hf.sub.2O.sub.3, SiN,
SiON, Al.sub.2O.sub.3, MgO, GdO, SiO.sub.2, and/or Si.sub.3N.sub.4.
According to an embodiment of the present inventive subject matter,
the insulating layer may preferably contains a corundum structure.
The insulating layer can be formed by a known method such as
sputtering, vacuum evaporation or CVD method.
[0064] FIG. 5 shows a schematic view of an embodiment of a metal
oxide semiconductor field-effect transistors (MOSFET) according to
the present inventive subject matter. The MOSFET includes an
n.sup.--type semiconductor layer 131a, a first n.sup.+-type
semiconductor layer 131b, a second n.sup.+-type semiconductor layer
131c, a p-type semiconductor layer 132, a p.sup.+-type
semiconductor layer 132a, a gate insulating layer 134, a gate
electrode 135a, a source electrode 135b and a drain electrode 135c.
FIG. 6 shows a schematic view of an embodiment of a junction
field-effect transistors (JFET) according to the present inventive
subject matter including an n.sup.--type semiconductor layer 141a,
a first n.sup.+-type semiconductor layer 141b, a second
n.sup.+-type semiconductor layer 141c, a p-type semiconductor layer
142, a gate electrode 145a, a source electrode 145b and a drain
electrode 145c. FIG. 7 shows a schematic view of an embodiment of
an insulated gate bipolar transistors (IGBT) according to the
present inventive subject matter including an n-type semiconductor
layer 151, an n.sup.--type semiconductor layer 151a, an
n.sup.+-type semiconductor layer 151b, a p-type semiconductor layer
152, a gate insulating layer 154, a gate electrode 155a, an emitter
electrode 155b and a collector electrode 155c.
[0065] FIG. 8 shows a schematic view of an embodiment of a light
emitting diode (LED) according to the present inventive subject
matter. The LED shown in FIG. 8 includes an n-type semiconductor
layer 161 on a second electrode 165b, and a light emitting layer
163 is positioned on the n-type semiconductor layer 161. Also, a
p-type semiconductor layer 162 is positioned on the light emitting
layer 163. A light-transmitting electrode 167, that permeates the
light generated in the light emitting layer 163, is provided on the
p-type semiconductor layer. A first electrode is positioned on the
light-transmitting electrode 167. A light emitting material used
for the light emitting layer may be a known material. The light
emitting device shown in FIG. 8 may be covered with a protective
layer except for the electrode portion.
[0066] Examples of the material of the light-transmitting electrode
may include oxide conductive material containing indium or
titanium. Regarding the material of the light-emitting electrode,
in detail, the material may be In.sub.2O.sub.3, ZnO, SnO.sub.2,
Ga.sub.2O.sub.3, TiO.sub.2, CeO.sub.2, a mixed crystal thereof. The
material may contain a dopant. By providing those materials using
known method such as sputtering, the light-transmitting electrode
would be formed. Also, annealing may be carried out after forming
the translucent electrode, in order to make the electrode more
transparent.
[0067] According to the light emitting diode of FIG. 8, the
light-emitting layer 163 is configured to emit light by applying a
current to the p-type semiconductor layer 162, the light emitting
layer 163, and the n-type semiconductor layer, through the first
electrode 165a as a positive electrode and the second electrode
165b as a negative electrode.
[0068] Examples of the material of the first electrode 165a and the
second electrode 165b include Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta,
Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, Ag and/or
alloys thereof, metal oxide conductive films such as tin oxide,
zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc
oxide (IZO), organic conductive compounds such as polyaniline,
polythiophene, and polypyrrole, and mixtures of these materials. A
forming method of the first and the second electrode is not
particularly limited. Examples of the forming method of the first
and the second electrode include wet methods such as printing
method, spray method, coating method, physical methods such as
vacuum deposition method, sputtering method, ion plating method,
chemical methods such as CVD method, plasma CVD method. The forming
method may be selected from above mentioned methods in
consideration of a suitability for the material of the first
electrode and the second electrode.
[0069] FIG. 9 shows a schematic view of another embodiment of a
light emitting diode (LED) according to the present inventive
subject matter. In the LED of FIG. 9, an n-type semiconductor layer
161 is arranged on the substrate 169, and the second electrode 165b
is arranged on a part of the exposed surface of the n-type
semiconductor layer 161, in which the exposed surface is formed by
cutting out a part of a p-type semiconductor layer 162,
light-emitting layer 163 and the n-type semiconductor layer
161.
[0070] In addition, according to an embodiment of the present
inventive subject matter, the semiconductor device may be used in a
semiconductor system including a power source. The power source may
be obtained by electrically connecting the semiconductor device to
a wiring pattern using a known method. FIG. 10 shows a schematic
view of a power system according to an embodiment of the present
inventive subject matter. The semiconductor system of FIG. 10
includes two or more power devices (power sources) and a control
circuit. The power system may be used for a system device in
combination with an electric circuit, as shown in FIG. 11. FIG. 12
shows a schematic view of a circuit diagram of a power supply
circuit of a power device including a power circuit and a control
circuit. A DC voltage is switched at high frequencies by an
inverter (configured with MOSFET A to D) to be converted to AC,
followed by an insulation and transformation by a transformer. The
voltage is the rectified by rectification MOSFETs and the smoothed
by a DCL (smoothing coils L1 and L2) and a capacitor to output a
direct current voltage. At this point, the output voltage is
compared with a reference voltage by a voltage comparator to
control the inverter and the rectification MOSFETs by a PWM control
circuit to have a desired output voltage.
EXAMPLE
1. Film-Formation Apparatus
[0071] Regarding a film-formation apparatus, a mist CVD apparatus
19 used in an embodiment of a method according to the present
inventive subject matter is described with FIG. 1. The mist CVD
apparatus 19 includes a susceptor 21 on which a substrate 20 is
placed. The mist CVD apparatus 19 includes a carrier gas supply
device 22a, a first flow-control valve 23a that is configured to
control a flow of carrier gas sent from the carrier gas supply
device 22a, a diluted carrier gas supply device 22b, a second
flow-control valve 23b to control a flow of a carrier gas that is
configured to be sent from the diluted carrier gas supply device
22b, a mist generator 24 in that a raw material solution 24a is
contained, a vessel 25 in that water 25a is contained, an
ultrasonic transducer 26 attached to a bottom of the vessel 25, a
supply pipe 27 that may be a quartz pipe with an inside diameter
that may be 40mm, and a heater 28 arranged at a peripheral portion
of the supply pipe. The susceptor 21 includes a surface that is
slanted off the horizontal and on that the substrate 20 is
arranged. The susceptor 21 is made of quartz. Since the susceptor
21 and the supply pipe 27 that are configured to be a
film-formation chamber are made of quartz, this configuration
reduces a possibility that a foreign substance entering a film that
is formed on the substrate 20.
2. Preparation of a Raw-Material Solution
[0072] To make a raw material solution, rhodium acetylacetonate
(rhodium concentration 0.001 mol/L) was mixed to be 75 mol % and
gallium acetylacetonate (gallium concentration is 0.001 mol/L) was
mixed to be 25 mol % in the raw material solution.
3. Film Formation Preparation
[0073] The raw material solution 24a obtained at 2. Preparation of
the Raw-Material Solution above was set in the mist generator 24.
Then, as a substrate 20, a c-plane sapphire substrate was placed on
the susceptor 21, and the heater 28 was activated to raise the
temperature in the film-formation chamber 27 up to 500.degree. C.
The first flow-control valve 23a and the second flow-control valve
23b were opened to supply a carrier gas from the carrier gas supply
device 22a and the diluted carrier gas supply device 22b, which are
the source of carrier gas, into the film-formation chamber 27 to
replace the atmosphere in the film-formation chamber 27 with the
carrier gas sufficiently. After the atmosphere in the film
formation chamber 27 was sufficiently replaced with the carrier
gas, the flow rate of the carrier gas from the carrier gas supply
device 22a was regulated at 5.0 L/min, and the diluted carrier gas
from the diluted carrier gas supply device 22b was regulated at 0.5
L/min. In this embodiment, oxygen was used as the carrier gas.
4. Formation of a Film
[0074] The ultrasonic transducer 26 was then vibrated at 2.4 MHz,
and the vibration propagated through the water 25a to the raw
material solution 24a to atomize the raw material solution 24a to
form atomized droplets. The atomized droplets was introduced in the
film formation chamber 27 with the carrier gas. The atomized
droplets was thermally reacted at 500.degree. C. under atmospheric
pressure in the film formation chamber 27 to form a film on the
substrate 20. The film formation time was 2 hours and the film
thickness was 100 nm.
[0075] Using an X-ray diffraction (XRD) device, a phase of the film
obtained at 4. Formation of a film described above was identified
as (Rh.sub.0.92Ga.sub.0.08).sub.2O.sub.3. FIG. 2 shows a result of
XRD. Also, a Hall effect of the obtained
(Rh.sub.0.92Ga.sub.0.08).sub.2O.sub.3 film was measured and
revealed that a carrier type of the film was defined as p-type,
carrier density of the film was 7.6.times.10.sup.17 (/cm.sup.3),
and mobility of the film was 1.01 (cm.sup.2/Vs).
INDUSTRIAL APPLICABILITY
[0076] A p-type oxide semiconductor of the present inventive
subject matter is applicable as semiconductor devices (e.g,
compound semiconductor devices) and electric components and
electronic devices, optical and electronic photography related
devices, and industrial parts. Since the p-type oxide semiconductor
according to the present inventive subject matter has an enhanced
p-type semiconductor property, the p-type oxide semiconductor is,
in particular, applicable to semiconductor devices.
REFERENCE NUMBER DESCRIPTION
[0077] 19 Mist CVD apparatus [0078] 20 a substrate [0079] 21 a
susceptor [0080] 22a a carrier gas supply device [0081] 22b a
diluted carrier gas supply device [0082] 23a a flow-control valve
[0083] 23b a flow-control valve [0084] 24 a mist generator [0085]
25 a vessel [0086] 26 an ultrasonic transducer [0087] 27 a supply
pipe [0088] 28 a heater [0089] 29 an air duct [0090] 101a an
n.sup.--type semiconductor layer [0091] 101b an n.sup.+-type
semiconductor layer [0092] 103 a metal layer [0093] 104 an
insulating layer [0094] 105a a Schottky electrode [0095] 105b an
Ohmic electrode [0096] 121a n-type semiconductor layer with wide
band gap [0097] 121b n-type semiconductor layer with narrow band
gap [0098] 121c an n+-type semiconductor layer [0099] 123 a p-type
semiconductor layer [0100] 125a a gate electrode [0101] 125b a
source electrode [0102] 125c a drain electrode [0103] 128 a buffer
layer [0104] 129 a substrate [0105] 131a an n.sup.--type
semiconductor layer [0106] 131b a first n.sup.+-type semiconductor
layer [0107] 131c a second n.sup.+-type semiconductor layer [0108]
132 a p-type semiconductor layer [0109] 134 a gate insulating film
[0110] 135a a gate electrode [0111] 135b a source electrode [0112]
135c a drain electrode [0113] 138 a buffer layer [0114] 139 a
semi-insulating layer [0115] 141a an n.sup.--type semiconductor
layer [0116] 141b a first n.sup.+-type semiconductor layer [0117]
141c a second n.sup.+-type semiconductor layer [0118] 142 a p-type
semiconductor layer [0119] 145a a gate electrode [0120] 145b a
source electrode [0121] 145c a drain electrode [0122] 151 an n-type
semiconductor layer [0123] 151a an n.sup.--type semiconductor layer
[0124] 151b an n.sup.+-type semiconductor layer [0125] 152 a p-type
semiconductor layer [0126] 154 a gate insulating layer [0127] 155a
a gate electrode [0128] 155b an emitter electrode [0129] 155c a
collector electrode [0130] 161 an n-type semiconductor layer [0131]
162 a p-type semiconductor layer [0132] 163 a light emitting diode
[0133] 165a a first electrode [0134] 165b a second electrode [0135]
167 a translucent electrode [0136] 169 a substrate
* * * * *
References