U.S. patent application number 15/048422 was filed with the patent office on 2017-08-24 for method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches.
The applicant listed for this patent is ASM IP Holding B.V.. Invention is credited to Atsuki Fukazawa, Dai Ishikawa.
Application Number | 20170243734 15/048422 |
Document ID | / |
Family ID | 59630650 |
Filed Date | 2017-08-24 |
United States Patent
Application |
20170243734 |
Kind Code |
A1 |
Ishikawa; Dai ; et
al. |
August 24, 2017 |
METHOD FOR FORMING SILICON NITRIDE FILM SELECTIVELY ON SIDEWALLS OR
FLAT SURFACES OF TRENCHES
Abstract
A method for fabricating a layer structure in a trench includes:
simultaneously forming a dielectric film containing a Si--N bond on
an upper surface, and a bottom surface and sidewalls of the trench,
wherein a top/bottom portion of the film formed on the upper
surface and the bottom surface and a sidewall portion of the film
formed on the sidewalls are given different chemical resistance
properties by bombardment of a plasma excited by applying voltage
between two electrodes between which the substrate is place in
parallel to the two electrodes; and substantially removing either
one of but not both of the top/bottom portion and the sidewall
portion of the film by wet etching which removes the one of the
top/bottom portion and the sidewall portion of the film more
predominantly than the other according to the different chemical
resistance properties.
Inventors: |
Ishikawa; Dai; (Tokyo,
JP) ; Fukazawa; Atsuki; (Tokyo, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
ASM IP Holding B.V. |
Almere |
|
NL |
|
|
Family ID: |
59630650 |
Appl. No.: |
15/048422 |
Filed: |
February 19, 2016 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 21/02274 20130101;
C23C 16/345 20130101; H01L 21/02211 20130101; H01L 21/0217
20130101; C23C 16/56 20130101; H01L 21/31111 20130101; C23C 16/045
20130101; C23C 16/505 20130101; C23C 16/45536 20130101; H01L
21/0228 20130101; H01L 21/3105 20130101 |
International
Class: |
H01L 21/02 20060101
H01L021/02; H01L 21/311 20060101 H01L021/311 |
Claims
1. (canceled)
2. The method according to claim 4, wherein the plasma is a plasma
of Ar, N.sub.2, or O.sub.2.
3. (canceled)
4. A method for fabricating a layer structure constituted by a
dielectric film containing a Si--N bond in a trench formed in an
upper surface of a substrate, comprising: (i) simultaneously
forming a dielectric film containing a Si--N bond on the upper
surface, and a bottom surface and sidewalls of the trench, wherein
a top/bottom portion of the dielectric film formed on the upper
surface and the bottom surface and a sidewall portion of the
dielectric film formed on the sidewalls are given different
chemical resistance properties by bombardment of a plasma excited
by applying voltage between two electrodes between which the
substrate is placed in parallel to the two electrodes; and (ii)
substantially removing either one of but not both of the top/bottom
portion and the sidewall portion of the dielectric film by wet
etching which removes the one of the top/bottom portion and the
sidewall portion of the dielectric film more predominantly than the
other according to the different chemical resistance properties,
wherein the plasma is a capacitively coupled plasma (CCP) which is
excited by applying RF power to one of the two electrodes, wherein
the RF power is higher than reference RF power at which the
chemical resistance properties of the top/bottom portion of the
dielectric film and the sidewall portion of the dielectric film are
substantially equivalent, wherein the wet etching removes the
top/bottom portion of the dielectric film selectively relative to
the sidewall portion of the dielectric film.
5. The method according to claim 4, further comprising, prior to
steps (i) and (ii), repeating the following steps to determine the
reference RF power: simultaneously forming a dielectric film under
the same conditions as in step (i) except that RF power is changed
as a variable; and substantially removing either one of but not
both of the top/bottom portion and the sidewall portion of the
dielectric film by wet etching under the same conditions as in step
(ii).
6. The method according to claim 4, wherein the dielectric film is
a SiN film.
7. The method according to claim 4, wherein the wet etching is
conducted using a solution of hydrogen fluoride (HF).
8. A method for fabricating a layer structure constituted by a
dielectric film containing a Si--N bond in a trench formed in an
upper surface of a substrate, comprising: (i) simultaneously
forming a dielectric film containing a Si--N bond on the upper
surface, and a bottom surface and sidewalls of the trench, wherein
a top/bottom portion of the dielectric film formed on the upper
surface and the bottom surface and a sidewall portion of the
dielectric film formed on the sidewalls are given different
chemical resistance properties by bombardment of a plasma excited
by applying voltage between two electrodes between which the
substrate is placed in parallel to the two electrodes; and (ii)
substantially removing either one of but not both of the top/bottom
portion and the sidewall portion of the dielectric film by wet
etching which removes the one of the top/bottom portion and the
sidewall portion of the dielectric film more predominantly than the
other according to the different chemical resistance properties,
wherein step (i) comprises: placing a substrate having a trench in
its upper surface between the electrodes; and depositing the
dielectric film on the substrate by plasma-enhanced atomic layer
deposition (PEALD) using nitrogen gas as a reactant gas, wherein
the plasma is a capacitively coupled plasma (CCP) which is excited
by applying RF power to one of the two electrodes in each cycle of
the PEALD, wherein the RF power is higher than reference RF power
at which the chemical resistance properties of the top/bottom
portion of the dielectric film and the sidewall portion of the
dielectric film are substantially equivalent so that the wet
etching in step (ii) removes the top/bottom portion of the
dielectric film selectively relative to the sidewall portion of the
dielectric film.
9. The method according to claim 8, wherein the PEALD uses
aminosilane, halogenated silane, monosilane, or disilane as a
precursor.
10. The method according to claim 8, wherein no annealing is
conducted between steps (i) and (ii).
11. A method for fabricating a layer structure constituted by a
dielectric film containing a Si--N bond in a trench formed in an
upper surface of a substrate, comprising: (i) simultaneously
forming a dielectric film containing a Si--N bond on the upper
surface, and a bottom surface and sidewalls of the trench, wherein
a top/bottom portion of the dielectric film formed on the upper
surface and the bottom surface and a sidewall portion of the
dielectric film formed on the sidewalls are given different
chemical resistance properties by bombardment of a plasma excited
by applying voltage between two electrodes between which the
substrate is placed in parallel to the two electrodes; and (ii)
substantially removing either one of but not both of the top/bottom
portion and the sidewall portion of the dielectric film by wet
etching which removes the one of the top/bottom portion and the
sidewall portion of the dielectric film more predominantly than the
other according to the different chemical resistance properties,
wherein step (i) comprises: placing a substrate having a trench on
its upper surface between the electrodes; and depositing the
dielectric film on the substrate by plasma-enhanced atomic layer
deposition (PEALD) using nitrogen gas as a reactant gas, wherein
the plasma is a capacitively coupled plasma (CCP) which is excited
by applying RF power to one of the two electrodes in each cycle of
the PEALD, wherein the RF power is lower than reference RF power at
which the chemical resistance properties of the top/bottom portion
of the dielectric film and the sidewall portion of the dielectric
film are substantially equivalent so that the wet etching in step
(ii) removes the sidewall portion of the dielectric film
selectively relative to the top/bottom portion of the dielectric
film.
12. The method according to claim 11, wherein the PEALD uses
aminosilane, halogenated silane, monosilane, or disilane as a
precursor.
13. A method for fabricating a layer structure constituted by a
dielectric film containing a Si--N bond in a trench formed in an
upper surface of a substrate, comprising: (i) simultaneously
forming a dielectric film containing a Si--N bond on the upper
surface, and a bottom surface and sidewalls of the trench, wherein
a top/bottom portion of the dielectric film formed on the upper
surface and the bottom surface and a sidewall portion of the
dielectric film formed on the sidewalls are given different
chemical resistance properties by bombardment of a plasma excited
by applying voltage between two electrodes between which the
substrate is placed in parallel to the two electrodes; and (ii)
substantially removing either one of but not both of the top/bottom
portion and the sidewall portion of the dielectric film by wet
etching which removes the one of the top/bottom portion and the
sidewall portion of the dielectric film more predominantly than the
other according to the different chemical resistance properties,
wherein step (i) comprises: depositing a dielectric film on a
substrate having a trench in its upper surface; placing the
substrate between the two electrodes; and exciting the plasma
between the electrodes to treat a surface of the deposited
dielectric film without depositing a film, wherein the plasma is a
capacitively coupled plasma (CCP) which is excited by applying RF
power to one of the two electrodes, wherein the RF power is higher
than reference RF power at which the chemical resistance properties
of the top/bottom portion of the dielectric film and the sidewall
portion of the dielectric film are substantially equivalent so that
the wet etching in step (ii) removes the top/bottom portion of the
dielectric film selectively relative to the sidewall portion of the
dielectric film.
14. The method according to claim 13, wherein the dielectric film
is deposited on the substrate by atomic layer deposition (ALD).
15. The method according to claim 14, wherein the ALD is
plasma-enhanced ALD (PEALD), and step (i) is conducted in its
entirety in the same chamber.
16. The method according to claim 13, wherein no annealing is
conducted after depositing the dielectric film and before step
(ii).
17. The method according to claim 13, wherein the deposited
dielectric film has a thickness of 10 nm or less.
Description
BACKGROUND
[0001] Field of the Invention
[0002] The present invention relates generally to a method for
fabricating a layer structure constituted by a dielectric film
containing a Si--N bond in a trench formed in an upper surface of a
substrate.
[0003] Related Art
[0004] In manufacturing processes of large-scale integrated
circuits (LSIs), there are several processes for forming sidewalls
in trenches. The sidewalls are used as spacers or used for blocking
etching of a structure from side surfaces of trenches.
Conventionally, the sidewalls were formed by forming a conformal
film on surfaces of trenches, and then removing portions thereof
formed on an upper surface in which the trenches were formed and
portions formed on bottom surfaces of the trenches by asymmetrical
etching. However, when such a formation method is used,
over-etching is required in order to remove footing of sidewalls in
which the thickness of the sidewalls increases near and at the
bottom, forming a slope. Over-etching causes etching of an
underlying layer and causes damage to a layer structure.
[0005] Any discussion of problems and solutions in relation to the
related art has been included in this disclosure solely for the
purposes of providing a context for the present invention, and
should not be taken as an admission that any or all of the
discussion was known at the time the invention was made.
SUMMARY
[0006] In some embodiments, a film formed on a top surface of a
substrate in which a trench is formed and on a bottom surface of
the trench and a film formed on the sidewalls of the trench possess
different film properties associated with wet etching (i.e.,
directional control of film properties). By subjecting the
substrate to wet etching, it is possible to remove selectively
either the film formed on the top/bottom surface of the trench or
the film formed on the sidewalls of the trench, i.e., selectively
forming either a film extending in a horizontal direction or a film
extending in a vertical direction in a trench structure. According
to the above method, a horizontal or vertical layer in a trench
structure can selectively be formed solely by wet etching without
dry etching as an etching means (i.e., directional control of film
formation).
[0007] In some embodiments, the film having directionally
controlled film properties can be a silicon nitride film deposited
by plasma-enhanced chemical vapor deposition (PECVD) or
plasma-enhanced atomic layer deposition (PEALD). Alternatively, in
some embodiments, a silicon nitride film is deposited without
directional control, and then the film is treated to provide
directionality of film properties. That is, when ion bombardment is
exerted on a silicon nitride film during deposition of the film or
after the deposition of the film, impurities can be removed from
the film, thereby causing densification of the film and improving
the film quality; however, when ion bombardment is intensified and
asymmetrically exerted on the dielectric film in a direction
perpendicular to the film, the film quality is degraded, thereby
dissociating Si--N bonds, decreasing the density of the film, and
increasing wet etching rates. The above phenomena are totally
unexpected since generally ion bombardment is believed to cause
densification of a film and to decrease the wet etch rate. The
intensity of ion bombardment can be directionally controlled by a
plasma generated using a parallel plate electrode configuration,
e.g., a capacitively coupled plasma, which can control the incident
direction of ions, the dose of ions, and the energy of ions. Based
on the above principle which is not intended to limit the
invention, the directionality of film properties can be
controlled.
[0008] For purposes of summarizing aspects of the invention and the
advantages achieved over the related art, certain objects and
advantages of the invention are described in this disclosure. Of
course, it is to be understood that not necessarily all such
objects or advantages may be achieved in accordance with any
particular embodiment of the invention. Thus, for example, those
skilled in the art will recognize that the invention may be
embodied or carried out in a manner that achieves or optimizes one
advantage or group of advantages as taught herein without
necessarily achieving other objects or advantages as may be taught
or suggested herein.
[0009] Further aspects, features and advantages of this invention
will become apparent from the detailed description which
follows.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] These and other features of this invention will now be
described with reference to the drawings of preferred embodiments
which are intended to illustrate and not to limit the invention.
The drawings are greatly simplified for illustrative purposes and
are not necessarily to scale.
[0011] FIG. 1A is a schematic representation of a PEALD
(plasma-enhanced atomic layer deposition) apparatus for depositing
a protective film usable in an embodiment of the present
invention.
[0012] FIG. 1B illustrates a schematic representation of a
precursor supply system using a flow-pass system (FPS) usable in an
embodiment of the present invention.
[0013] FIG. 2 is a flowchart illustrating steps of fabricating a
layer structure according to an embodiment of the present
invention.
[0014] FIG. 3 is a flowchart illustrating steps of fabricating a
layer structure according to another embodiment of the present
invention.
[0015] FIG. 4 is a flowchart illustrating steps of fabricating a
layer structure according to still another embodiment of the
present invention.
[0016] FIG. 5 is a flowchart illustrating steps of fabricating a
layer structure according to yet another embodiment of the present
invention.
[0017] FIG. 6 is a flowchart illustrating steps of fabricating a
layer structure according to a different embodiment of the present
invention.
[0018] FIG. 7 is a graph showing the relationship between RF power
and wet etch rate of a film formed on a top surface and that of a
film formed on sidewalls of a trench, showing a threshold
(reference) RF power, according to an embodiment of the present
invention.
[0019] FIG. 8 shows Scanning Electron Microscope (SEM) photographs
of cross-sectional views of silicon nitride films formed according
to embodiments of the present invention.
[0020] FIG. 9 shows a Scanning Electron Microscope (SEM) photograph
of a cross-sectional view of a silicon nitride film formed
according to an embodiment of the present invention.
[0021] FIG. 10 illustrates a cross-sectional view of a silicon
nitride film formed according to an embodiment of the present
invention.
[0022] FIG. 11 illustrates a cross-sectional view of a silicon
nitride film formed according to another embodiment of the present
invention.
[0023] FIG. 12 is a graph showing the relationship between RF power
and Si-N peak intensity [au] of a SiN film according to an
embodiment of the present invention.
[0024] FIG. 13 is a graph showing the relationship between RF power
and density [g/cm.sup.3] of a SiN film according to an embodiment
of the present invention.
[0025] FIG. 14 is a graph showing a general relationship between
plasma density and wet etch rate of a film formed on a top surface
and that of a film formed on sidewalls of a trench according to an
embodiment of the present invention.
DETAILED DESCRIPTION OF EMBODIMENTS
[0026] In this disclosure, "gas" may include vaporized solid and/or
liquid and may be constituted by a single gas or a mixture of
gases. In this disclosure, a process gas introduced to a reaction
chamber through a showerhead may be comprised of, consist
essentially of, or consist of a precursor gas and an additive gas.
The precursor gas and the additive gas are typically introduced as
a mixed gas or separately to a reaction space. The precursor gas
can be introduced with a carrier gas such as a noble gas. The
additive gas may be comprised of, consist essentially of, or
consist of a reactant gas and a dilution gas such as a noble gas.
The reactant gas and the dilution gas may be introduced as a mixed
gas or separately to the reaction space. A precursor may be
comprised of two or more precursors, and a reactant gas may be
comprised of two or more reactant gases. The precursor is a gas
chemisorbed on a substrate and typically containing a metalloid or
metal element which constitutes a main structure of a matrix of a
dielectric film, and the reactant gas for deposition is a gas
reacting with the precursor chemisorbed on a substrate when the gas
is excited to fix an atomic layer or monolayer on the substrate.
"Chemisorption" refers to chemical saturation adsorption. A gas
other than the process gas, i.e., a gas introduced without passing
through the showerhead, may be used for, e.g., sealing the reaction
space, which includes a seal gas such as a noble gas. In some
embodiments, "film" refers to a layer continuously extending in a
direction perpendicular to a thickness direction substantially
without pinholes to cover an entire target or concerned surface, or
simply a layer covering a target or concerned surface. In some
embodiments, "layer" refers to a structure having a certain
thickness formed on a surface or a synonym of film or a non-film
structure. A film or layer may be constituted by a discrete single
film or layer having certain characteristics or multiple films or
layers, and a boundary between adjacent films or layers may or may
not be clear and may be established based on physical, chemical,
and/or any other characteristics, formation processes or sequence,
and/or functions or purposes of the adjacent films or layers.
[0027] In this disclosure, "containing a Si--N bond" may refer to
being characterized by a Si--N bond or Si--N bonds, having a main
skeleton substantially constituted by a Si--N bond or Si--N bonds,
and/or having a substituent substantially constituted by a Si--N
bond or Si--N bonds. A dielectric film containing a Si--N bond
includes, but is not limited to, a SiN film and a SiON film, which
have a dielectric constant of about 2 to 10, typically about 4 to
8.
[0028] In this disclosure, "annealing" refers to a process during
which a material is treated to get into its stable form, e.g., a
terminal group (such as an alcohol group and hydroxyl group)
present in a component is replaced with a more stable group (such
as a Si-Me group) and/or forms a more stable form (such as a Si-O
bond), typically causing densification of a film.
[0029] Further, in this disclosure, the article "a" or "an" refers
to a species or a genus including multiple species unless specified
otherwise. The terms "constituted by" and "having" refer
independently to "typically or broadly comprising", "comprising",
"consisting essentially of", or "consisting of" in some
embodiments. Also, in this disclosure, any defined meanings do not
necessarily exclude ordinary and customary meanings in some
embodiments.
[0030] Additionally, in this disclosure, any two numbers of a
variable can constitute a workable range of the variable as the
workable range can be determined based on routine work, and any
ranges indicated may include or exclude the endpoints.
Additionally, any values of variables indicated (regardless of
whether they are indicated with "about" or not) may refer to
precise values or approximate values and include equivalents, and
may refer to average, median, representative, majority, etc. in
some embodiments.
[0031] In the present disclosure where conditions and/or structures
are not specified, the skilled artisan in the art can readily
provide such conditions and/or structures, in view of the present
disclosure, as a matter of routine experimentation. In all of the
disclosed embodiments, any element used in an embodiment can be
replaced with any elements equivalent thereto, including those
explicitly, necessarily, or inherently disclosed herein, for the
intended purposes. Further, the present invention can equally be
applied to apparatuses and methods.
[0032] The embodiments will be explained with respect to preferred
embodiments. However, the present invention is not limited to the
preferred embodiments.
[0033] Some embodiments provide a method for fabricating a layer
structure constituted by a dielectric film containing a Si--N bond
in a trench formed in an upper surface of a substrate, comprising:
(i) simultaneously forming a dielectric film containing a Si-N bond
on the upper surface, and a bottom surface and sidewalls of the
trench, wherein a top/bottom portion of the dielectric film formed
on the upper surface and the bottom surface and a sidewall portion
of the dielectric film formed on the sidewalls are given different
chemical resistance properties by bombardment of a plasma excited
by applying voltage between two electrodes between which the
substrate is place in parallel to the two electrodes; and (ii)
substantially removing either one of but not both of the top/bottom
portion and the sidewall portion of the dielectric film by wet
etching which removes the one of the top/bottom portion and the
sidewall portion of the dielectric film more predominantly than the
other according to the different chemical resistance properties.
The term "simultaneously forming" may refer to forming generally or
substantially at the same time, in the same process, or in the same
step, which includes depositing generally or substantially at the
same time, in the same process, or in the same step, and/or
treating generally or substantially at the same time, in the same
process, or in the same step. In this disclosure, the term
"substantial" or "substantially" may refer to ample, considerable,
or material quantity, size, time, or space (e.g., at least 70%,
80%, 90%, or 95% relative to the total or referenced value)
recognized by a skilled artisan in the art to be sufficient for the
intended purposes or functions.
[0034] FIG. 2 is a flowchart illustrating steps of fabricating a
layer structure according to an embodiment of the present
invention. Step S1 and step S2 correspond to steps (i) and (ii),
respectively. In step S1, by using plasma bombardment, a dielectric
film having directionality of film properties is formed over a
trench. The plasma bombardment can be applied during the deposition
of the film or after the completion of deposition of the film. In
step S2, according to the difference in the film properties between
the top/bottom portion of the film and the sidewall portion of the
film, one of the portions of the film is more predominantly etched
than the other by wet etching, leaving only one of the portions in
the layer structure.
[0035] In step S2, the wet etching is conducted using a solution of
hydrogen fluoride (HF), for example.
[0036] By adjusting bombardment of a plasma excited by applying
voltage between two electrodes between which the substrate is place
in parallel to the two electrodes, a top/bottom portion of the
dielectric film formed on the upper surface and the bottom surface
and a sidewall portion of the dielectric film formed on the
sidewalls can be given different chemical resistance properties. A
plasma is a partially ionized gas with high free electron content
(about 50%), and when a plasma is excited by applying AC voltage
between parallel electrodes, ions are accelerated by a self dc bias
(V.sub.DC) developed between plasma sheath and the lower electrode
and bombard a film on a substrate placed on the lower electrode in
a direction perpendicular to the film (the ion incident direction).
The bombardment of a plasma can be represented by plasma density or
kinetic energy of ions. The plasma density can be modulated mainly
by tuning the pressure and RF power (the lower the pressure and the
higher the power, the higher the plasma density becomes). The
plasma density can also be modulated by applying a dc bias voltage
or an AC voltage with a lower frequency set for ions to follow
(<1 MHz). The plasma density can be determined using a probe
method (e.g., "High accuracy plasma density measurement using
hybrid Langmuir probe and microwave interferometer method", Deline
C, et al., Rev. Sci. Instrum. 2007 November; 78(11): 113504, the
disclosure of which is incorporated by reference in its entirety).
When inserting a probe in a plasma and applying a voltage thereto,
an electric current flows through the probe, which is called "ion
saturation current" (I.sub.i) which can be calculated as follows,
and then the plasma density (N.sub.p) can be calculated as
follows:
[0037] I.sub.i=e.times.N.sub.e (kT.sub.e/M).times.exp(1/2)eA;
N.sub.p=I.sub.i (M/kT.sub.e)/exp(1/2)eA, wherein I.sub.i: ion
saturation current [A]; A: surface area of the probe [m.sup.2]; e:
electronic charge [C]; Ne: electron density [m.sup.-3]; k:
Boltzmann's constant [J/K]; T.sub.e: electron temperature [K]; M:
ion mass [kg].
[0038] FIG. 14 is a graph showing a general relationship between
plasma density and wet etch rate of a film formed on a top surface
and that of a film formed on sidewalls of a trench according to an
embodiment of the present invention. In this graph, the chemical
resistance properties are represented by wet etch rate. On the
top/bottom surface of the film, plasma bombardment is exerted
generally in a direction perpendicular to the film surface, whereas
on the sidewall surface of the film, plasma bombardment is exerted
generally in a direction parallel to the film surface. The wet etch
rate of a film formed on the top/bottom surfaces of a trench is low
when the plasma density is low since ions included in the plasma
exerted on the film remove impurities and cause densification of
the film. However, the wet etch rate of the film formed on the
top/bottom surfaces increases as the plasma density increases as
shown in FIG. 14, because the dose of ions is so high as to enhance
dissociation of Si--N bond. On the other hand, the wet etch rate of
a film formed on the sidewall surfaces of the trench is high when
the plasma density is low since the dose of ions included in the
plasma exerted on the film is insufficient to remove impurities and
to cause densification of the film. However, the wet etch rate of
the film formed on the sidewall surfaces decreases as the plasma
density increases as shown in FIG. 14. In other words, the film
quality of the film formed on the top/bottom surfaces is degraded
as the plasma density increases, whereas the film quality of the
film formed on the sidewall surface is improved as the plasma
density increases. Thus, there is a threshold point in the plasma
density where the film quality (or film characteristics) of the
film on the top/bottom surfaces and that of the film on the
sidewall are substantially equivalent, i.e., the line showing the
relationship between plasma density and the wet etch rate of the
film formed on the top/bottom surfaces and that of the film formed
on the sidewalls intersect at the threshold point as shown in FIG.
14. The film characteristics of the film on the top/bottom surfaces
and that of the film on the sidewall surface are reversed at the
threshold point. Accordingly, by adjusting the plasma density, the
film having directionality of film properties can be formed. When
the plasma density is set to be lower than the threshold point, the
film on the sidewalls can be more predominantly removed than is the
film on the top/bottom surfaces by wet etching, whereas when the
plasma density is set to be higher than the threshold point, the
film on the top/bottom surfaces can be more predominantly removed
than is the film on the sidewalls by wet etching. Accordingly, a
desired layer structure can be fabricated.
[0039] In FIG. 14, the intersecting point (threshold point) is
changed according to the duration of application of voltage, the
frequency, the pressure, the distance between the electrodes, the
temperature, etc., wherein, generally, the longer the duration of
application of voltage, and the lower the pressure, the lower the
plasma density at the intersecting point becomes. It should be
noted that when the pressure, RF power, voltage, etc. are constant,
a relationship substantially similar to that shown in FIG. 14 can
be obtained between wet etch rate and RF power between parallel
electrodes. The threshold point can be determined prior to steps
(i) and (ii) based on this disclosure and routine experimentation.
Thus, in some embodiments, the method for fabricating a layer
structure further comprises, prior to steps (i) and (ii), repeating
the following steps to determine the threshold point (reference
point): (a) simultaneously forming a dielectric film under the same
conditions as in step (i) except that the voltage is changed as a
variable; and (b) substantially removing either one of but not both
of the top/bottom portion and the sidewall portion of the
dielectric film by wet etching under the same conditions as in step
(ii).
[0040] FIG. 3 is a flowchart illustrating steps of fabricating a
layer structure according to an embodiment of the present
invention. Step S11 corresponds to steps (a) and (b), and steps S12
and S13 correspond to steps (i) and (ii), respectively. In step
S11, the threshold voltage for plasma bombardment for reversing
film characteristics of a top/bottom portion and a sidewall portion
of a film is determined. In step S12, by using plasma bombardment
at a voltage adjusted with reference to the determined threshold
voltage, a dielectric film having directionality of film properties
is formed over a trench. For example, when a voltage higher than
the threshold voltage is applied between the electrodes in step
S12, the wet etch rate of the top/bottom portion of the film
becomes higher than that of the sidewall portion of the film,
resulting in predominantly removing the top/bottom portion of the
film, rather than the sidewall portion of the film by wet etching
in step S13. On the other hand, when a voltage lower than the
threshold voltage is applied between the electrodes in step S12,
the wet etch rate of the sidewall portion of the film becomes
higher than that of the top/bottom portion of the film, resulting
in predominantly removing the sidewall portion of the film, rather
than the top/bottom portion of the film by wet etching in step
S13.
[0041] When ion bombardment is exerted on a film without using a
parallel electrode configuration, e.g., by using a reactant in
low-pressure chemical vapor deposition (LPCVD), a threshold point
such as that shown in FIG. 14 would not be obtained since the
reactant in LPCVD does not create asymmetrical ion bombardment,
i.e., does not create directionality of film properties. For
example, United States Patent Application Publication No.
2003/0029839 discloses LPCVD in which nitrogen-containing ions such
as N.sub.2.sup.+ are implanted to form a nitrogen-enriched layer,
followed by thermal annealing to promote Si--N and N--H bonds in
the layer so as to reduce the wet etch rate of the layer. In
contrast, in some embodiments of the present invention,
asymmetrical plasma bombardment using nitrogen is exerted on a
top/bottom layer, which does not enrich nitrogen in the layer, but
dissociates Si--N bonds and reduces the density of the layer,
thereby increasing the wet etch rate of the layer formed on the
top/bottom surfaces, relative to the wet etch rate of the layer
formed on the sidewalls of a trench. In the above, when Si--N bonds
are dissociated, Si dangling bonds and N dangling bonds are formed,
which are ultimately terminated by hydrogen, forming N--H bonds and
Si--H bonds. As a result of dissociating Si--N bonds, the density
of the layer is decreased, and the wet etch rate is increased.
Thus, in some embodiments, no thermal annealing (such as at
900.degree. C.) is conducted between steps (i) and (ii) in order to
avoid densification of the top/bottom layer (i.e., to avoid
reducing the wet etch rate of the top/bottom layer). Further, in
some embodiments, the incident energy of ions is less than
approximately 200 eV (plasma potential is approximately 100 to 200
V), which is lower than that disclosed in United States Patent
Application Publication No. 2003/0029839 (0.5 to 20 keV). As with
the reactant in LPCVD, a reactant in thermal atomic layer
deposition (ALD) and a plasma of remote plasma deposition do not
form a threshold point such as that shown in FIG. 14 since the
plasmas of thermal ALD and remote plasma deposition also do not
create asymmetrical ion bombardment, i.e., do not create
directionality of film properties. Further, when a plasma such as
surface wave plasma (SWP) having low electron temperature and low
ion kinetic energy of incident ions is used, the effect of ion
bombardment is very limited, and thus, film degradation does not
occur, and thus, it is difficult to create directionality of film
properties. Furthermore, even when plasma bombardment is exerted on
a film constituted by silicon oxide, the film quality of the
silicon oxide film is not degraded, and thus, it is difficult to
create directionality of film properties.
[0042] In some embodiments, the plasma is a capacitively coupled
plasma (CCP) which is excited by applying RF power to one of the
two electrodes. Further, in some embodiments, inductively coupled
plasma (ICP), electron cyclotron resonance (ECR) plasma, microwave
surface wave plasma, helicon wave plasma, etc. can be used as the
plasma, wherein bias voltage is applied to the electrodes as
necessary to increase dc bias voltage between the plasma and
electrode.
[0043] In some embodiments, the RF power is higher than the
reference RF power at which the chemical resistance properties of
the top/bottom portion of the dielectric film and the sidewall
portion of the dielectric film are substantially equivalent,
wherein the wet etching removes the top/bottom portion of the
dielectric film selectively relative to the sidewall portion of the
dielectric film.
[0044] In some embodiments, the plasma is a plasma of Ar, N.sub.2,
and/or O.sub.2 or other atoms which have an atomic number higher
than hydrogen or helium.
[0045] In some embodiments, the trench has a width of 10 to 50 nm
(typically 15 to 30 nm) (wherein when the trench has a length
substantially the same as the width, it is referred to as a
hole/via, and a diameter thereof is 10 to 50 nm), a depth of 30 to
200 nm (typically 50 to 150 nm), and an aspect ratio of 3 to 20
(typically 3 to 10).
[0046] In some embodiments, the dielectric film can be used as an
etching stopper, low-k spacer, or gap-filler. For example, when
only the sidewall portion is left, the portion can be used as a
spacer for spacer-defined double patterning (SDDP), or when only
the top/bottom portion is left, the portion can be used as a mask
used for solid-state doping (SSD) of a sidewall layer
exclusively.
[0047] In some embodiments, step (i) comprises: (ia) placing a
substrate having a trench in its upper surface between the
electrodes; and (ib) depositing the dielectric film on the
substrate by plasma-enhanced atomic layer deposition (PEALD) using
nitrogen gas as a reactant gas, wherein the plasma is a
capacitively coupled plasma (CCP) which is excited by applying RF
power to one of the two electrodes in each cycle of the PEALD,
wherein the RF power is higher than the reference RF power at which
the chemical resistance properties of the top/bottom portion of the
dielectric film and the sidewall portion of the dielectric film are
substantially equivalent so that the wet etching in step (ii)
removes the top/bottom portion of the dielectric film selectively
relative to the sidewall portion of the dielectric film. In the
above, the film having directionality of film properties is formed
as the film is depositing, not after the completion of deposition
of the film.
[0048] FIG. 4 is a flowchart illustrating steps of fabricating a
layer structure according to still another embodiment of the
present invention. Step S21 corresponds to step (ib), and step S22
corresponds to step (ii). In step S21, a dielectric film having
directionality of film properties is deposited over a trench by
using plasma bombardment at a voltage higher than the threshold
voltage, and in step S22, a top/bottom portion of the film is more
predominantly removed than is a sidewall portion of the film, so
that substantially only the sidewall portion is left in the layer
structure.
[0049] In some embodiments, step (i) comprises: (ia) placing a
substrate having a trench on its upper surface between the
electrodes; and (ic) depositing the dielectric film on the
substrate by plasma-enhanced atomic layer deposition (PEALD) using
nitrogen gas as a reactant gas, wherein the plasma is a
capacitively coupled plasma (CCP) which is excited by applying RF
power to one of the two electrodes in each cycle of the PEALD,
wherein the RF power is lower than reference RF power at which the
chemical resistance properties of the top/bottom portion of the
dielectric film and the sidewall portion of the dielectric film are
substantially equivalent so that the wet etching in step (ii)
removes the sidewall portion of the dielectric film selectively
relative to the top/bottom portion of the dielectric film. In the
above, the film having directionality of film properties is formed
as the film is depositing, not after the completion of deposition
of the film.
[0050] FIG. 5 is a flowchart illustrating steps of fabricating a
layer structure according to yet another embodiment of the present
invention. Step S31 corresponds to step (ic), and step S32
corresponds to step (ii). In step S31, a dielectric film having
directionality of film properties is deposited over a trench by
using plasma bombardment at a voltage lower than the threshold
voltage, and in step S32, a sidewall portion of the film is more
predominantly removed than is a top/bottom portion of the film, so
that substantially only the top/bottom portion is left in the layer
structure.
[0051] In some embodiments, the dielectric film is SiN film or SiON
film or other Si--N bond-containing film.
[0052] In some embodiments, the PEALD or other deposition methods
uses one or more compounds selected from the group consisting of
aminosilane, halogenated silane, monosilane, and disilane as a
precursor. The aminosilane and halogenated silane include, but are
not limited to, Si.sub.2Cl.sub.6, SiCl.sub.2H2, SiI.sub.2H.sub.2,
bisdiethylaminosilane, bisdimethylaminosilane,
hexaethylaminodisilane, tetraethylaminosilane,
tart-butylamonosilane, bistart-butylamonosilane,
trimehylsilyldiethylamine, trimethysilyldiethylamine, and
bisdimethylaminodimethylsilane.
[0053] In some embodiments, step (i) comprises: (iA) depositing a
dielectric film on a substrate having a trench in its upper
surface; (iB) placing the substrate between the two electrodes; and
(iC) exciting the plasma between the electrodes to treat a surface
of the deposited dielectric film without depositing a film, wherein
the plasma is a capacitively coupled plasma (CCP) which is excited
by applying RF power to one of the two electrodes, wherein the RF
power is higher than the reference RF power at which the chemical
resistance properties of the top/bottom portion of the dielectric
film and the sidewall portion of the dielectric film are
substantially equivalent so that the wet etching in step (ii)
removes the top/bottom portion of the dielectric film selectively
relative to the sidewall portion of the dielectric film. In the
above, the film having directionality of film properties is formed
after completion of deposition of a film, by treating the film. In
the above, step (ii) is post-deposition treatment which need not be
cyclic.
[0054] FIG. 6 is a flowchart illustrating steps of fabricating a
layer structure according to a different embodiment of the present
invention. Step S41 corresponds to step (iA), step S42 corresponds
to steps (iB) and (iC), and step S43 corresponds to step (ii). In
step S41, a dielectric film is deposited over a trench, which film
need not have directionality of film properties, although it can
already possess directionality of film properties. In step S42,
plasma bombardment as post-deposition treatment is exerted on the
film at a voltage higher than the threshold voltage so that the wet
etch rate of a top/bottom portion of the film is higher than that
of a sidewall portion of the film. In step S43, the top/bottom
portion of the film is more predominantly removed than is the
sidewall portion of the film by wet etching, so that substantially
only the sidewall portion of the film is left in the layer
structure. Since the film is already deposited before the
post-deposition treatment, the use of a voltage lower than the
threshold voltage may not be effective because the wet etch rate of
the sidewall portion does not become higher than that of the
as-deposited film by exerting plasma bombardment on the film as
illustrated in FIG. 14 discussed above.
[0055] In some embodiments, the deposited dielectric film has a
thickness of approximately 10 nm or less (typically approximately 5
nm or less). If the film to be treated is thicker than
approximately 10 nm, plasma bombardment does not reach a bottom of
the film, i.e., it is difficult to adjust the wet etch rate of the
film entirely in the thickness direction.
[0056] The dielectric film subjected to the post-deposition
treatment can be deposited on the substrate by any suitable
deposition methods including plasma-enhanced atomic layer
deposition (PEALD), thermal ALD, low-pressure chemical vapor
deposition (PCVD), remote plasma deposition, PECVD, etc.
Preferably, the dielectric film is deposited by ALD since ALD can
provide a high conformality such as more than approximately 70% (or
more than 80% or 90%).
[0057] In some embodiments, no annealing is conducted after
depositing the dielectric film and before step (ii).
[0058] In some embodiments, the deposition cycle may be performed
by PEALD, one cycle of which is conducted under conditions shown in
Table 1 below.
TABLE-US-00001 TABLE 1 (numbers are approximate) Conditions for
Deposition Cycle Substrate temperature 100 to 600.degree. C.
(preferably 250 to 550.degree. C.) Pressure 10 to 2000 Pa
(preferably 100 to 800 Pa) Precursor SiI.sub.2H.sub.2, etc.
Precursor pulse 0.05 to 10 sec (preferably 0.2 to 1 sec) Precursor
purge 0.05 to 10 sec (preferably 0.2 to 3 sec) Reactant N.sub.2 +
H.sub.2 mixture, or NH.sub.3 + N.sub.2 mixture Flow rate of
reactant 100 to 20000 sccm (preferably 1000 to (continuous) 3000
sccm) for N.sub.2; 0 to 6000 sccm (preferably 0 to 600 sccm) for
H.sub.2 or NH.sub.3 (H.sub.2/N.sub.2 = 0-0.5, preferably 0-0.2)
Flow rate of carrier gas 100 to 5000 sccm (preferably 1000 to
(continuous) 3000 sccm) Ar or N.sub.2 Flow rate of dilution gas 0
to 10000 sccm (preferably 0 to (continuous) 5000 sccm) Ar or
N.sub.2 RF power (13.56 MHz) Less than 600 W (preferably 100 to for
a 300-mm wafer 500 W) for WER of sidewall being higher than WER of
top/bottom; 600 W or more (preferably 600 to 1000 W) for WER of
top/bottom being higher than WER of sidewall RF power pulse 0.05 to
30 sec (preferably 1 to 5 sec) Purge 0.05 to 10 sec (preferably 0.2
to 3 sec) Growth rate per cycle 0.02 to 0.06 nm/cycle (on top
surface) Step coverage (side/top; 20 to 100%; 30 to 100%
side/bottom) (preferably, 50 to 100%; 50 to 100%) Distance between
5 to 30 mm (preferably 7 to 20 mm) electrodes
[0059] In some embodiments, the post-deposition treatment may be
performed under conditions shown in Table 2 below.
TABLE-US-00002 TABLE 2 (numbers are approximate) Conditions for
Post-Deposition Treatment Thickness of SiN film 2 to 15 nm
(preferably 5 to 10 nm) Substrate temperature 25 to 600.degree. C.
(preferably 100 to 500.degree. C.) Pressure 10 to 2000 Pa
(preferably 100 to 500 Pa) Reactant N.sub.2, H.sub.2, NH.sub.3 Flow
rate of reactant 100 to 20000 sccm (preferably 1000 to (continuous)
3000 sccm) for N.sub.2; 0 to 6000 sccm (preferably 0 to 600 sccm)
for H.sub.2 or NH.sub.3 (H.sub.2/N.sub.2 = 0-0.5, preferably 0-0.2)
Flow rate of carrier gas 100 to 5000 sccm (preferably 1000 to
(continuous) 3000 sccm) Ar or N.sub.2 Flow rate of dilution gas 0
to 10000 sccm (preferably 0 to (continuous) 5000 sccm) Ar or
N.sub.2 RF power (13.56 MHz) More than 600 W (preferably 600 for a
300-mm wafer to 1000 W) Duration of RF power 1 to 600 sec.
(preferably 30 to 180 sec.) application Distance between electrodes
5 to 30 mm (preferably 7 to 20 mm)
[0060] In the above, although no precursor is fed to the reaction
chamber, and a carrier gas flows continuously.
[0061] In some embodiments, wet etching may be performed under
conditions shown in Table 3 below.
TABLE-US-00003 TABLE 3 (numbers are approximate) Conditions for Wet
etching Etching solution HF 0.05-5% Etching solution temperature 10
to 50.degree. C. (preferably 15 to 30.degree. C.) Duration of
etching 1 sec to 5 min (preferably 1 to 3 min) Etching rate 0.1 to
5 nm/min (preferably 0.5 to 2 nm/min)
[0062] For wet etching, any suitable single-wafer type or batch
type apparatus including any conventional apparatuses can be used.
Also, any suitable solution for wet etching including any
conventional solutions can be used.
[0063] In some embodiments, an insulation film can be formed only
on a sidewall of a trench as follows:
[0064] 1) forming a SiN film over a substrate having a trench
pattern, in which a pulse of feeding a precursor and a pulse of
exposing the substrate to an ambient atmosphere containing nitrogen
species excited by a plasma are repeated, in which the plasma is
excited in a manner exerting plasma bombardment on the substrate in
a direction perpendicular to the substrate (the incident angle of
ions is perpendicular to the substrate) under conditions such that
the wet etch rate of a sidewall portion of the film is lower than
that of a top/bottom portion of the film; and
[0065] 2) removing the top/bottom portion of the film by wet
etching.
[0066] In the above process sequence, the precursor is supplied in
a pulse using a carrier gas which is continuously supplied. This
can be accomplished using a flow-pass system (FPS) wherein a
carrier gas line is provided with a detour line having a precursor
reservoir (bottle), and the main line and the detour line are
switched, wherein when only a carrier gas is intended to be fed to
a reaction chamber, the detour line is closed, whereas when both
the carrier gas and a precursor gas are intended to be fed to the
reaction chamber, the main line is closed and the carrier gas flows
through the detour line and flows out from the bottle together with
the precursor gas. In this way, the carrier gas can continuously
flow into the reaction chamber, and can carry the precursor gas in
pulses by switching the main line and the detour line. FIG. 1B
illustrates a precursor supply system using a flow-pass system
(FPS) according to an embodiment of the present invention (black
valves indicate that the valves are closed). As shown in (a) in
FIG. 1B, when feeding a precursor to a reaction chamber (not
shown), first, a carrier gas such as Ar (or He) flows through a gas
line with valves b and c, and then enters a bottle (reservoir) 30.
The carrier gas flows out from the bottle 30 while carrying a
precursor gas in an amount corresponding to a vapor pressure inside
the bottle 30, and flows through a gas line with valves f and e,
and is then fed to the reaction chamber together with the
precursor. In the above, valves a and d are closed. When feeding
only the carrier gas (noble gas) to the reaction chamber, as shown
in (b) in FIG. 1B, the carrier gas flows through the gas line with
the valve a while bypassing the bottle 30. In the above, valves b,
c, d, e, and f are closed.
[0067] The precursor may be provided with the aid of a carrier gas.
Since ALD is a self-limiting adsorption reaction process, the
number of deposited precursor molecules is determined by the number
of reactive surface sites and is independent of precursor exposure
after saturation, and a supply of the precursor is such that the
reactive surface sites are saturated thereby per cycle. A plasma
for deposition may be generated in situ, for example, in an ammonia
gas that flows continuously throughout the deposition cycle. In
other embodiments the plasma may be generated remotely and provided
to the reaction chamber.
[0068] As mentioned above, each pulse or phase of each deposition
cycle is preferably self-limiting. An excess of reactants is
supplied in each phase to saturate the susceptible structure
surfaces. Surface saturation ensures reactant occupation of all
available reactive sites (subject, for example, to physical size or
"steric hindrance" restraints) and thus ensures excellent step
coverage. In some embodiments the pulse time of one or more of the
reactants can be reduced such that complete saturation is not
achieved and less than a monolayer is adsorbed on the substrate
surface.
[0069] The process cycle can be performed using any suitable
apparatus including an apparatus illustrated in FIG. 1A, for
example. FIG. 1A is a schematic view of a PEALD apparatus,
desirably in conjunction with controls programmed to conduct the
sequences described below, usable in some embodiments of the
present invention. In this figure, by providing a pair of
electrically conductive flat-plate electrodes 4, 2 in parallel and
facing each other in the interior 11 (reaction zone) of a reaction
chamber 3, applying HRF power (13.56 MHz or 27 MHz) 20 to one side,
and electrically grounding the other side 12, a plasma is excited
between the electrodes. A temperature regulator is provided in a
lower stage 2 (the lower electrode), and a temperature of a
substrate 1 placed thereon is kept constant at a given temperature.
The upper electrode 4 serves as a shower plate as well, and
reactant gas (and noble gas) and precursor gas are introduced into
the reaction chamber 3 through a gas line 21 and a gas line 22,
respectively, and through the shower plate 4. Additionally, in the
reaction chamber 3, a circular duct 13 with an exhaust line 7 is
provided, through which gas in the interior 11 of the reaction
chamber 3 is exhausted. Additionally, a dilution gas is introduced
into the reaction chamber 3 through a gas line 23. Further, a
transfer chamber 5 disposed below the reaction chamber 3 is
provided with a seal gas line 24 to introduce seal gas into the
interior 11 of the reaction chamber 3 via the interior 16 (transfer
zone) of the transfer chamber 5 wherein a separation plate 14 for
separating the reaction zone and the transfer zone is provided (a
gate valve through which a wafer is transferred into or from the
transfer chamber 5 is omitted from this figure). The transfer
chamber is also provided with an exhaust line 6. In some
embodiments, the deposition of multi-element film and surface
treatment are performed in the same reaction space, so that all the
steps can continuously be conducted without exposing the substrate
to air or other oxygen-containing atmosphere. In some embodiments,
a remote plasma unit can be used for exciting a gas.
[0070] In some embodiments, in the apparatus depicted in FIG. 1A,
the system of switching flow of an inactive gas and flow of a
precursor gas illustrated in FIG. 1B (described earlier) can be
used to introduce the precursor gas in pulses without substantially
fluctuating pressure of the reaction chamber.
[0071] In some embodiments, a dual chamber reactor (two sections or
compartments for processing wafers disposed close to each other)
can be used, wherein a reactant gas and a noble gas can be supplied
through a shared line whereas a precursor gas is supplied through
unshared lines.
[0072] A skilled artisan will appreciate that the apparatus
includes one or more controller(s) (not shown) programmed or
otherwise configured to cause the deposition and reactor cleaning
processes described elsewhere herein to be conducted. The
controller(s) are communicated with the various power sources,
heating systems, pumps, robotics, and gas flow controllers or
valves of the reactor, as will be appreciated by the skilled
artisan.
[0073] The present invention is further explained with reference to
working examples below. However, the examples are not intended to
limit the present invention. In the examples where conditions
and/or structures are not specified, the skilled artisan in the art
can readily provide such conditions and/or structures, in view of
the present disclosure, as a matter of routine experimentation.
Also, the numbers applied in the specific examples can be modified
by a range of at least .+-.50% in some embodiments, and the numbers
are approximate.
[0074] In some embodiments, an insulation film can be formed only
on a sidewall of a trench as follows:
[0075] 1) forming a SiN film over a substrate having a trench
pattern (the film may or may not have directionality of film
properties);
[0076] 2) treating the film with a plasma excited in a manner
exerting plasma bombardment on the substrate in a direction
perpendicular to the substrate (the incident angle of ions is
perpendicular to the substrate) under conditions such that the wet
etch rate of a sidewall portion of the film is lower than that of a
top/bottom portion of the film; and
[0077] 3) removing the top/bottom portion of the film by wet
etching.
EXAMPLES
Example 1
[0078] A SiN film was formed on a Si substrate (.PHI.300 mm) having
trenches by PEALD, one cycle of which was conducted under the
conditions shown in Table 4 (deposition cycle) below using the
PEALD apparatus illustrated in FIG. 1A and a gas supply system
(FPS) illustrated in FIG. 1B.
[0079] After taking out the substrate from the reaction chamber,
the substrate was subjected to wet etching under the conditions
shown in Table 4 below.
TABLE-US-00004 TABLE 4 (numbers are approximate) Conditions for
Deposition Cycle Substrate temperature 400.degree. C. Pressure 350
Pa Precursor SiI.sub.2H.sub.2 Precursor pulse 0.3 sec Precursor
purge 0.5 sec Reactant N.sub.2 Flow rate of reactant (continuous)
2000 sccm Flow rate of carrier gas (continuous) 2000 sccm N.sub.2
Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz)
for a Variable (see Fig. 7) 300-mm wafer RF power pulse 3.3 sec
Purge 0.1 sec Growth rate per cycle (on top surface) 0.05 nm/cycle
Number of cycles (thickness of film on 200 times (10 nm) top
surface) Step coverage (side/top; side/bottom) 100%; 100% Trench
depth/width (nm) 100/33 (AR = about 3) Distance between electrodes
15 mm Conditions for Wet etching Etching solution 0.5% HF Etching
solution temperature 20.degree. C. Duration of etching 2 min
Etching rate Variable (see Fig. 7)
[0080] The results are shown in FIG. 7. FIG. 7 is a graph showing
the relationship between RF power and wet etch rate of the film
formed on the top surface and that of the film formed on the
sidewalls of the trench, showing a threshold (reference) RF power.
As shown in FIG. 7, the wet etch rate of the sidewall portion
decreased as RF power increased, whereas the wet etch rate of the
top/bottom portions increased as the RF power increased, wherein
the line representing the former and the line representing the
latter intersect at an RF power of approximately 600 W. That is,
the threshold RF power was approximately 600 W, and it can be
understood that when RF power applied between the electrodes is
higher than approximately 600 W, the top/bottom portions of the
film can be removed selectively relative to the sidewall portion of
the film, whereas when RF power applied between the electrodes is
lower than approximately 600 W, the sidewall portion of the film
can be removed selectively relative to the top/bottom portions of
the film.
[0081] Further, prior to the wet etching, the top portion of the
film was subjected to additional analyses: Si--N peak intensity and
density. FIG. 12 is a graph showing the relationship between RF
power and Si--N peak intensity [au] of the SiN film. FIG. 13 is a
graph showing the relationship between RF power and density
[g/cm.sup.3] of the SiN film. As can be seen from FIGS. 12 and 13,
contrary to common technological knowledge (i.e., when increasing
RF power, densification of the film occurs), asymmetrical plasma
bombardment to the SiN film broke Si--N bonds when RF power
increased, and as a result of dissociation of Si--N bonds, the
density of the film decreased (the density is typically in a range
of 2.6 to 3.2 g/cm.sup.3), wherein the density of a film portion to
be removed by wet etching is lower than that of a film portion to
remain through wet etching).
Example 2
[0082] The SiN films were deposited under the conditions shown in
Table 5, where the threshold RF power was determined to be
approximately 400 W in the same manner as in Example 1. The SiN
films were then subjected to wet etching under the conditions shown
in Table 5. FIG. 8 shows Scanning Transmission Electron Microscope
(STEM) photographs of cross-sectional views of the silicon nitride
films. As can be seen from FIG. 8, when RF power was 700 W, the
top/bottom portions of the film were selectively removed by wet
etching, and substantially no film remained (no residual film was
observed) on the top surface and at the bottom of the trench. When
RF power was 500 W, the top/bottom portions of the film were more
predominantly removed than was the sidewall portion of the film by
wet etching, but residual film remained on the top surface and at
the bottom of the trench, whereas the sidewall portion of the film
mostly remained. When RF power was 300 W, the sidewall portion of
the film was more predominantly removed than were the top/bottom
portions of the film by wet etching, and no residual film remained
in some areas of the sidewall, whereas the top/bottom portions of
the film mostly remained.
TABLE-US-00005 TABLE 5 (numbers are approximate) Conditions for
Deposition Cycle Substrate temperature 200.degree. C. Pressure 350
Pa Precursor Bisdiethylaminosilane Precursor pulse 0.2 sec
Precursor purge 3 sec Reactant N.sub.2 Flow rate of reactant
(continuous) 2000 sccm Flow rate of carrier gas (continuous) 2000
sccm Ar Flow rate of dilution gas (continuous) 0 sccm RF power
(13.56 MHz) for a Variable (see Fig. 8) 300-mm wafer RF power pulse
3 sec Purge 0.1 sec Growth rate per cycle (on top surface) 0.02
nm/cycle Number of cycles (thickness of film on 500 times (10 nm)
top surface) Step coverage (side/top; side/bottom) 30%; 30% Trench
depth/width (nm) 100/33 (AR = about 3) Distance between electrodes
13 mm Conditions for Wet etching Etching solution 0.05% HF Etching
solution temperature 20.degree. C. Duration of etching 4 min
Etching rate Variable (see Fig. 8)
Example 3
[0083] The SiN film was deposited in the same manner as in Example
1 except that RF power was 880W. The SiN film was then subjected to
wet etching under the same conditions as in Example 1. FIG. 9 shows
a Scanning Transmission Electron Microscope (STEM) photograph of a
cross-sectional view of the SiN film after the wet etching. As can
be seen from FIG. 9, substantially no film remained (no residual
film was observed) on the top surface and at the bottom of the
trench.
Example 4
Prophetic Example
[0084] A SiN film is formed on a Si substrate (.PHI.300 mm) having
trenches by PEALD in the same manner as in Example 1 except that RF
power is 600 W. Thereafter, in the same reactor, the film is
treated with a plasma under the conditions shown in Table 6 below,
where RF power is 800 W which is higher than the threshold RF
power, thereby causing damage to the top surface of the substrate
and the bottom surface of the trench and degrading the film
quality. After taking out the substrate from the reaction chamber,
the substrate is subjected to wet etching under the conditions
shown in Table 6 below.
TABLE-US-00006 TABLE 6 (numbers are approximate) Conditions for
Surface treatment Substrate temperature 400.degree. C. Pressure 350
Pa Reactant N.sub.2 Flow rate of reactant (continuous) 2000 sccm
Flow rate of carrier gas (continuous) 2000 sccm Flow rate of
dilution gas (continuous) 0 sccm RF power (13.56 MHz) for a 300-mm
wafer 880 W Duration of RF power application 60 sec Distance
between electrodes 15 mm Conditions for Wet etching Etching
solution 0.5% HF Etching solution temperature 20.degree. C.
Duration of etching 2 min Etching rate (top/sidewall) 6 nm/min, 0.2
nm/min
[0085] FIG. 10 illustrates a cross-sectional view of the silicon
nitride film. Since a portion 52 of the film formed on a sidewall
51 of a trench formed in a substrate 51 does not receive
substantial plasma bombardment, the portion 52 maintains film
properties and remains after wet etching. In contrast, since a
portion of the film formed on a top surface 51b and a portion of
the film formed on a bottom surface 51a receive plasma bombardment,
the portions degrade film properties and are removed after wet
etching.
Example 5
Prophetic Example
[0086] A SiN film is formed on a Si substrate (.PHI.300 mm) having
trenches by PEALD, one cycle of which is conducted under the
conditions shown in Table 7 (deposition cycle) below using the
PEALD apparatus illustrated in FIG. 1A and a gas supply system
(FPS) illustrated in FIG. 1B.
[0087] After taking out the substrate from the reaction chamber,
the substrate is subjected to wet etching under the conditions
shown in Table 7 below.
TABLE-US-00007 TABLE 7 (the numbers are approximate) Conditions for
Deposition Cycle Substrate temperature 400.degree. C. Pressure 350
Pa Precursor SiI.sub.2H.sub.2 Precursor pulse 0.3 sec Precursor
purge 0.5 sec Reactant N.sub.2 Flow rate of reactant (continuous)
2000 sccm Flow rate of carrier gas (continuous) 2000 sccm N.sub.2
Flow rate of dilution gas (continuous) 0 sccm RF power (13.56 MHz)
for a 100 W 300-mm wafer RF power pulse 3.3 sec Purge 0.1 sec
Growth rate per cycle (on top surface) 0.05 nm/cycle Number of
cycles (thickness of film on 200 times (10 nm) top surface) Trench
depth/width (nm) 100/33 (AR = about 3) Step coverage (side/top;
side/bottom) 100%; 100% Distance between electrodes 15 mm
Conditions for Wet etching Etching solution 0.5% HF Etching
solution temperature 20.degree. C. Duration of etching 2 min
Etching rate (top/sidewall) 0.3 nm/min, 2.4 nm/min
[0088] FIG. 11 illustrates a cross-sectional view of the silicon
nitride films. Since RF power is 100 W which is lower than the
threshold RF power (which is expected to be 600 W), a sidewall
portion of the film is removed selectively relative to a top
portion 53b of the film and a bottom portion 53a of the film by wet
etching, wherein only the top/bottom portions 53a, 53b remain after
the wet etching. This film can be used as a cap layer.
[0089] It will be understood by those of skill in the art that
numerous and various modifications can be made without departing
from the spirit of the present invention. Therefore, it should be
clearly understood that the forms of the present invention are
illustrative only and are not intended to limit the scope of the
present invention.
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